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29 * Copyright 2010 Develer S.r.l. (http://www.develer.com/)
33 * \brief Driver for the LPC23xx I2C (implementation)
37 #include "cfg/cfg_i2c.h"
39 #define LOG_LEVEL I2C_LOG_LEVEL
40 #define LOG_FORMAT I2C_LOG_FORMAT
44 #include <cfg/debug.h>
45 #include <cfg/macros.h> // BV()
46 #include <cfg/module.h>
48 #include <cpu/detect.h>
51 #include <drv/timer.h>
53 #include <drv/vic_lpc2.h> /* vic_handler_t */
55 #include <io/lpc23xx.h>
73 * Wait that SI bit is set.
75 * Note: this bit is set when the I2C state changes. However, entering
76 * state F8 does not set SI since there is nothing for an interrupt service
77 * routine to do in that case.
79 #define WAIT_SI(i2c) \
81 ticks_t start = timer_clock(); \
82 while( !(HWREG(i2c->hw->base + I2C_CONSET_OFF) & BV(I2CON_SI)) ) \
84 if (timer_clock() - start > ms_to_ticks(CONFIG_I2C_START_TIMEOUT)) \
86 LOG_ERR("Timeout SI assert\n"); \
92 static void i2c_hw_restart(I2c *i2c)
94 // Clear all pending flags.
95 HWREG(i2c->hw->base + I2C_CONCLR_OFF) = BV(I2CON_STAC) | BV(I2CON_SIC) | BV(I2CON_AAC);
97 // Set start and ack bit.
98 HWREG(i2c->hw->base + I2C_CONSET_OFF) = BV(I2CON_STA);
104 static void i2c_hw_stop(I2c *i2c)
106 /* Set the stop bit */
107 HWREG(i2c->hw->base + I2C_CONSET_OFF) = BV(I2CON_STO);
108 /* Clear pending flags */
109 HWREG(i2c->hw->base + I2C_CONCLR_OFF) = BV(I2CON_STAC) | BV(I2CON_SIC) | BV(I2CON_AAC);
112 static void i2c_lpc2_put(I2c *i2c, uint8_t data)
114 HWREG(i2c->hw->base + I2C_DAT_OFF) = data;
115 HWREG(i2c->hw->base + I2C_CONCLR_OFF) = BV(I2CON_SIC);
119 uint32_t status = HWREG(i2c->hw->base + I2C_STAT_OFF);
122 /* Generate the stop if we finish to send all programmed bytes */
123 if (i2c->xfer_size == 1)
125 if (I2C_TEST_STOP(i2c->flags) == I2C_STOP)
129 if (status == I2C_STAT_DATA_NACK)
131 LOG_ERR("Data NACK\n");
132 i2c->errors |= I2C_NO_ACK;
135 else if ((status == I2C_STAT_ERROR) || (status == I2C_STAT_UNKNOW))
137 LOG_ERR("I2C error.\n");
138 i2c->errors |= I2C_ERR;
143 static uint8_t i2c_lpc2_get(I2c *i2c)
146 * Set ack bit if we want read more byte, otherwise
149 if (i2c->xfer_size > 1)
150 HWREG(i2c->hw->base + I2C_CONSET_OFF) = BV(I2CON_AA);
152 HWREG(i2c->hw->base + I2C_CONCLR_OFF) = BV(I2CON_AAC);
154 HWREG(i2c->hw->base + I2C_CONCLR_OFF) = BV(I2CON_SIC);
158 uint32_t status = HWREG(i2c->hw->base + I2C_STAT_OFF);
159 uint8_t data = (uint8_t)HWREG(i2c->hw->base + I2C_DAT_OFF);
161 if (status == I2C_STAT_RDATA_ACK)
165 else if (status == I2C_STAT_RDATA_NACK)
168 * last byte to read generate the stop if
171 if (I2C_TEST_STOP(i2c->flags) == I2C_STOP)
176 else if ((status == I2C_STAT_ERROR) || (status == I2C_STAT_UNKNOW))
178 LOG_ERR("I2C error.\n");
179 i2c->errors |= I2C_ERR;
188 static void i2c_lpc2_start(struct I2c *i2c, uint16_t slave_addr)
190 if (I2C_TEST_START(i2c->flags) == I2C_START_W)
192 ticks_t start = timer_clock();
197 uint8_t status = HWREG(i2c->hw->base + I2C_STAT_OFF);
199 /* Start status ok, set addres and the R/W bit */
200 if ((status == I2C_STAT_SEND) || (status == I2C_STAT_RESEND))
201 HWREG(i2c->hw->base + I2C_DAT_OFF) = slave_addr & ~I2C_READBIT;
203 /* Clear the start bit and clear the SI bit */
204 HWREG(i2c->hw->base + I2C_CONCLR_OFF) = BV(I2CON_SIC) | BV(I2CON_STAC);
206 if (status == I2C_STAT_SLAW_ACK)
209 if (status == I2C_STAT_ARB_LOST)
211 LOG_ERR("Arbitration lost\n");
212 i2c->errors |= I2C_ARB_LOST;
216 if (timer_clock() - start > ms_to_ticks(CONFIG_I2C_START_TIMEOUT))
218 LOG_ERR("Timeout on I2C START\n");
219 i2c->errors |= I2C_NO_ACK;
225 else if (I2C_TEST_START(i2c->flags) == I2C_START_R)
229 uint8_t status = HWREG(i2c->hw->base + I2C_STAT_OFF);
231 /* Start status ok, set addres and the R/W bit */
232 if ((status == I2C_STAT_SEND) || (status == I2C_STAT_RESEND))
233 HWREG(i2c->hw->base + I2C_DAT_OFF) = slave_addr | I2C_READBIT;
235 /* Clear the start bit and clear the SI bit */
236 HWREG(i2c->hw->base + I2C_CONCLR_OFF) = BV(I2CON_SIC) | BV(I2CON_STAC);
240 status = HWREG(i2c->hw->base + I2C_STAT_OFF);
242 if (status == I2C_STAT_SLAR_NACK)
244 LOG_ERR("SLAR NACK:%02x\n", status);
245 i2c->errors |= I2C_NO_ACK;
249 if (status == I2C_STAT_ARB_LOST)
251 LOG_ERR("Arbitration lost\n");
252 i2c->errors |= I2C_ARB_LOST;
262 static const I2cVT i2c_lpc_vt =
264 .start = i2c_lpc2_start,
271 struct I2cHardware i2c_lpc2_hw[] =
274 .base = I2C0_BASE_ADDR,
275 .pconp = BV(PCONP_PCI2C0),
276 .pinsel_port = PINSEL1_OFF,
277 .pinsel = I2C0_PINSEL,
278 .pinsel_mask = I2C0_PINSEL_MASK,
279 .pclksel = PCLKSEL0_OFF,
280 .pclk_mask = I2C0_PCLK_MASK,
281 .pclk_div = I2C0_PCLK_DIV8,
286 * Initialize I2C module.
288 void i2c_hw_init(I2c *i2c, int dev, uint32_t clock)
290 i2c->hw = &i2c_lpc2_hw[dev];
291 i2c->vt = &i2c_lpc_vt;
294 /* Enable I2C clock */
295 PCONP |= i2c->hw->pconp;
297 ASSERT(clock <= 400000);
299 HWREG(i2c->hw->base + I2C_CONCLR_OFF) = BV(I2CON_I2ENC) | BV(I2CON_STAC) | BV(I2CON_SIC) | BV(I2CON_AAC);
302 * Bit Frequency = Fplk / (I2C_I2SCLH + I2C_I2SCLL)
303 * value of I2SCLH and I2SCLL must be different
305 HWREG(SCB_BASE_ADDR + i2c->hw->pclksel) &= ~i2c->hw->pclk_mask;
306 HWREG(SCB_BASE_ADDR + i2c->hw->pclksel) |= i2c->hw->pclk_div;
308 HWREG(i2c->hw->base + I2C_SCLH_OFF) = (((CPU_FREQ / 8) / clock) / 2) + 1;
309 HWREG(i2c->hw->base + I2C_SCLL_OFF) = (((CPU_FREQ / 8) / clock) / 2);
311 ASSERT(HWREG(i2c->hw->base + I2C_SCLH_OFF) > 4);
312 ASSERT(HWREG(i2c->hw->base + I2C_SCLL_OFF) > 4);
314 /* Assign pins to SCL and SDA (P0_27, P0_28) */
315 HWREG(PINSEL_BASE_ADDR + i2c->hw->pinsel_port) &= ~i2c->hw->pinsel_mask;
316 HWREG(PINSEL_BASE_ADDR + i2c->hw->pinsel_port) |= i2c->hw->pinsel;
320 HWREG(i2c->hw->base + I2C_CONSET_OFF) = BV(I2CON_I2EN);