bertos/cpu/arm/drv/i2c_lpc2.c

   1 /**
   2  * \file
   3  * <!--
   4  * This file is part of BeRTOS.
   5  *
   6  * Bertos is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  19  *
  20  * As a special exception, you may use this file as part of a free software
  21  * library without restriction.  Specifically, if other files instantiate
  22  * templates or use macros or inline functions from this file, or you compile
  23  * this file and link it with other files to produce an executable, this
  24  * file does not by itself cause the resulting executable to be covered by
  25  * the GNU General Public License.  This exception does not however
  26  * invalidate any other reasons why the executable file might be covered by
  27  * the GNU General Public License.
  28  *
  29  * Copyright 2010 Develer S.r.l. (http://www.develer.com/)
  30  *
  31  * -->
  32  *
  33  * \brief Driver for the LPC23xx I2C (implementation)
  34  *
  35  */
  36
  37 #include "cfg/cfg_i2c.h"
  38
  39 #define LOG_LEVEL  I2C_LOG_LEVEL
  40 #define LOG_FORMAT I2C_LOG_FORMAT
  41
  42 #include <cfg/log.h>
  43
  44 #include <cfg/debug.h>
  45 #include <cfg/macros.h> // BV()
  46 #include <cfg/module.h>
  47
  48 #include <cpu/detect.h>
  49 #include <cpu/irq.h>
  50
  51 #include <drv/timer.h>
  52 #include <drv/i2c.h>
  53 #include <drv/vic_lpc2.h> /* vic_handler_t */
  54
  55 #include <io/lpc23xx.h>
  56
  57 #include <stdarg.h>
  58
  59
  60 struct I2cHardware
  61 {
  62         uint32_t base;
  63         uint32_t pconp;
  64         uint32_t pinsel_port;
  65         uint32_t pinsel;
  66         uint32_t pinsel_mask;
  67         uint32_t pclksel;
  68         uint32_t pclk_mask;
  69         uint32_t pclk_div;
  70 };
  71
  72 /*
  73  * Wait that SI bit is set.
  74  *
  75  * Note: this bit is set when the I2C state changes. However, entering
  76  * state F8 does not set SI since there is nothing for an interrupt service
  77  * routine to do in that case.
  78  */
  79 #define WAIT_SI(i2c) \
  80         do { \
  81                 ticks_t start = timer_clock(); \
  82                 while( !(HWREG(i2c->hw->base + I2C_CONSET_OFF) & BV(I2CON_SI)) ) \
  83                 { \
  84                         if (timer_clock() - start > ms_to_ticks(CONFIG_I2C_START_TIMEOUT)) \
  85                         { \
  86                                 LOG_ERR("Timeout SI assert\n"); \
  87                                 break; \
  88                         } \
  89                 } \
  90         } while (0)
  91
  92 static void i2c_hw_restart(I2c *i2c)
  93 {
  94         // Clear all pending flags.
  95         HWREG(i2c->hw->base + I2C_CONCLR_OFF) = BV(I2CON_STAC) | BV(I2CON_SIC) | BV(I2CON_AAC);
  96
  97         // Set start and ack bit.
  98         HWREG(i2c->hw->base + I2C_CONSET_OFF) = BV(I2CON_STA);
  99
 100         WAIT_SI(i2c);
 101 }
 102
 103
 104 static void i2c_hw_stop(I2c *i2c)
 105 {
 106         /* Set the stop bit */
 107         HWREG(i2c->hw->base + I2C_CONSET_OFF) = BV(I2CON_STO);
 108         /* Clear pending flags */
 109         HWREG(i2c->hw->base + I2C_CONCLR_OFF) = BV(I2CON_STAC) | BV(I2CON_SIC) | BV(I2CON_AAC);
 110 }
 111
 112 static void i2c_lpc2_put(I2c *i2c, uint8_t data)
 113 {
 114         HWREG(i2c->hw->base + I2C_DAT_OFF) = data;
 115         HWREG(i2c->hw->base + I2C_CONCLR_OFF) = BV(I2CON_SIC);
 116
 117         WAIT_SI(i2c);
 118
 119         uint32_t status = HWREG(i2c->hw->base + I2C_STAT_OFF);
 120
 121
 122         /* Generate the stop if we finish to send all programmed bytes */
 123         if (i2c->xfer_size == 1)
 124         {
 125                 if (I2C_TEST_STOP(i2c->flags) == I2C_STOP)
 126                         i2c_hw_stop(i2c);
 127         }
 128
 129         if (status == I2C_STAT_DATA_NACK)
 130         {
 131                 LOG_ERR("Data NACK\n");
 132                 i2c->errors |= I2C_NO_ACK;
 133                 i2c_hw_stop(i2c);
 134         }
 135         else if ((status == I2C_STAT_ERROR) || (status == I2C_STAT_UNKNOW))
 136         {
 137                 LOG_ERR("I2C error.\n");
 138                 i2c->errors |= I2C_ERR;
 139                 i2c_hw_stop(i2c);
 140         }
 141 }
 142
 143 static uint8_t i2c_lpc2_get(I2c *i2c)
 144 {
 145         /*
 146          * Set ack bit if we want read more byte, otherwise
 147          * we disable it
 148          */
 149         if (i2c->xfer_size > 1)
 150                 HWREG(i2c->hw->base + I2C_CONSET_OFF) = BV(I2CON_AA);
 151         else
 152                 HWREG(i2c->hw->base + I2C_CONCLR_OFF) = BV(I2CON_AAC);
 153
 154         HWREG(i2c->hw->base + I2C_CONCLR_OFF) = BV(I2CON_SIC);
 155
 156         WAIT_SI(i2c);
 157
 158         uint32_t status = HWREG(i2c->hw->base + I2C_STAT_OFF);
 159         uint8_t data = (uint8_t)HWREG(i2c->hw->base + I2C_DAT_OFF);
 160
 161         if (status == I2C_STAT_RDATA_ACK)
 162         {
 163                 return data;
 164         }
 165         else if (status == I2C_STAT_RDATA_NACK)
 166         {
 167                 /*
 168                  * last byte to read generate the stop if
 169                  * required
 170                  */
 171                 if (I2C_TEST_STOP(i2c->flags) == I2C_STOP)
 172                         i2c_hw_stop(i2c);
 173
 174                 return data;
 175         }
 176         else if ((status == I2C_STAT_ERROR) || (status == I2C_STAT_UNKNOW))
 177         {
 178                 LOG_ERR("I2C error.\n");
 179                 i2c->errors |= I2C_ERR;
 180                 i2c_hw_stop(i2c);
 181         }
 182
 183         return 0xFF;
 184 }
 185
 186 MOD_DEFINE(i2c);
 187
 188 static void i2c_lpc2_start(struct I2c *i2c, uint16_t slave_addr)
 189 {
 190         if (I2C_TEST_START(i2c->flags) == I2C_START_W)
 191         {
 192                 ticks_t start = timer_clock();
 193                 while (true)
 194                 {
 195                         i2c_hw_restart(i2c);
 196
 197                         uint8_t status = HWREG(i2c->hw->base + I2C_STAT_OFF);
 198
 199                         /* Start status ok, set addres and the R/W bit */
 200                         if ((status == I2C_STAT_SEND) || (status == I2C_STAT_RESEND))
 201                                 HWREG(i2c->hw->base + I2C_DAT_OFF) = slave_addr & ~I2C_READBIT;
 202
 203                         /* Clear the start bit and clear the SI bit */
 204                         HWREG(i2c->hw->base + I2C_CONCLR_OFF) = BV(I2CON_SIC) | BV(I2CON_STAC);
 205
 206                         if (status == I2C_STAT_SLAW_ACK)
 207                                 break;
 208
 209                         if (status == I2C_STAT_ARB_LOST)
 210                         {
 211                                 LOG_ERR("Arbitration lost\n");
 212                                 i2c->errors |= I2C_ARB_LOST;
 213                                 i2c_hw_stop(i2c);
 214                         }
 215
 216                         if (timer_clock() - start > ms_to_ticks(CONFIG_I2C_START_TIMEOUT))
 217                         {
 218                                 LOG_ERR("Timeout on I2C START\n");
 219                                 i2c->errors |= I2C_NO_ACK;
 220                                 i2c_hw_stop(i2c);
 221                                 break;
 222                         }
 223                 }
 224         }
 225         else if (I2C_TEST_START(i2c->flags) == I2C_START_R)
 226         {
 227                 i2c_hw_restart(i2c);
 228
 229                 uint8_t status = HWREG(i2c->hw->base + I2C_STAT_OFF);
 230
 231                 /* Start status ok, set addres and the R/W bit */
 232                 if ((status == I2C_STAT_SEND) || (status == I2C_STAT_RESEND))
 233                         HWREG(i2c->hw->base + I2C_DAT_OFF) = slave_addr | I2C_READBIT;
 234
 235                 /* Clear the start bit and clear the SI bit */
 236                 HWREG(i2c->hw->base + I2C_CONCLR_OFF) = BV(I2CON_SIC) | BV(I2CON_STAC);
 237
 238                 WAIT_SI(i2c);
 239
 240                 status = HWREG(i2c->hw->base + I2C_STAT_OFF);
 241
 242                 if (status == I2C_STAT_SLAR_NACK)
 243                 {
 244                         LOG_ERR("SLAR NACK:%02x\n", status);
 245                         i2c->errors |= I2C_NO_ACK;
 246                         i2c_hw_stop(i2c);
 247                 }
 248
 249                 if (status == I2C_STAT_ARB_LOST)
 250                 {
 251                         LOG_ERR("Arbitration lost\n");
 252                         i2c->errors |= I2C_ARB_LOST;
 253                         i2c_hw_stop(i2c);
 254                 }
 255         }
 256         else
 257         {
 258                 ASSERT(0);
 259         }
 260 }
 261
 262 static const I2cVT i2c_lpc_vt =
 263 {
 264         .start = i2c_lpc2_start,
 265         .get = i2c_lpc2_get,
 266         .put = i2c_lpc2_put,
 267         .send = i2c_swSend,
 268         .recv = i2c_swRecv,
 269 };
 270
 271 struct I2cHardware i2c_lpc2_hw[] =
 272 {
 273         { /* I2C0 */
 274                 .base = I2C0_BASE_ADDR,
 275                 .pconp = BV(PCONP_PCI2C0),
 276                 .pinsel_port = PINSEL1_OFF,
 277                 .pinsel = I2C0_PINSEL,
 278                 .pinsel_mask = I2C0_PINSEL_MASK,
 279                 .pclksel = PCLKSEL0_OFF,
 280                 .pclk_mask = I2C0_PCLK_MASK,
 281                 .pclk_div = I2C0_PCLK_DIV8,
 282         },
 283 };
 284
 285 /**
 286  * Initialize I2C module.
 287  */
 288 void i2c_hw_init(I2c *i2c, int dev, uint32_t clock)
 289 {
 290         i2c->hw = &i2c_lpc2_hw[dev];
 291         i2c->vt = &i2c_lpc_vt;
 292
 293
 294         /* Enable I2C clock */
 295         PCONP |= i2c->hw->pconp;
 296
 297         ASSERT(clock <= 400000);
 298
 299         HWREG(i2c->hw->base + I2C_CONCLR_OFF) = BV(I2CON_I2ENC) | BV(I2CON_STAC) | BV(I2CON_SIC) | BV(I2CON_AAC);
 300
 301         /*
 302          * Bit Frequency = Fplk / (I2C_I2SCLH + I2C_I2SCLL)
 303          * value of I2SCLH and I2SCLL must be different
 304          */
 305         HWREG(SCB_BASE_ADDR + i2c->hw->pclksel) &= ~i2c->hw->pclk_mask;
 306         HWREG(SCB_BASE_ADDR + i2c->hw->pclksel) |= i2c->hw->pclk_div;
 307
 308         HWREG(i2c->hw->base + I2C_SCLH_OFF) = (((CPU_FREQ / 8) / clock) / 2) + 1;
 309         HWREG(i2c->hw->base + I2C_SCLL_OFF) = (((CPU_FREQ / 8) / clock) / 2);
 310
 311         ASSERT(HWREG(i2c->hw->base + I2C_SCLH_OFF) > 4);
 312         ASSERT(HWREG(i2c->hw->base + I2C_SCLL_OFF) > 4);
 313
 314         /* Assign pins to SCL and SDA (P0_27, P0_28) */
 315         HWREG(PINSEL_BASE_ADDR + i2c->hw->pinsel_port) &= ~i2c->hw->pinsel_mask;
 316         HWREG(PINSEL_BASE_ADDR + i2c->hw->pinsel_port) |= i2c->hw->pinsel;
 317
 318
 319         // Enable I2C
 320         HWREG(i2c->hw->base + I2C_CONSET_OFF) = BV(I2CON_I2EN);
 321
 322         MOD_INIT(i2c);
 323 }