bertos/cpu/arm/drv/i2c_lpc2.c

   1 /**
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  20  * As a special exception, you may use this file as part of a free software
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  25  * the GNU General Public License.  This exception does not however
  26  * invalidate any other reasons why the executable file might be covered by
  27  * the GNU General Public License.
  28  *
  29  * Copyright 2010 Develer S.r.l. (http://www.develer.com/)
  30  *
  31  * -->
  32  *
  33  * \brief Driver for the LPC23xx I2C (implementation)
  34  *
  35  * \author Daniele Basile <asterix@develer.com>
  36  */
  37
  38 #include "cfg/cfg_i2c.h"
  39
  40 #define LOG_LEVEL  I2C_LOG_LEVEL
  41 #define LOG_FORMAT I2C_LOG_FORMAT
  42
  43 #include <cfg/log.h>
  44
  45 #include <cfg/debug.h>
  46 #include <cfg/macros.h> // BV()
  47 #include <cfg/module.h>
  48
  49 #include <cpu/detect.h>
  50 #include <cpu/irq.h>
  51
  52 #include <drv/timer.h>
  53 #include <drv/i2c.h>
  54
  55 #include <io/lpc23xx.h>
  56
  57 struct I2cHardware
  58 {
  59         uint32_t base;
  60         uint32_t pconp;
  61         uint32_t pinsel_port;
  62         uint32_t pinsel;
  63         uint32_t pinsel_mask;
  64         uint32_t pclksel;
  65         uint32_t pclk_mask;
  66         uint32_t pclk_div;
  67 };
  68
  69 /*
  70  * Wait that SI bit is set.
  71  *
  72  * Note: this bit is set when the I2C state changes. However, entering
  73  * state F8 does not set SI since there is nothing for an interrupt service
  74  * routine to do in that case.
  75  */
  76 #define WAIT_SI(i2c) \
  77         do { \
  78                 ticks_t start = timer_clock(); \
  79                 while( !(HWREG(i2c->hw->base + I2C_CONSET_OFF) & BV(I2CON_SI)) ) \
  80                 { \
  81                         if (timer_clock() - start > ms_to_ticks(CONFIG_I2C_START_TIMEOUT)) \
  82                         { \
  83                                 LOG_ERR("Timeout SI assert\n"); \
  84                                 LOG_ERR("[%08lx]\n", HWREG(i2c->hw->base + I2C_STAT_OFF)); \
  85                                 break; \
  86                         } \
  87                 } \
  88         } while (0)
  89
  90 static void i2c_hw_restart(I2c *i2c)
  91 {
  92         // Clear all pending flags.
  93         HWREG(i2c->hw->base + I2C_CONCLR_OFF) = BV(I2CON_STAC) | BV(I2CON_SIC) | BV(I2CON_AAC);
  94
  95         // Set start and ack bit.
  96         HWREG(i2c->hw->base + I2C_CONSET_OFF) = BV(I2CON_STA);
  97
  98         WAIT_SI(i2c);
  99 }
 100
 101
 102 static void i2c_hw_stop(I2c *i2c)
 103 {
 104         /* Set the stop bit */
 105         HWREG(i2c->hw->base + I2C_CONSET_OFF) = BV(I2CON_STO);
 106         /* Clear pending flags */
 107         HWREG(i2c->hw->base + I2C_CONCLR_OFF) = BV(I2CON_STAC) | BV(I2CON_SIC) | BV(I2CON_AAC);
 108 }
 109
 110 static void i2c_lpc2_putc(I2c *i2c, uint8_t data)
 111 {
 112         HWREG(i2c->hw->base + I2C_DAT_OFF) = data;
 113         HWREG(i2c->hw->base + I2C_CONCLR_OFF) = BV(I2CON_SIC);
 114
 115         WAIT_SI(i2c);
 116
 117         uint32_t status = HWREG(i2c->hw->base + I2C_STAT_OFF);
 118
 119
 120         /* Generate the stop if we finish to send all programmed bytes */
 121         if (i2c->xfer_size == 1)
 122         {
 123                 if (I2C_TEST_STOP(i2c->flags) == I2C_STOP)
 124                         i2c_hw_stop(i2c);
 125         }
 126
 127         if (status == I2C_STAT_DATA_NACK)
 128         {
 129                 LOG_ERR("Data NACK\n");
 130                 i2c->errors |= I2C_NO_ACK;
 131                 i2c_hw_stop(i2c);
 132         }
 133         else if ((status == I2C_STAT_ERROR) || (status == I2C_STAT_UNKNOW))
 134         {
 135                 LOG_ERR("I2C error.\n");
 136                 i2c->errors |= I2C_ERR;
 137                 i2c_hw_stop(i2c);
 138         }
 139 }
 140
 141 static uint8_t i2c_lpc2_getc(I2c *i2c)
 142 {
 143         /*
 144          * Set ack bit if we want read more byte, otherwise
 145          * we disable it
 146          */
 147         if (i2c->xfer_size > 1)
 148                 HWREG(i2c->hw->base + I2C_CONSET_OFF) = BV(I2CON_AA);
 149         else
 150                 HWREG(i2c->hw->base + I2C_CONCLR_OFF) = BV(I2CON_AAC);
 151
 152         HWREG(i2c->hw->base + I2C_CONCLR_OFF) = BV(I2CON_SIC);
 153
 154         WAIT_SI(i2c);
 155
 156         uint32_t status = HWREG(i2c->hw->base + I2C_STAT_OFF);
 157         uint8_t data = (uint8_t)HWREG(i2c->hw->base + I2C_DAT_OFF);
 158
 159         if (status == I2C_STAT_RDATA_ACK)
 160         {
 161                 return data;
 162         }
 163         else if (status == I2C_STAT_RDATA_NACK)
 164         {
 165                 /*
 166                  * last byte to read generate the stop if
 167                  * required
 168                  */
 169                 if (I2C_TEST_STOP(i2c->flags) == I2C_STOP)
 170                         i2c_hw_stop(i2c);
 171
 172                 return data;
 173         }
 174         else if ((status == I2C_STAT_ERROR) || (status == I2C_STAT_UNKNOW))
 175         {
 176                 LOG_ERR("I2C error.\n");
 177                 i2c->errors |= I2C_ERR;
 178                 i2c_hw_stop(i2c);
 179         }
 180
 181         return 0xFF;
 182 }
 183
 184 MOD_DEFINE(i2c);
 185
 186 static void i2c_lpc2_start(struct I2c *i2c, uint16_t slave_addr)
 187 {
 188         if (I2C_TEST_START(i2c->flags) == I2C_START_W)
 189         {
 190                 ticks_t start = timer_clock();
 191                 while (true)
 192                 {
 193                         i2c_hw_restart(i2c);
 194
 195                         uint8_t status = HWREG(i2c->hw->base + I2C_STAT_OFF);
 196
 197                         /* Start status ok, set addres and the R/W bit */
 198                         if ((status == I2C_STAT_SEND) || (status == I2C_STAT_RESEND))
 199                                 HWREG(i2c->hw->base + I2C_DAT_OFF) = slave_addr & ~I2C_READBIT;
 200
 201                         /* Clear the start bit and clear the SI bit */
 202                         HWREG(i2c->hw->base + I2C_CONCLR_OFF) = BV(I2CON_SIC) | BV(I2CON_STAC);
 203
 204                         if (status == I2C_STAT_SLAW_ACK)
 205                                 break;
 206
 207                         if (status == I2C_STAT_ARB_LOST)
 208                         {
 209                                 LOG_ERR("Arbitration lost\n");
 210                                 i2c->errors |= I2C_ARB_LOST;
 211                                 i2c_hw_stop(i2c);
 212                         }
 213
 214                         if (timer_clock() - start > ms_to_ticks(CONFIG_I2C_START_TIMEOUT))
 215                         {
 216                                 LOG_ERR("Timeout on I2C START\n");
 217                                 i2c->errors |= I2C_NO_ACK;
 218                                 i2c_hw_stop(i2c);
 219                                 break;
 220                         }
 221                 }
 222         }
 223         else if (I2C_TEST_START(i2c->flags) == I2C_START_R)
 224         {
 225                 i2c_hw_restart(i2c);
 226
 227                 uint8_t status = HWREG(i2c->hw->base + I2C_STAT_OFF);
 228
 229                 /* Start status ok, set addres and the R/W bit */
 230                 if ((status == I2C_STAT_SEND) || (status == I2C_STAT_RESEND))
 231                         HWREG(i2c->hw->base + I2C_DAT_OFF) = slave_addr | I2C_READBIT;
 232
 233                 /* Clear the start bit and clear the SI bit */
 234                 HWREG(i2c->hw->base + I2C_CONCLR_OFF) = BV(I2CON_SIC) | BV(I2CON_STAC);
 235
 236                 WAIT_SI(i2c);
 237
 238                 status = HWREG(i2c->hw->base + I2C_STAT_OFF);
 239
 240                 if (status == I2C_STAT_SLAR_NACK)
 241                 {
 242                         LOG_ERR("SLAR NACK:%02x\n", status);
 243                         i2c->errors |= I2C_NO_ACK;
 244                         i2c_hw_stop(i2c);
 245                 }
 246
 247                 if (status == I2C_STAT_ARB_LOST)
 248                 {
 249                         LOG_ERR("Arbitration lost\n");
 250                         i2c->errors |= I2C_ARB_LOST;
 251                         i2c_hw_stop(i2c);
 252                 }
 253         }
 254         else
 255         {
 256                 ASSERT(0);
 257         }
 258 }
 259
 260 static const I2cVT i2c_lpc_vt =
 261 {
 262         .start = i2c_lpc2_start,
 263         .getc = i2c_lpc2_getc,
 264         .putc = i2c_lpc2_putc,
 265         .write = i2c_genericWrite,
 266         .read = i2c_genericRead,
 267 };
 268
 269 static const struct I2cHardware i2c_lpc2_hw[] =
 270 {
 271         { /* I2C0 */
 272                 .base = I2C0_BASE_ADDR,
 273                 .pconp = BV(PCONP_PCI2C0),
 274                 .pinsel_port = PINSEL1_OFF,
 275                 .pinsel = I2C0_PINSEL,
 276                 .pinsel_mask = I2C0_PINSEL_MASK,
 277                 .pclksel = PCLKSEL0_OFF,
 278                 .pclk_mask = I2C0_PCLK_MASK,
 279                 .pclk_div = I2C0_PCLK_DIV8,
 280         },
 281         { /* I2C1 */
 282                 .base = I2C1_BASE_ADDR,
 283                 .pconp = BV(PCONP_PCI2C1),
 284                 .pinsel_port = PINSEL0_OFF,
 285                 .pinsel = I2C1_PINSEL,
 286                 .pinsel_mask = I2C1_PINSEL_MASK,
 287                 .pclksel = PCLKSEL1_OFF,
 288                 .pclk_mask = I2C1_PCLK_MASK,
 289                 .pclk_div = I2C1_PCLK_DIV8,
 290         },
 291         { /* I2C2 */
 292                 .base = I2C2_BASE_ADDR,
 293                 .pconp = BV(PCONP_PCI2C2),
 294                 .pinsel_port = PINSEL0_OFF,
 295                 .pinsel = I2C2_PINSEL,
 296                 .pinsel_mask = I2C2_PINSEL_MASK,
 297                 .pclksel = PCLKSEL1_OFF,
 298                 .pclk_mask = I2C2_PCLK_MASK,
 299                 .pclk_div = I2C2_PCLK_DIV8,
 300         },
 301 };
 302
 303 /**
 304  * Initialize I2C module.
 305  */
 306 void i2c_hw_init(I2c *i2c, int dev, uint32_t clock)
 307 {
 308         i2c->hw = &i2c_lpc2_hw[dev];
 309         i2c->vt = &i2c_lpc_vt;
 310
 311         /* Enable I2C clock */
 312         PCONP |= i2c->hw->pconp;
 313
 314         ASSERT(clock <= 400000);
 315
 316         HWREG(i2c->hw->base + I2C_CONCLR_OFF) = BV(I2CON_I2ENC) | BV(I2CON_STAC) | BV(I2CON_SIC) | BV(I2CON_AAC);
 317
 318         /*
 319          * Bit Frequency = Fplk / (I2C_I2SCLH + I2C_I2SCLL)
 320          * value of I2SCLH and I2SCLL must be different
 321          */
 322         HWREG(SCB_BASE_ADDR + i2c->hw->pclksel) &= ~i2c->hw->pclk_mask;
 323         HWREG(SCB_BASE_ADDR + i2c->hw->pclksel) |= i2c->hw->pclk_div;
 324
 325         HWREG(i2c->hw->base + I2C_SCLH_OFF) = (((CPU_FREQ / 8) / clock) / 2) + 1;
 326         HWREG(i2c->hw->base + I2C_SCLL_OFF) = (((CPU_FREQ / 8) / clock) / 2);
 327
 328         ASSERT(HWREG(i2c->hw->base + I2C_SCLH_OFF) > 4);
 329         ASSERT(HWREG(i2c->hw->base + I2C_SCLL_OFF) > 4);
 330
 331         /* Assign pins to SCL and SDA */
 332         HWREG(PINSEL_BASE_ADDR + i2c->hw->pinsel_port) &= ~i2c->hw->pinsel_mask;
 333         HWREG(PINSEL_BASE_ADDR + i2c->hw->pinsel_port) |= i2c->hw->pinsel;
 334
 335         // Enable I2C
 336         HWREG(i2c->hw->base + I2C_CONSET_OFF) = BV(I2CON_I2EN);
 337
 338         MOD_INIT(i2c);
 339 }