bertos/cpu/arm/drv/i2c_lpc2.c

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  25  * the GNU General Public License.  This exception does not however
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  27  * the GNU General Public License.
  28  *
  29  * Copyright 2010 Develer S.r.l. (http://www.develer.com/)
  30  *
  31  * -->
  32  *
  33  * \brief Driver for the LPC23xx I2C (implementation)
  34  *
  35  * \author Daniele Basile <asterix@develer.com>
  36  */
  37
  38 #include "cfg/cfg_i2c.h"
  39
  40 #define LOG_LEVEL  I2C_LOG_LEVEL
  41 #define LOG_FORMAT I2C_LOG_FORMAT
  42
  43 #include <cfg/log.h>
  44
  45 #include <cfg/debug.h>
  46 #include <cfg/macros.h> // BV()
  47
  48 #include <cpu/detect.h>
  49 #include <cpu/irq.h>
  50 #include <cpu/power.h>
  51
  52 #include <drv/timer.h>
  53 #include <drv/i2c.h>
  54
  55 #include <io/lpc23xx.h>
  56
  57 struct I2cHardware
  58 {
  59         uint32_t base;
  60         uint32_t pconp;
  61         uint32_t pinsel_port;
  62         uint32_t pinsel;
  63         uint32_t pinsel_mask;
  64         uint32_t pclksel;
  65         uint32_t pclk_mask;
  66         uint32_t pclk_div;
  67 };
  68
  69 /*
  70  * Wait that SI bit is set.
  71  *
  72  * Note: this bit is set when the I2C state changes. However, entering
  73  * state F8 does not set SI since there is nothing for an interrupt service
  74  * routine to do in that case.
  75  */
  76 #define WAIT_SI(i2c) \
  77                 do { \
  78                         ticks_t start = timer_clock(); \
  79                         while( !(HWREG(i2c->hw->base + I2C_CONSET_OFF) & BV(I2CON_SI)) ) \
  80                         { \
  81                                 if (timer_clock() - start > ms_to_ticks(CONFIG_I2C_START_TIMEOUT)) \
  82                                 { \
  83                                         LOG_ERR("Timeout SI assert\n"); \
  84                                         LOG_ERR("[%08lx]\n", HWREG(i2c->hw->base + I2C_STAT_OFF)); \
  85                                         break; \
  86                                 } \
  87                                 cpu_relax(); \
  88                         } \
  89         } while (0)
  90
  91 static void i2c_hw_restart(I2c *i2c)
  92 {
  93         // Clear all pending flags.
  94         HWREG(i2c->hw->base + I2C_CONCLR_OFF) = BV(I2CON_STAC) | BV(I2CON_SIC) | BV(I2CON_AAC);
  95
  96         // Set start and ack bit.
  97         HWREG(i2c->hw->base + I2C_CONSET_OFF) = BV(I2CON_STA);
  98
  99         WAIT_SI(i2c);
 100 }
 101
 102
 103 static void i2c_hw_stop(I2c *i2c)
 104 {
 105         /* Set the stop bit */
 106         HWREG(i2c->hw->base + I2C_CONSET_OFF) = BV(I2CON_STO);
 107         /* Clear pending flags */
 108         HWREG(i2c->hw->base + I2C_CONCLR_OFF) = BV(I2CON_STAC) | BV(I2CON_SIC) | BV(I2CON_AAC);
 109 }
 110
 111 static void i2c_lpc2_putc(I2c *i2c, uint8_t data)
 112 {
 113         HWREG(i2c->hw->base + I2C_DAT_OFF) = data;
 114         HWREG(i2c->hw->base + I2C_CONCLR_OFF) = BV(I2CON_SIC);
 115
 116         WAIT_SI(i2c);
 117
 118         uint32_t status = HWREG(i2c->hw->base + I2C_STAT_OFF);
 119
 120
 121         /* Generate the stop if we finish to send all programmed bytes */
 122         if (i2c->xfer_size == 1)
 123         {
 124                 if (I2C_TEST_STOP(i2c->flags) == I2C_STOP)
 125                         i2c_hw_stop(i2c);
 126         }
 127
 128         if (status == I2C_STAT_DATA_NACK)
 129         {
 130                 LOG_ERR("Data NACK\n");
 131                 i2c->errors |= I2C_NO_ACK;
 132                 i2c_hw_stop(i2c);
 133         }
 134         else if ((status == I2C_STAT_ERROR) || (status == I2C_STAT_UNKNOW))
 135         {
 136                 LOG_ERR("I2C error.\n");
 137                 i2c->errors |= I2C_ERR;
 138                 i2c_hw_stop(i2c);
 139         }
 140 }
 141
 142 static uint8_t i2c_lpc2_getc(I2c *i2c)
 143 {
 144         /*
 145          * Set ack bit if we want read more byte, otherwise
 146          * we disable it
 147          */
 148         if (i2c->xfer_size > 1)
 149                 HWREG(i2c->hw->base + I2C_CONSET_OFF) = BV(I2CON_AA);
 150         else
 151                 HWREG(i2c->hw->base + I2C_CONCLR_OFF) = BV(I2CON_AAC);
 152
 153         HWREG(i2c->hw->base + I2C_CONCLR_OFF) = BV(I2CON_SIC);
 154
 155         WAIT_SI(i2c);
 156
 157         uint32_t status = HWREG(i2c->hw->base + I2C_STAT_OFF);
 158         uint8_t data = (uint8_t)HWREG(i2c->hw->base + I2C_DAT_OFF);
 159
 160         if (status == I2C_STAT_RDATA_ACK)
 161         {
 162                 return data;
 163         }
 164         else if (status == I2C_STAT_RDATA_NACK)
 165         {
 166                 /*
 167                  * last byte to read generate the stop if
 168                  * required
 169                  */
 170                 if (I2C_TEST_STOP(i2c->flags) == I2C_STOP)
 171                         i2c_hw_stop(i2c);
 172
 173                 return data;
 174         }
 175         else if ((status == I2C_STAT_ERROR) || (status == I2C_STAT_UNKNOW))
 176         {
 177                 LOG_ERR("I2C error.\n");
 178                 i2c->errors |= I2C_ERR;
 179                 i2c_hw_stop(i2c);
 180         }
 181
 182         return 0xFF;
 183 }
 184
 185 static void i2c_lpc2_start(struct I2c *i2c, uint16_t slave_addr)
 186 {
 187         if (I2C_TEST_START(i2c->flags) == I2C_START_W)
 188         {
 189                 ticks_t start = timer_clock();
 190                 while (true)
 191                 {
 192                         i2c_hw_restart(i2c);
 193
 194                         uint8_t status = HWREG(i2c->hw->base + I2C_STAT_OFF);
 195
 196                         /* Start status ok, set addres and the R/W bit */
 197                         if ((status == I2C_STAT_SEND) || (status == I2C_STAT_RESEND))
 198                                 HWREG(i2c->hw->base + I2C_DAT_OFF) = slave_addr & ~I2C_READBIT;
 199
 200                         /* Clear the start bit and clear the SI bit */
 201                         HWREG(i2c->hw->base + I2C_CONCLR_OFF) = BV(I2CON_SIC) | BV(I2CON_STAC);
 202
 203                         if (status == I2C_STAT_SLAW_ACK)
 204                                 break;
 205
 206                         if (status == I2C_STAT_ARB_LOST)
 207                         {
 208                                 LOG_ERR("Arbitration lost\n");
 209                                 i2c->errors |= I2C_ARB_LOST;
 210                                 i2c_hw_stop(i2c);
 211                         }
 212
 213                         if (timer_clock() - start > ms_to_ticks(CONFIG_I2C_START_TIMEOUT))
 214                         {
 215                                 LOG_ERR("Timeout on I2C START\n");
 216                                 i2c->errors |= I2C_NO_ACK;
 217                                 i2c_hw_stop(i2c);
 218                                 break;
 219                         }
 220                 }
 221         }
 222         else if (I2C_TEST_START(i2c->flags) == I2C_START_R)
 223         {
 224                 i2c_hw_restart(i2c);
 225
 226                 uint8_t status = HWREG(i2c->hw->base + I2C_STAT_OFF);
 227
 228                 /* Start status ok, set addres and the R/W bit */
 229                 if ((status == I2C_STAT_SEND) || (status == I2C_STAT_RESEND))
 230                         HWREG(i2c->hw->base + I2C_DAT_OFF) = slave_addr | I2C_READBIT;
 231
 232                 /* Clear the start bit and clear the SI bit */
 233                 HWREG(i2c->hw->base + I2C_CONCLR_OFF) = BV(I2CON_SIC) | BV(I2CON_STAC);
 234
 235                 WAIT_SI(i2c);
 236
 237                 status = HWREG(i2c->hw->base + I2C_STAT_OFF);
 238
 239                 if (status == I2C_STAT_SLAR_NACK)
 240                 {
 241                         LOG_ERR("SLAR NACK:%02x\n", status);
 242                         i2c->errors |= I2C_NO_ACK;
 243                         i2c_hw_stop(i2c);
 244                 }
 245
 246                 if (status == I2C_STAT_ARB_LOST)
 247                 {
 248                         LOG_ERR("Arbitration lost\n");
 249                         i2c->errors |= I2C_ARB_LOST;
 250                         i2c_hw_stop(i2c);
 251                 }
 252         }
 253         else
 254         {
 255                 ASSERT(0);
 256         }
 257 }
 258
 259 static const I2cVT i2c_lpc_vt =
 260 {
 261         .start = i2c_lpc2_start,
 262         .getc = i2c_lpc2_getc,
 263         .putc = i2c_lpc2_putc,
 264         .write = i2c_genericWrite,
 265         .read = i2c_genericRead,
 266 };
 267
 268 static struct I2cHardware i2c_lpc2_hw[] =
 269 {
 270         { /* I2C0 */
 271                 .base = I2C0_BASE_ADDR,
 272                 .pconp = BV(PCONP_PCI2C0),
 273                 .pinsel_port = PINSEL1_OFF,
 274                 .pinsel = I2C0_PINSEL,
 275                 .pinsel_mask = I2C0_PINSEL_MASK,
 276                 .pclksel = PCLKSEL0_OFF,
 277                 .pclk_mask = I2C0_PCLK_MASK,
 278                 .pclk_div = I2C0_PCLK_DIV8,
 279         },
 280         { /* I2C1 */
 281                 .base = I2C1_BASE_ADDR,
 282                 .pconp = BV(PCONP_PCI2C1),
 283                 .pinsel_port = PINSEL0_OFF,
 284                 .pinsel = I2C1_PINSEL,
 285                 .pinsel_mask = I2C1_PINSEL_MASK,
 286                 .pclksel = PCLKSEL1_OFF,
 287                 .pclk_mask = I2C1_PCLK_MASK,
 288                 .pclk_div = I2C1_PCLK_DIV8,
 289         },
 290         { /* I2C2 */
 291                 .base = I2C2_BASE_ADDR,
 292                 .pconp = BV(PCONP_PCI2C2),
 293                 .pinsel_port = PINSEL0_OFF,
 294                 .pinsel = I2C2_PINSEL,
 295                 .pinsel_mask = I2C2_PINSEL_MASK,
 296                 .pclksel = PCLKSEL1_OFF,
 297                 .pclk_mask = I2C2_PCLK_MASK,
 298                 .pclk_div = I2C2_PCLK_DIV8,
 299         },
 300 };
 301
 302 /**
 303  * Initialize I2C module.
 304  */
 305 void i2c_hw_init(I2c *i2c, int dev, uint32_t clock)
 306 {
 307         i2c->hw = &i2c_lpc2_hw[dev];
 308         i2c->vt = &i2c_lpc_vt;
 309
 310         /* Enable I2C clock */
 311         PCONP |= i2c->hw->pconp;
 312
 313         ASSERT(clock <= 400000);
 314
 315         HWREG(i2c->hw->base + I2C_CONCLR_OFF) = BV(I2CON_I2ENC) | BV(I2CON_STAC) | BV(I2CON_SIC) | BV(I2CON_AAC);
 316
 317         /*
 318          * Bit Frequency = Fplk / (I2C_I2SCLH + I2C_I2SCLL)
 319          * value of I2SCLH and I2SCLL must be different
 320          */
 321         HWREG(SCB_BASE_ADDR + i2c->hw->pclksel) &= ~i2c->hw->pclk_mask;
 322         HWREG(SCB_BASE_ADDR + i2c->hw->pclksel) |= i2c->hw->pclk_div;
 323
 324         HWREG(i2c->hw->base + I2C_SCLH_OFF) = (((CPU_FREQ / 8) / clock) / 2) + 1;
 325         HWREG(i2c->hw->base + I2C_SCLL_OFF) = (((CPU_FREQ / 8) / clock) / 2);
 326
 327         ASSERT(HWREG(i2c->hw->base + I2C_SCLH_OFF) > 4);
 328         ASSERT(HWREG(i2c->hw->base + I2C_SCLL_OFF) > 4);
 329
 330         /* Assign pins to SCL and SDA */
 331         HWREG(PINSEL_BASE_ADDR + i2c->hw->pinsel_port) &= ~i2c->hw->pinsel_mask;
 332         HWREG(PINSEL_BASE_ADDR + i2c->hw->pinsel_port) |= i2c->hw->pinsel;
 333
 334         // Enable I2C
 335         HWREG(i2c->hw->base + I2C_CONSET_OFF) = BV(I2CON_I2EN);
 336 }