4 * This file is part of BeRTOS.
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13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
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18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 * As a special exception, you may use this file as part of a free software
21 * library without restriction. Specifically, if other files instantiate
22 * templates or use macros or inline functions from this file, or you compile
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24 * file does not by itself cause the resulting executable to be covered by
25 * the GNU General Public License. This exception does not however
26 * invalidate any other reasons why the executable file might be covered by
27 * the GNU General Public License.
29 * Copyright 2008 Develer S.r.l. (http://www.develer.com/)
34 * \brief PWM hardware-specific implementation
38 * \author Daniele Basile <asterix@develer.com>
44 #include <cfg/macros.h>
45 #include <cfg/debug.h>
51 * Register structure for pwm driver.
52 * This array content all data and register pointer
53 * to manage pwm peripheral device.
55 static PwmChannel pwm_map[PWM_CNT] =
60 .mode_reg = &PWM_CMR0,
61 .duty_reg = &PWM_CDTY0,
62 .period_reg = &PWM_CPRD0,
63 .update_reg = &PWM_CUPD0,
68 .mode_reg = &PWM_CMR1,
69 .duty_reg = &PWM_CDTY1,
70 .period_reg = &PWM_CPRD1,
71 .update_reg = &PWM_CUPD1,
76 .mode_reg = &PWM_CMR2,
77 .duty_reg = &PWM_CDTY2,
78 .period_reg = &PWM_CPRD2,
79 .update_reg = &PWM_CUPD2,
84 .mode_reg = &PWM_CMR3,
85 .duty_reg = &PWM_CDTY3,
86 .period_reg = &PWM_CPRD3,
87 .update_reg = &PWM_CUPD3,
93 * Get preiod from select channel
97 pwm_period_t pwm_hw_getPeriod(PwmDev dev)
99 return *pwm_map[dev].period_reg;
103 * Set pwm waveform frequecy.
107 void pwm_hw_setFrequency(PwmDev dev, uint32_t freq)
111 for(int i = 0; i <= PWM_HW_MAX_PRESCALER_STEP; i++)
113 period = CLOCK_FREQ / (BV(i) * freq);
114 // TRACEMSG("period[%d], prescale[%d]", period, i);
115 if ((period < PWM_HW_MAX_PERIOD) && (period != 0))
117 //Clean previous channel prescaler, and set new
118 *pwm_map[dev].mode_reg &= ~PWM_CPRE_MCK_MASK;
119 *pwm_map[dev].mode_reg |= i;
121 *pwm_map[dev].period_reg = period;
128 // TRACEMSG("PWM ch[%d] period[%d]", dev, period);
132 * Set pwm duty cycle.
134 * \a duty value 0 - 2^16
136 void pwm_hw_setDutyUnlock(PwmDev dev, uint16_t duty)
138 ASSERT(duty <= (uint16_t)*pwm_map[dev].period_reg);
142 * WARNING: is forbidden to write 0 to duty cycle value,
143 * and so for duty = 0 we must enable PIO and clear output!
147 PWM_PIO_PER = pwm_map[dev].pwm_pin;
148 pwm_map[dev].duty_zero = true;
153 PWM_PIO_PDR = pwm_map[dev].pwm_pin;
154 *pwm_map[dev].update_reg = duty;
155 pwm_map[dev].duty_zero = false;
158 // TRACEMSG("PWM ch[%d] duty[%d], period[%ld]", dev, duty, *pwm_map[dev].period_reg);
163 * Enable select pwm channel
165 void pwm_hw_enable(PwmDev dev)
167 if (!pwm_map[dev].duty_zero)
168 PWM_PIO_PDR = pwm_map[dev].pwm_pin;
172 * Disable select pwm channel
174 void pwm_hw_disable(PwmDev dev)
176 PWM_PIO_PER = pwm_map[dev].pwm_pin;
183 void pwm_hw_init(void)
188 * WARNING: is forbidden to write 0 to duty cycle value,
189 * and so for duty = 0 we must enable PIO and clear output!
190 * - clear PIO outputs
191 * - enable PIO outputs
192 * - Disable PIO and enable PWM functions
195 PWM_PIO_CODR = BV(PWM0) | BV(PWM1) | BV(PWM2) | BV(PWM3);
196 PWM_PIO_OER = BV(PWM0) | BV(PWM1) | BV(PWM2) | BV(PWM3);
197 PWM_PIO_PDR = BV(PWM0) | BV(PWM1) | BV(PWM2) | BV(PWM3);
198 PWM_PIO_ABSR = BV(PWM0) | BV(PWM1) | BV(PWM2) | BV(PWM3);
199 PMC_PCER |= BV(PWMC_ID);
201 /* Disable all channels. */
202 PWM_DIS = 0xFFFFFFFF;
203 /* Disable prescalers A and B */
208 * - set period alidned to left
209 * - set output waveform to low level
210 * - allow duty cycle modify at next period event
212 for (int ch = 0; ch < PWM_CNT; ch++)
213 *pwm_map[ch].mode_reg = 0;