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29 * Copyright 2008 Develer S.r.l. (http://www.develer.com/)
30 * All Rights Reserved.
33 * \brief Low level test for stepper driver interface implementation.
37 * \author Daniele Basile <asterix@develer.com>
40 #include "stepper_at91.h"
42 #include "cfg/cfg_stepper.h"
43 #include <cfg/macros.h>
44 #include <cfg/debug.h>
46 #include <cpu/types.h>
52 #warning FIXME:This test is incomplete.. you MUST review..
55 static void stepper_test_irq_schedule(struct Stepper *motor, stepper_time_t delay)
57 stepper_tc_doPulse(motor->timer);
58 stepper_tc_setDelay(motor->timer, delay);
61 static void stepper_test_irq(struct Stepper *motor)
64 stepper_test_irq_schedule(motor, 300);
67 * Test a timer couter driver
69 void stepper_timer_test_prestepper(struct Stepper *local_motor, struct StepperConfig *local_cfg, int index)
71 local_cfg->pulse = 300;
73 local_motor->cfg = local_cfg;
74 stepper_tc_init(index, &stepper_test_irq, local_motor);
75 stepper_tc_irq_enable(local_motor->timer);
81 uint16_t periodo_st0 = 100;
82 uint16_t periodo_st1 = 233;
84 static void tc_irq(void) __attribute__ ((interrupt));
85 static void tc_irq(void)
87 uint32_t status_reg = TC2_SR & TC2_IMR;
89 if (status_reg & BV(TC_CPAS))
91 TC2_CMR &= ~TC_ACPA_MASK;
94 TC2_CMR |= TC_ACPA_CLEAR_OUTPUT;
95 TC2_RA += periodo_st0;
99 TC2_CMR |= TC_ACPA_SET_OUTPUT;
100 TC2_RA += periodo_st1;
104 if (status_reg & BV(TC_CPBS))
106 TC2_CMR &= ~TC_BCPB_MASK ;
109 TC2_CMR |= TC_BCPB_CLEAR_OUTPUT;
110 TC2_RB += periodo_st0;
114 TC2_CMR |= TC_BCPB_SET_OUTPUT;
115 TC2_RB += periodo_st1;
119 /* Inform hw that we have served the IRQ */
124 * Test a timer couter hardware
126 void stepper_timer_test_brute(void)
128 PIOA_PDR |= BV(26) | BV(27);
129 PIOA_BSR |= BV(26) | BV(27);
132 PMC_PCER |= BV(TC2_ID);// | BV(TC1_ID) | BV(TC2_ID);
135 TC_BMR |= TC_NONEXC2;
137 // Select waveform mode
138 TC2_CMR = BV(TC_WAVE);
140 TC2_CMR |= TC_EEVT_XC2;
141 TC2_CMR |= TC_WAVSEL_UP;
142 TC2_CMR |= TC_CLKS_MCK8;
144 //Set waveform on TIOA and TIOB
145 TC2_CMR |= TC_ACPA_SET_OUTPUT;
146 TC2_CMR |= TC_BCPB_SET_OUTPUT;
149 //Reset all comp_reg register
154 IRQ_SAVE_DISABLE(flags);
156 /* Set the vector. */
157 AIC_SVR(TC2_ID) = tc_irq;
158 /* Initialize to edge triggered with defined priority. */
159 AIC_SMR(TC2_ID) = AIC_SRCTYPE_INT_EDGE_TRIGGERED;
160 /* Enable the USART IRQ */
161 AIC_IECR = BV(TC2_ID);
165 // Disable all interrupt
166 TC2_IDR = 0xFFFFFFFF;
168 //Enable interrupt on RA, RB
169 TC2_IER = BV(TC_CPAS) | BV(TC_CPBS);
171 //Enable timer and trig it
172 TC2_CCR = BV(TC_CLKEN) | BV(TC_SWTRG);