4 * This file is part of BeRTOS.
6 * Bertos is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 * As a special exception, you may use this file as part of a free software
21 * library without restriction. Specifically, if other files instantiate
22 * templates or use macros or inline functions from this file, or you compile
23 * this file and link it with other files to produce an executable, this
24 * file does not by itself cause the resulting executable to be covered by
25 * the GNU General Public License. This exception does not however
26 * invalidate any other reasons why the executable file might be covered by
27 * the GNU General Public License.
29 * Copyright 2010 Develer S.r.l. (http://www.develer.com/)
33 * \author Francesco Sacchi <batt@develer.com>
35 * \brief ARM7TDMI CRT.
38 #define ARM_MODE_USR 0x10
39 #define ARM_MODE_FIQ 0x11
40 #define ARM_MODE_IRQ 0x12
41 #define ARM_MODE_SVC 0x13
42 #define ARM_MODE_ABORT 0x17
43 #define ARM_MODE_UNDEF 0x1B
44 #define ARM_MODE_SYS 0x1F
51 * Hardware initialization.
53 .section .init, "ax", %progbits
58 ldr r0, =__stack_fiq_end
59 msr CPSR_c, #ARM_MODE_FIQ | IRQ_BIT | FIQ_BIT
61 ldr r0, =__stack_irq_end
62 msr CPSR_c, #ARM_MODE_IRQ | IRQ_BIT | FIQ_BIT
64 ldr r0, =__stack_abt_end
65 msr CPSR_c, #ARM_MODE_ABORT | IRQ_BIT | FIQ_BIT
67 ldr r0, =__stack_und_end
68 msr CPSR_c, #ARM_MODE_UNDEF | IRQ_BIT | FIQ_BIT
70 ldr r0, =__stack_sys_end
71 msr CPSR_c, #ARM_MODE_SYS | IRQ_BIT | FIQ_BIT
75 * Early hw initialization #1.
76 * Called before clearing .bss and
77 * loading .data segments.
94 * Relocate .data section (Copy from ROM to RAM).
107 * Early hw initialization #2.
108 * Called after setting up .bss and .data segments
109 * but before calling main().
137 .set __init1, __dummy_init
139 .set __init2, __dummy_init
144 .set __undef, __xcpt_dummy_undef
146 .set __swi, __xcpt_dummy_swi
147 .weak __prefetch_abort
148 .set __prefetch_abort, __xcpt_dummy_pref
150 .set __data_abort, __xcpt_dummy_dab