4 * This file is part of BeRTOS.
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13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
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18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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21 * library without restriction. Specifically, if other files instantiate
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29 * Copyright 2010 Develer S.r.l. (http://www.develer.com/)
33 * \author Francesco Sacchi <batt@develer.com>
35 * \brief Atmel AT91SAM interrupt vectors.
38 #include "cfg/cfg_arch.h"
39 #if defined(ARCH_NIGHTTEST) && (ARCH & ARCH_NIGHTTEST)
40 /* Avoid errors during nigthly test */
41 #define __vectors __vectors_at91
46 * Section 0: Vector table and reset entry.
48 .section .vectors,"ax",%progbits
52 ldr pc, _init /* Reset */
53 ldr pc, _undef /* Undefined instruction */
54 ldr pc, _swi /* Software interrupt */
55 ldr pc, _prefetch_abort /* Prefetch abort */
56 ldr pc, _data_abort /* Data abort */
57 .word 0 /* Reserved */
60 * On IRQ the PC will be loaded from AIC_IVR, which
61 * provides the address previously set in AIC_SVR.
62 * The interrupt routine will be called in ARM_MODE_IRQ
63 * with IRQ disabled and FIQ unchanged.
65 ldr pc, [pc, #-0xF20] /* Interrupt request, auto vectoring. */
66 ldr pc, [pc, #-0xF20] /* Fast interrupt request, auto vectoring. */
75 .word __prefetch_abort