4 * This file is part of BeRTOS.
6 * Bertos is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 * As a special exception, you may use this file as part of a free software
21 * library without restriction. Specifically, if other files instantiate
22 * templates or use macros or inline functions from this file, or you compile
23 * this file and link it with other files to produce an executable, this
24 * file does not by itself cause the resulting executable to be covered by
25 * the GNU General Public License. This exception does not however
26 * invalidate any other reasons why the executable file might be covered by
27 * the GNU General Public License.
29 * Copyright 2003, 2004, 2005, 2006, 2007 Develer S.r.l. (http://www.develer.com/)
30 * Copyright 2000, 2001, 2002 Bernie Innocenti <bernie@codewiz.org>
34 * \brief AVR debug support (implementation).
36 * \author Bernie Innocenti <bernie@codewiz.org>
37 * \author Stefano Fedrigo <aleph@develer.com>
38 * \author Francesco Sacchi <batt@develer.com>
41 #include <hw/hw_cpufreq.h> /* for CPU_FREQ */
42 #include "hw/hw_ser.h" /* Required for bus macros overrides */
44 #include "cfg/cfg_debug.h"
45 #include <cfg/macros.h> /* for BV(), DIV_ROUND */
47 #include <cpu/types.h>
52 #if CONFIG_KDEBUG_PORT == 0
55 * Support for special bus policies or external transceivers
56 * on UART0 (to be overridden in "hw/hw_ser.h").
58 * HACK: if we don't set TXEN, kdbg disables the transmitter
59 * after each output statement until the serial driver
60 * is initialized. These glitches confuse the debug
61 * terminal that ends up printing some trash.
63 #ifndef KDBG_UART0_BUS_INIT
64 #define KDBG_UART0_BUS_INIT do { \
68 #ifndef KDBG_UART0_BUS_RX
69 #define KDBG_UART0_BUS_RX do {} while (0)
71 #ifndef KDBG_UART0_BUS_TX
72 #define KDBG_UART0_BUS_TX do {} while (0)
75 #if CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA168 || CPU_AVR_ATMEGA328P
79 #elif CPU_AVR_ATMEGA8 || CPU_AVR_ATMEGA32
91 #define KDBG_WAIT_READY() do { loop_until_bit_is_set(USR, UDRE0); } while(0)
92 #define KDBG_WAIT_TXDONE() do { loop_until_bit_is_set(USR, TXC0); } while(0)
95 * We must clear the TXC flag before sending a new character to allow
96 * KDBG_WAIT_TXDONE() to work properly.
98 * BUG: if KDBG_WRITE_CHAR() is called after the TXC flag is set by hardware,
99 * a new TXC could be generated after we've cleared it and before the new
100 * character is written to UDR. On a 485 bus, the transceiver will be put
101 * in RX mode while still transmitting the last char.
103 #define KDBG_WRITE_CHAR(c) do { USR |= BV(TXC0); UDR = (c); } while(0)
105 #define KDBG_MASK_IRQ(old) do { \
108 UCR &= ~(BV(TXCIE0) | BV(UDRIE0)); \
112 #define KDBG_RESTORE_IRQ(old) do { \
113 KDBG_WAIT_TXDONE(); \
118 typedef uint8_t kdbg_irqsave_t;
120 #elif CONFIG_KDEBUG_PORT == 1
123 * Support for special bus policies or external transceivers
124 * on UART1 (to be overridden in "hw/hw_ser.h").
126 * HACK: if we don't set TXEN, kdbg disables the transmitter
127 * after each output statement until the serial driver
128 * is initialized. These glitches confuse the debug
129 * terminal that ends up printing some trash.
131 #ifndef KDBG_UART1_BUS_INIT
132 #define KDBG_UART1_BUS_INIT do { \
133 UCSR1B = BV(TXEN1); \
136 #ifndef KDBG_UART1_BUS_RX
137 #define KDBG_UART1_BUS_RX do {} while (0)
139 #ifndef KDBG_UART1_BUS_TX
140 #define KDBG_UART1_BUS_TX do {} while (0)
143 #define KDBG_WAIT_READY() do { loop_until_bit_is_set(UCSR1A, UDRE1); } while(0)
144 #define KDBG_WAIT_TXDONE() do { loop_until_bit_is_set(UCSR1A, TXC1); } while(0)
145 #define KDBG_WRITE_CHAR(c) do { UCSR1A |= BV(TXC1); UDR1 = (c); } while(0)
147 #define KDBG_MASK_IRQ(old) do { \
149 UCSR1B |= BV(TXEN1); \
150 UCSR1B &= ~(BV(TXCIE1) | BV(UDRIE1)); \
154 #define KDBG_RESTORE_IRQ(old) do { \
155 KDBG_WAIT_TXDONE(); \
160 typedef uint8_t kdbg_irqsave_t;
163 * Special debug port for BitBanged Serial see below for details...
165 #elif CONFIG_KDEBUG_PORT == 666
166 #include "hw/hw_ser.h"
167 #define KDBG_WAIT_READY() do { /*nop*/ } while(0)
168 #define KDBG_WRITE_CHAR(c) _kdebug_bitbang_putchar((c))
169 #define KDBG_MASK_IRQ(old) do { IRQ_SAVE_DISABLE((old)); } while(0)
170 #define KDBG_RESTORE_IRQ(old) do { IRQ_RESTORE((old)); } while(0)
171 typedef cpu_flags_t kdbg_irqsave_t;
173 #define KDBG_DELAY (((CPU_FREQ + CONFIG_KDEBUG_BAUDRATE / 2) / CONFIG_KDEBUG_BAUDRATE) + 7) / 14
175 static void _kdebug_bitbang_delay(void)
179 for (i = 0; i < KDBG_DELAY; i++)
190 * Putchar for BITBANG serial debug console.
191 * Sometimes, we can't permit to use a whole serial for debugging purpose.
192 * Since debug console is in output only it is useful to use a single generic I/O pin for debug.
193 * This is achieved by this simple function, that shift out the data like a UART, but
195 * The only requirement is that SER_BITBANG_* macros will be defined somewhere (usually hw_ser.h)
196 * \note All interrupts are disabled during debug prints!
198 static void _kdebug_bitbang_putchar(char c)
211 for (i = 0; i < 10; i++)
217 _kdebug_bitbang_delay();
222 #error CONFIG_KDEBUG_PORT should be either 0, 1 or 666
226 INLINE void kdbg_hw_init(void)
228 #if CONFIG_KDEBUG_PORT == 666
230 #else /* CONFIG_KDEBUG_PORT != 666 */
231 /* Compute the baud rate */
232 uint16_t period = DIV_ROUND(CPU_FREQ / 16UL, CONFIG_KDEBUG_BAUDRATE) - 1;
234 #if (CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA1281)
235 #if CONFIG_KDEBUG_PORT == 0
236 UBRR0H = (uint8_t)(period>>8);
237 UBRR0L = (uint8_t)period;
239 #elif CONFIG_KDEBUG_PORT == 1
240 UBRR1H = (uint8_t)(period>>8);
241 UBRR1L = (uint8_t)period;
244 #error CONFIG_KDEBUG_PORT must be either 0 or 1
247 #elif CPU_AVR_ATMEGA168 || CPU_AVR_ATMEGA328P
248 #if CONFIG_KDEBUG_PORT == 0
249 UBRR0H = (uint8_t)(period>>8);
250 UBRR0L = (uint8_t)period;
253 #error Only CONFIG_KDEBUG_PORT 0 is supported for this cpu
256 #elif CPU_AVR_ATMEGA8 || CPU_AVR_ATMEGA32
257 #if CONFIG_KDEBUG_PORT == 0
258 UBRRH = (uint8_t)(period>>8);
259 UBRRL = (uint8_t)period;
262 #error Only CONFIG_KDEBUG_PORT 0 is supported for this cpu
264 #elif CPU_AVR_ATMEGA103
265 #if CONFIG_KDEBUG_PORT == 0
266 UBRR = (uint8_t)period;
269 #error Only CONFIG_KDEBUG_PORT 0 is supported for this cpu
274 #endif /* CONFIG_KDEBUG_PORT == 666 */