4 * This file is part of BeRTOS.
6 * Bertos is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 * As a special exception, you may use this file as part of a free software
21 * library without restriction. Specifically, if other files instantiate
22 * templates or use macros or inline functions from this file, or you compile
23 * this file and link it with other files to produce an executable, this
24 * file does not by itself cause the resulting executable to be covered by
25 * the GNU General Public License. This exception does not however
26 * invalidate any other reasons why the executable file might be covered by
27 * the GNU General Public License.
29 * Copyright 2003, 2004, 2005, 2006 Develer S.r.l. (http://www.develer.com/)
30 * Copyright 2001 Bernardo Innocenti <bernie@codewiz.org>
34 * \brief Displaytech 32122A LCD driver
38 * \author Bernardo Innocenti <bernie@develer.com>
39 * \author Stefano Fedrigo <aleph@develer.com>
43 #include "lcd_32122a_avr.h"
45 #include "cfg/cfg_lcd.h"
47 #include <cfg/macros.h> /* BV() */
48 #include <cfg/debug.h>
49 #include <cfg/module.h>
52 #include <drv/timer.h>
55 #include <cpu/types.h>
62 #warning TODO:Refactor this module. Split code to hw file.
64 /* Configuration sanity checks */
65 #if !defined(CONFIG_LCD_SOFTINT_REFRESH) || (CONFIG_LCD_SOFTINT_REFRESH != 0 && CONFIG_LCD_SOFTINT_REFRESH != 1)
66 #error CONFIG_LCD_SOFTINT_REFRESH must be defined to either 0 or 1
68 #if !defined(CONFIG_LCD_SOFTINT_REFRESH) || (CONFIG_LCD_SOFTINT_REFRESH != 0 && CONFIG_LCD_SOFTINT_REFRESH != 1)
69 #error CONFIG_LCD_SOFTINT_REFRESH must be defined to either 0 or 1
73 #if CONFIG_LCD_SOFTINT_REFRESH
75 /** Interval between softint driven lcd refresh */
76 # define LCD_REFRESH_INTERVAL 20 /* 20ms -> 50fps */
78 #endif /* CONFIG_LCD_SOFTINT_REFRESH */
80 /** Number of LCD pages */
83 /** Width of an LCD page */
84 #define LCD_PAGESIZE (LCD_WIDTH / 2)
87 * \name LCD I/O pins/ports
90 #define LCD_PF_DB0 PF4
91 #define LCD_PF_DB1 PF5
92 #define LCD_PF_DB2 PF6
93 #define LCD_PF_DB3 PF7
94 #define LCD_PD_DB4 PD4
95 #define LCD_PD_DB5 PD5
96 #define LCD_PD_DB6 PD6
97 #define LCD_PD_DB7 PD7
100 #define LCD_PE_E1 PE2
101 #define LCD_PE_E2 PE6
105 * \name DB high nibble (DB[4-7])
108 #define LCD_DATA_HI_PORT PORTD
109 #define LCD_DATA_HI_PIN PIND
110 #define LCD_DATA_HI_DDR DDRD
111 #define LCD_DATA_HI_SHIFT 0
112 #define LCD_DATA_HI_MASK 0xF0
116 * \name DB low nibble (DB[0-3])
119 #define LCD_DATA_LO_PORT PORTF
120 #define LCD_DATA_LO_PIN PINF
121 #define LCD_DATA_LO_DDR DDRF
122 #define LCD_DATA_LO_SHIFT 4
123 #define LCD_DATA_LO_MASK 0xF0
127 * \name LCD bus control macros
130 #define LCD_CLR_A0 (PORTB &= ~BV(LCD_PB_A0))
131 #define LCD_SET_A0 (PORTB |= BV(LCD_PB_A0))
132 #define LCD_CLR_RD (PORTE &= ~BV(LCD_PE_RW))
133 #define LCD_SET_RD (PORTE |= BV(LCD_PE_RW))
134 #define LCD_CLR_E1 (PORTE &= ~BV(LCD_PE_E1))
135 #define LCD_SET_E1 (PORTE |= BV(LCD_PE_E1))
136 #define LCD_CLR_E2 (PORTE &= ~BV(LCD_PE_E2))
137 #define LCD_SET_E2 (PORTE |= BV(LCD_PE_E2))
138 #define LCD_SET_E(x) (PORTE |= (x))
139 #define LCD_CLR_E(x) (PORTE &= ~(x))
143 * \name Chip select bits for LCD_SET_E()
146 #define LCDF_E1 (BV(LCD_PE_E1))
147 #define LCDF_E2 (BV(LCD_PE_E2))
150 /** Read from the LCD data bus (DB[0-7]) */
152 ((LCD_DATA_LO_PIN & LCD_DATA_LO_MASK) >> LCD_DATA_LO_SHIFT) | \
153 ((LCD_DATA_HI_PIN & LCD_DATA_HI_MASK) >> LCD_DATA_HI_SHIFT) \
156 /** Write to the LCD data bus (DB[0-7]) */
157 #define LCD_WRITE(d) \
159 LCD_DATA_LO_PORT = (LCD_DATA_LO_PORT & ~LCD_DATA_LO_MASK) | (((d)<<LCD_DATA_LO_SHIFT) & LCD_DATA_LO_MASK); \
160 LCD_DATA_HI_PORT = (LCD_DATA_HI_PORT & ~LCD_DATA_HI_MASK) | (((d)<<LCD_DATA_HI_SHIFT) & LCD_DATA_HI_MASK); \
163 /** Set data bus direction to output (write to display) */
166 LCD_DATA_LO_DDR |= LCD_DATA_LO_MASK; \
167 LCD_DATA_HI_DDR |= LCD_DATA_HI_MASK; \
170 /** Set data bus direction to input (read from display) */
173 LCD_DATA_LO_DDR &= ~LCD_DATA_LO_MASK; \
174 LCD_DATA_HI_DDR &= ~LCD_DATA_HI_MASK; \
177 /** Delay for tEW (160ns) */
178 #define LCD_DELAY_WRITE \
184 /** Delay for tACC6 (180ns) */
185 #define LCD_DELAY_READ \
194 * \name 32122A Commands
197 #define LCD_CMD_DISPLAY_ON 0xAF
198 #define LCD_CMD_DISPLAY_OFF 0xAE
199 #define LCD_CMD_STARTLINE 0xC0
200 #define LCD_CMD_PAGEADDR 0xB8
201 #define LCD_CMD_COLADDR 0x00
202 #define LCD_CMD_ADC_LEFT 0xA1
203 #define LCD_CMD_ADC_RIGHT 0xA0
204 #define LCD_CMD_STATIC_OFF 0xA4
205 #define LCD_CMD_STATIC_ON 0xA5
206 #define LCD_CMD_DUTY_32 0xA9
207 #define LCD_CMD_DUTY_16 0xA8
208 #define LCD_CMD_RMW_ON 0xE0
209 #define LCD_CMD_RMW_OFF 0xEE
210 #define LCD_CMD_RESET 0xE2
217 #define LCDF_BUSY BV(7)
223 * RS __\____________/__
246 } while (status & LCDF_BUSY); \
250 #else /* CONFIG_LCD_WAIT */
252 #define WAIT_LCD do {} while(0)
254 #endif /* CONFIG_LCD_WAIT */
258 * Raster buffer to draw into.
260 * Bits in the bitmap bytes have vertical orientation,
261 * as required by the LCD driver.
263 DECLARE_WALL(wall_before_raster, WALL_SIZE)
264 static uint8_t lcd_raster[RAST_SIZE(LCD_WIDTH, LCD_HEIGHT)];
265 DECLARE_WALL(wall_after_raster, WALL_SIZE)
267 /** Default LCD bitmap */
268 struct Bitmap lcd_bitmap;
271 #if CONFIG_LCD_SOFTINT_REFRESH
273 /** Timer for regular LCD refresh */
274 static Timer *lcd_refresh_timer;
276 #endif /* CONFIG_LCD_SOFTINT_REFRESH */
280 static bool lcd_check(void)
283 uint16_t retries = 32768;
287 cbi(PORTC, PCB_LCD_RS);
288 sbi(PORTC, PCB_LCD_RW);
289 sbi(PORTC, PCB_LCD_E);
293 cbi(PORTC, PCB_LCD_E);
294 cbi(PORTC, PCB_LCD_RW);
295 } while ((status & LCDF_BUSY) && retries);
297 return (retries != 0);
302 static inline void lcd_32122_cmd(uint8_t cmd, uint8_t chip)
307 * A0 __\____________/__
309 * R/W __________________
313 * DATA --<============>--
326 static inline uint8_t lcd_32122_read(uint8_t chip)
341 * DATA -------<=====>----
359 static inline void lcd_32122_write(uint8_t c, uint8_t chip)
368 * R/W __________________
372 * DATA -<==============>-
386 static void lcd_32122_clear(void)
390 for (page = 0; page < LCD_PAGES; ++page)
392 lcd_32122_cmd(LCD_CMD_COLADDR | 0, LCDF_E1 | LCDF_E2);
393 lcd_32122_cmd(LCD_CMD_PAGEADDR | page, LCDF_E1 | LCDF_E2);
394 for (j = 0; j < LCD_PAGESIZE; j++)
395 lcd_32122_write(0, LCDF_E1 | LCDF_E2);
400 static void lcd_32122_writeRaster(const uint8_t *raster)
403 const uint8_t *right_raster;
405 CHECK_WALL(wall_before_raster);
406 CHECK_WALL(wall_after_raster);
408 for (page = 0; page < LCD_PAGES; ++page)
410 lcd_32122_cmd(LCD_CMD_PAGEADDR | page, LCDF_E1 | LCDF_E2);
411 lcd_32122_cmd(LCD_CMD_COLADDR | 0, LCDF_E1 | LCDF_E2);
413 /* Super optimized lamer loop */
414 right_raster = raster + LCD_PAGESIZE;
418 lcd_32122_write(*raster++, LCDF_E1);
419 lcd_32122_write(*right_raster++, LCDF_E2);
422 raster = right_raster;
426 #if CONFIG_LCD_SOFTINT_REFRESH
428 static void lcd_32122_refreshSoftint(void)
430 lcd_blit_bitmap(&lcd_bitmap);
431 timer_add(lcd_refresh_timer);
434 #endif /* CONFIG_LCD_SOFTINT_REFRESH */
437 * Set LCD contrast PWM.
439 void lcd_32122_setPwm(int duty)
441 ASSERT(duty >= LCD_MIN_PWM);
442 ASSERT(duty <= LCD_MAX_PWM);
448 * Update the LCD display with data from the provided bitmap.
450 void lcd_32122_blitBitmap(Bitmap *bm)
453 lcd_32122_writeRaster(bm->raster);
458 * Initialize LCD subsystem.
460 * \note The PWM used for LCD contrast is initialized in drv/pwm.c
461 * because it is the same PWM used for output attenuation.
463 void lcd_32122_init(void)
467 // FIXME: interrupts are already disabled when we get here?!?
469 IRQ_SAVE_DISABLE(flags);
471 PORTB |= BV(LCD_PB_A0);
472 DDRB |= BV(LCD_PB_A0);
474 PORTE &= ~(BV(LCD_PE_RW) | BV(LCD_PE_E1) | BV(LCD_PE_E2));
475 DDRE |= BV(LCD_PE_RW) | BV(LCD_PE_E1) | BV(LCD_PE_E2);
478 LCD_RESET_PORT |= BV(LCD_RESET_BIT);
479 LCD_RESET_DDR |= BV(LCD_RESET_BIT);
482 LCD_RESET_PORT &= ~BV(LCD_RESET_BIT);
485 LCD_RESET_PORT |= BV(LCD_RESET_BIT);
488 * Data bus is in output state most of the time:
489 * LCD r/w functions assume it is left in output state
493 // Wait for RST line to stabilize at Vcc.
496 IRQ_SAVE_DISABLE(flags);
498 lcd_32122_cmd(LCD_CMD_RESET, LCDF_E1 | LCDF_E2);
499 lcd_32122_cmd(LCD_CMD_DISPLAY_ON, LCDF_E1 | LCDF_E2);
500 lcd_32122_cmd(LCD_CMD_STARTLINE | 0, LCDF_E1 | LCDF_E2);
502 /* Initialize anti-corruption walls for raster */
503 INIT_WALL(wall_before_raster);
504 INIT_WALL(wall_after_raster);
509 lcd_32122_setPwm(LCD_DEF_PWM);
511 gfx_bitmapInit(&lcd_bitmap, lcd_raster, LCD_WIDTH, LCD_HEIGHT);
512 gfx_bitmapClear(&lcd_bitmap);
514 #if CONFIG_LCD_SOFTINT_REFRESH
516 /* Init IRQ driven LCD refresh */
517 lcd_refresh_timer = timer_new();
518 ASSERT(lcd_refresh_timer != NULL);
519 INITEVENT_INT(&lcd_refresh_timer->expire, (Hook)lcd_refresh_softint, 0);
520 lcd_refresh_timer->delay = LCD_REFRESH_INTERVAL;
521 timer_add(lcd_refresh_timer);
523 #endif /* CONFIG_LCD_SOFTINT_REFRESH */