4 * This file is part of BeRTOS.
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20 * As a special exception, you may use this file as part of a free software
21 * library without restriction. Specifically, if other files instantiate
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29 * Copyright 2005 Develer S.r.l. (http://www.develer.com/)
35 * \author Bernie Innocenti <bernie@codewiz.org>
36 * \author Francesco Sacchi <batt@develer.com>
38 * \brief Low-level timer module for AVR (implementation).
40 * This module is automatically included so no need to include
45 #include <drv/timer_avr.h>
46 #include <cfg/macros.h> // BV()
48 #include <cpu/types.h>
51 #include <avr/interrupt.h>
54 #if CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA168
55 #define REG_TIFR0 TIFR0
56 #define REG_TIFR2 TIFR2
58 #define REG_TIMSK0 TIMSK0
59 #define REG_TIMSK2 TIMSK2
61 #define REG_TCCR2A TCCR2A
62 #define REG_TCCR2B TCCR2B
64 #define REG_OCR2A OCR2A
66 #define BIT_OCF0A OCF0A
67 #define BIT_OCF2A OCF2A
69 #define BIT_OCIE0A OCIE0A
70 #define BIT_OCIE2A OCIE2A
72 #define REG_TIFR0 TIFR
73 #define REG_TIFR2 TIFR
75 #define REG_TIMSK0 TIMSK
76 #define REG_TIMSK2 TIMSK
78 #define REG_TCCR2A TCCR2
79 #define REG_TCCR2B TCCR2
81 #define REG_OCR2A OCR2
83 #define BIT_OCF0A OCF0
84 #define BIT_OCF2A OCF2
86 #define BIT_OCIE0A OCIE0
87 #define BIT_OCIE2A OCIE2
91 /** HW dependent timer initialization */
92 #if (CONFIG_TIMER == TIMER_ON_OUTPUT_COMPARE0)
94 static void timer_hw_init(void)
97 IRQ_SAVE_DISABLE(flags);
99 /* Reset Timer flags */
100 REG_TIFR0 = BV(BIT_OCF0A) | BV(TOV0);
102 /* Setup Timer/Counter interrupt */
103 ASSR = 0x00; /* Internal system clock */
104 TCCR0 = BV(WGM01) /* Clear on Compare match */
105 #if TIMER_PRESCALER == 64
108 #error Unsupported value of TIMER_PRESCALER
111 TCNT0 = 0x00; /* Initialization of Timer/Counter */
112 OCR0 = OCR_DIVISOR; /* Timer/Counter Output Compare Register */
114 /* Enable timer interrupts: Timer/Counter2 Output Compare (OCIE2) */
115 REG_TIMSK0 &= ~BV(TOIE0);
116 REG_TIMSK0 |= BV(OCIE0);
121 INLINE hptime_t timer_hw_hpread(void)
126 #elif (CONFIG_TIMER == TIMER_ON_OVERFLOW1)
128 static void timer_hw_init(void)
131 IRQ_SAVE_DISABLE(flags);
133 /* Reset Timer overflow flag */
136 /* Fast PWM mode, 9 bit, 24 kHz, no prescaling. */
137 #if (TIMER_PRESCALER == 1) && (TIMER_HW_BITS == 9)
139 TCCR1A &= ~BV(WGM10);
140 TCCR1B |= BV(WGM12) | BV(CS10);
141 TCCR1B &= ~(BV(WGM13) | BV(CS11) | BV(CS12));
142 /* Fast PWM mode, 8 bit, 24 kHz, no prescaling. */
143 #elif (TIMER_PRESCALER == 1) && (TIMER_HW_BITS == 8)
145 TCCR1A &= ~BV(WGM11);
146 TCCR1B |= BV(WGM12) | BV(CS10);
147 TCCR1B &= ~(BV(WGM13) | BV(CS11) | BV(CS12));
149 #error Unsupported value of TIMER_PRESCALER or TIMER_HW_BITS
152 TCNT1 = 0x00; /* initialization of Timer/Counter */
154 /* Enable timer interrupt: Timer/Counter1 Overflow */
160 INLINE hptime_t timer_hw_hpread(void)
165 #elif (CONFIG_TIMER == TIMER_ON_OUTPUT_COMPARE2)
166 static void timer_hw_init(void)
169 IRQ_SAVE_DISABLE(flags);
171 /* Reset Timer flags */
172 REG_TIFR2 = BV(BIT_OCF2A) | BV(TOV2);
174 /* Setup Timer/Counter interrupt */
175 REG_TCCR2A = 0; // TCCR2 reg could be separate or a unique register with both A & B values, this is needed to
176 REG_TCCR2B = 0; // ensure correct initialization.
178 REG_TCCR2A = BV(WGM21);
179 #if TIMER_PRESCALER == 64
180 #if CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA168
181 // ATMega1281 & ATMega168 have undocumented differences in timer2 prescaler!
182 REG_TCCR2B |= BV(CS22);
184 REG_TCCR2B |= BV(CS21) | BV(CS20);
187 #error Unsupported value of TIMER_PRESCALER
190 /* Clear on Compare match & prescaler = 64, internal sys clock.
191 When changing prescaler change TIMER_HW_HPTICKS_PER_SEC too */
192 TCNT2 = 0x00; /* initialization of Timer/Counter */
193 REG_OCR2A = OCR_DIVISOR; /* Timer/Counter Output Compare Register */
195 /* Enable timer interrupts: Timer/Counter2 Output Compare (OCIE2) */
196 REG_TIMSK2 &= ~BV(TOIE2);
197 REG_TIMSK2 |= BV(BIT_OCIE2A);
202 INLINE hptime_t timer_hw_hpread(void)
206 #elif (CONFIG_TIMER == TIMER_ON_OVERFLOW3)
208 static void timer_hw_init(void)
211 IRQ_SAVE_DISABLE(flags);
213 /* Reset Timer overflow flag */
216 /* Fast PWM mode, 9 bit, 24 kHz, no prescaling. */
217 #if (TIMER_PRESCALER == 1) && (TIMER_HW_BITS == 9)
219 TCCR3A &= ~BV(WGM30);
220 TCCR3B |= BV(WGM32) | BV(CS30);
221 TCCR3B &= ~(BV(WGM33) | BV(CS31) | BV(CS32));
222 /* Fast PWM mode, 8 bit, 24 kHz, no prescaling. */
223 #elif (TIMER_PRESCALER == 1) && (TIMER_HW_BITS == 8)
225 TCCR3A &= ~BV(WGM31);
226 TCCR3B |= BV(WGM32) | BV(CS30);
227 TCCR3B &= ~(BV(WGM33) | BV(CS31) | BV(CS32));
229 #error Unsupported value of TIMER_PRESCALER or TIMER_HW_BITS
232 TCNT3 = 0x00; /* initialization of Timer/Counter */
234 /* Enable timer interrupt: Timer/Counter3 Overflow */
235 /* ATTENTION! TOIE3 is only on ETIMSK, not TIMSK */
241 INLINE hptime_t timer_hw_hpread(void)
247 #error Unimplemented value for CONFIG_TIMER
248 #endif /* CONFIG_TIMER */