4 * This file is part of BeRTOS.
6 * Bertos is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 * As a special exception, you may use this file as part of a free software
21 * library without restriction. Specifically, if other files instantiate
22 * templates or use macros or inline functions from this file, or you compile
23 * this file and link it with other files to produce an executable, this
24 * file does not by itself cause the resulting executable to be covered by
25 * the GNU General Public License. This exception does not however
26 * invalidate any other reasons why the executable file might be covered by
27 * the GNU General Public License.
29 * Copyright 2003, 2004, 2005 Develer S.r.l. (http://www.develer.com/)
33 * \brief Driver for the AVR ATMega TWI (implementation)
37 * \author Stefano Fedrigo <aleph@develer.com>
38 * \author Bernardo Innocenti <bernie@develer.com>
43 #include "hw/hw_cpu.h" /* CLOCK_FREQ */
45 #include "cfg/cfg_twi.h"
46 #include <cfg/debug.h>
47 #include <cfg/macros.h> // BV()
49 #include <cpu/detect.h>
52 #include <compat/twi.h>
55 /* Wait for TWINT flag set: bus is ready */
56 #define WAIT_TWI_READY do {} while (!(TWCR & BV(TWINT)))
58 #define READ_BIT BV(0)
62 * Send START condition on the bus.
64 * \return true on success, false otherwise.
66 static bool twi_start(void)
68 TWCR = BV(TWINT) | BV(TWSTA) | BV(TWEN);
71 if (TW_STATUS == TW_START || TW_STATUS == TW_REP_START)
74 kprintf("!TW_(REP)START: %x\n", TWSR);
80 * Send START condition and select slave for write.
81 * \c id is the device id comprehensive of address left shifted by 1.
82 * The LSB of \c id is ignored and reset to 0 for write operation.
84 * \return true on success, false otherwise.
86 bool twi_start_w(uint8_t id)
89 * Loop on the select write sequence: when the eeprom is busy
90 * writing previously sent data it will reply to the SLA_W
91 * control byte with a NACK. In this case, we must
92 * keep trying until the eeprom responds with an ACK.
96 TWDR = id & ~READ_BIT;
97 TWCR = BV(TWINT) | BV(TWEN);
100 if (TW_STATUS == TW_MT_SLA_ACK)
102 else if (TW_STATUS != TW_MT_SLA_NACK)
104 kprintf("!TW_MT_SLA_(N)ACK: %x\n", TWSR);
114 * Send START condition and select slave for read.
115 * \c id is the device id comprehensive of address left shifted by 1.
116 * The LSB of \c id is ignored and set to 1 for read operation.
118 * \return true on success, false otherwise.
120 bool twi_start_r(uint8_t id)
124 TWDR = id | READ_BIT;
125 TWCR = BV(TWINT) | BV(TWEN);
128 if (TW_STATUS == TW_MR_SLA_ACK)
131 kprintf("!TW_MR_SLA_ACK: %x\n", TWSR);
139 * Send STOP condition.
143 TWCR = BV(TWINT) | BV(TWEN) | BV(TWSTO);
148 * Put a single byte in master transmitter mode
149 * to the selected slave device through the TWI bus.
151 * \return true on success, false on error.
153 bool twi_put(const uint8_t data)
156 TWCR = BV(TWINT) | BV(TWEN);
158 if (TW_STATUS != TW_MT_DATA_ACK)
160 kprintf("!TW_MT_DATA_ACK: %x\n", TWSR);
168 * Send a sequence of bytes in master transmitter mode
169 * to the selected slave device through the TWI bus.
171 * \return true on success, false on error.
173 bool twi_send(const void *_buf, size_t count)
175 const uint8_t *buf = (const uint8_t *)_buf;
179 if (!twi_put(*buf++))
187 * Receive a sequence of one or more bytes from the
188 * selected slave device in master receive mode through
191 * Received data is placed in \c buf.
193 * \return true on success, false on error
195 bool twi_recv(void *_buf, size_t count)
197 uint8_t *buf = (uint8_t *)_buf;
200 * When reading the last byte the TWEA bit is not
201 * set, and the eeprom should answer with NACK
205 TWCR = BV(TWINT) | BV(TWEN) | (count ? BV(TWEA) : 0);
210 if (TW_STATUS != TW_MR_DATA_ACK)
212 kprintf("!TW_MR_DATA_ACK: %x\n", TWSR);
218 if (TW_STATUS != TW_MR_DATA_NACK)
220 kprintf("!TW_MR_DATA_NACK: %x\n", TWSR);
232 * Initialize TWI module.
238 * This is pretty useless according to AVR's datasheet,
239 * but it helps us driving the TWI data lines on boards
240 * where the bus pull-up resistors are missing. This is
241 * probably due to some unwanted interaction between the
242 * port pin and the TWI lines.
244 #if CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA1281
245 PORTD |= BV(PD0) | BV(PD1);
246 DDRD |= BV(PD0) | BV(PD1);
247 #elif CPU_AVR_ATMEGA8
248 PORTC |= BV(PC4) | BV(PC5);
249 DDRC |= BV(PC4) | BV(PC5);
251 #error Unsupported architecture
256 * F = CLOCK_FREQ / (16 + 2*TWBR * 4^TWPS)
258 #ifndef CONFIG_TWI_FREQ
259 #warning Using default value of 300000L for CONFIG_TWI_FREQ
260 #define CONFIG_TWI_FREQ 300000L /* ~300 kHz */
262 #define TWI_PRESC 1 /* 4 ^ TWPS */
264 TWBR = (CLOCK_FREQ / (2 * CONFIG_TWI_FREQ * TWI_PRESC)) - (8 / TWI_PRESC);