bertos/cpu/cortex-m3/drv/flash_sam3.c

   1 /**
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  25  * the GNU General Public License.  This exception does not however
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  27  * the GNU General Public License.
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  29  * Copyright 2011 Develer S.r.l. (http://www.develer.com/)
  30  *
  31  * -->
  32  *
  33  * \author Daniele Basile <asterix@develer.com>
  34  *
  35  * \brief SAM3 Internal flash read/write driver.
  36  *
  37  *
  38  */
  39
  40 #include "flash_sam3.h"
  41
  42 #include "cfg/cfg_emb_flash.h"
  43 #include <cfg/macros.h>
  44
  45 // Define log settings for cfg/log.h
  46 #define LOG_LEVEL    CONFIG_FLASH_EMB_LOG_LEVEL
  47 #define LOG_FORMAT   CONFIG_FLASH_EMB_LOG_FORMAT
  48 #include <cfg/log.h>
  49
  50 #include <cpu/irq.h>
  51 #include <cpu/attr.h>
  52 #include <cpu/power.h>
  53
  54 #include <io/kfile.h>
  55 #include <io/kblock.h>
  56 #include <io/cm3.h>
  57
  58 #include <drv/timer.h>
  59 #include <drv/flash.h>
  60
  61 #include <string.h>
  62
  63
  64 struct FlashHardware
  65 {
  66         uint8_t status;
  67 };
  68
  69
  70 /**
  71  * Really send the flash write command.
  72  *
  73  * \note This function has to be placed in RAM because
  74  *       executing code from flash while a writing process
  75  *       is in progress is forbidden.
  76  */
  77 RAM_FUNC NOINLINE static void write_page_bank0(uint32_t page)
  78 {
  79         // Send the 'write page' command
  80         EEFC0_FCR = EEFC_FCR_FKEY | EFC_FCR_FCMD_EWP | EEFC_FCR_FARG(page);
  81
  82         // Wait for the end of command
  83         while(!(EEFC0_FSR & BV(EEFC_FSR_FRDY)))
  84         {
  85                 //NOP;
  86         }
  87 }
  88
  89 #if FLASH_BANKS_NUM > 1
  90 RAM_FUNC NOINLINE static void write_page_bank1(uint32_t page)
  91 {
  92         // Send the 'write page' command
  93         EEFC1_FCR = EEFC_FCR_FKEY | EFC_FCR_FCMD_EWP | EEFC_FCR_FARG(page);
  94
  95         // Wait for the end of command
  96         while(!(EEFC1_FSR & BV(EEFC_FSR_FRDY)))
  97         {
  98                 //NOP;
  99         }
 100 }
 101 #endif
 102
 103
 104 /**
 105  * Send write command.
 106  *
 107  * After WR command cpu write bufferd page into flash memory.
 108  *
 109  */
 110 INLINE void flash_sendWRcmd(uint32_t page)
 111 {
 112         cpu_flags_t flags;
 113
 114         LOG_INFO("Writing page %ld...\n", page);
 115
 116         if (page > FLASH_PAGES_FOR_BANK)
 117         {
 118                 page = page - FLASH_PAGES_FOR_BANK;
 119                 IRQ_SAVE_DISABLE(flags);
 120                 write_page_bank1(page);
 121                 IRQ_RESTORE(flags);
 122         }
 123         else
 124         {
 125                 IRQ_SAVE_DISABLE(flags);
 126                 write_page_bank0(page);
 127                 IRQ_RESTORE(flags);
 128         }
 129
 130         LOG_INFO("Done\n");
 131 }
 132
 133 /**
 134  * Return true if no error are occurred after flash memory
 135  * read or write operation, otherwise return error code.
 136  */
 137 static bool flash_getStatus(struct KBlock *blk)
 138 {
 139         Flash *fls = FLASH_CAST(blk);
 140         /*
 141          * This bit is set to one if an invalid command and/or a bad keywords was/were
 142          * written in the Flash Command Register.
 143          */
 144         if(EEFC0_FSR & BV(EEFC_FSR_FCMDE))
 145         {
 146                 fls->hw->status |= FLASH_WR_ERR;
 147                 LOG_ERR("flash not erased..\n");
 148                 return false;
 149         }
 150
 151         /*
 152          * This bit is set to one if we programming of at least one locked lock
 153          * region.
 154          */
 155         if(EEFC0_FSR & BV(EEFC_FSR_FLOCKE))
 156         {
 157                 fls->hw->status |= FLASH_WR_PROTECT;
 158                 LOG_ERR("wr protect..\n");
 159                 return false;
 160         }
 161
 162         return true;
 163 }
 164
 165
 166 static size_t sam3_flash_readDirect(struct KBlock *blk, block_idx_t idx, void *buf, size_t offset, size_t size)
 167 {
 168         memcpy(buf, (void *)(idx * blk->blk_size +  FLASH_BASE + offset), size);
 169         return size;
 170 }
 171
 172 static size_t sam3_flash_writeDirect(struct KBlock *blk, block_idx_t idx, const void *_buf, size_t offset, size_t size)
 173 {
 174         ASSERT(offset == 0);
 175         ASSERT(size == blk->blk_size);
 176
 177         uint32_t *addr = (uint32_t *)(idx * blk->blk_size +  FLASH_BASE);
 178         const uint8_t *buf = (const uint8_t *)_buf;
 179
 180         while (size)
 181         {
 182                 uint32_t data = (*(buf + 3) << 24) |
 183                                                 (*(buf + 2) << 16) |
 184                                                 (*(buf + 1) << 8)  |
 185                                                 *buf;
 186                 *addr = data;
 187
 188                 size -= 4;
 189                 buf += 4;
 190                 addr++;
 191         }
 192
 193         flash_sendWRcmd(idx);
 194
 195         if (!flash_getStatus(blk))
 196                 return 0;
 197
 198         return blk->blk_size;
 199 }
 200
 201
 202 static int sam3_flash_error(struct KBlock *blk)
 203 {
 204         Flash *fls = FLASH_CAST(blk);
 205         return fls->hw->status;
 206 }
 207
 208 static void sam3_flash_clearerror(struct KBlock *blk)
 209 {
 210         Flash *fls = FLASH_CAST(blk);
 211         fls->hw->status = 0;
 212 }
 213
 214 static const KBlockVTable flash_sam3_buffered_vt =
 215 {
 216         .readDirect = sam3_flash_readDirect,
 217         .writeDirect = sam3_flash_writeDirect,
 218
 219         .readBuf = kblock_swReadBuf,
 220         .writeBuf = kblock_swWriteBuf,
 221         .load = kblock_swLoad,
 222         .store = kblock_swStore,
 223
 224         .error = sam3_flash_error,
 225         .clearerr = sam3_flash_clearerror,
 226 };
 227
 228 static const KBlockVTable flash_sam3_unbuffered_vt =
 229 {
 230         .readDirect = sam3_flash_readDirect,
 231         .writeDirect = sam3_flash_writeDirect,
 232
 233         .error = sam3_flash_error,
 234         .clearerr = sam3_flash_clearerror,
 235 };
 236
 237 static struct FlashHardware flash_sam3_hw;
 238 static uint8_t flash_buf[FLASH_PAGE_SIZE_BYTES];
 239
 240 static void common_init(Flash *fls)
 241 {
 242         memset(fls, 0, sizeof(*fls));
 243         DB(fls->blk.priv.type = KBT_FLASH);
 244
 245         fls->hw = &flash_sam3_hw;
 246
 247         fls->blk.blk_size = FLASH_PAGE_SIZE_BYTES;
 248         fls->blk.blk_cnt = FLASH_MEM_SIZE / FLASH_PAGE_SIZE_BYTES;
 249 }
 250
 251 void flash_hw_init(Flash *fls, UNUSED_ARG(int, flags))
 252 {
 253         common_init(fls);
 254         fls->blk.priv.vt = &flash_sam3_buffered_vt;
 255         fls->blk.priv.flags |= KB_BUFFERED | KB_PARTIAL_WRITE;
 256         fls->blk.priv.buf = flash_buf;
 257
 258         /* Load the first block in the cache */
 259         memcpy(fls->blk.priv.buf, (void *)(FLASH_BASE), fls->blk.blk_size);
 260 }
 261
 262 void flash_hw_initUnbuffered(Flash *fls, UNUSED_ARG(int, flags))
 263 {
 264         common_init(fls);
 265         fls->blk.priv.vt = &flash_sam3_unbuffered_vt;
 266 }
 267