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29 * Copyright 2010 Develer S.r.l. (http://www.develer.com/)
33 * \brief LM3S1968 GPIO control interface.
35 * \author Andrea Righi <arighi@develer.com>
38 #include <cfg/compiler.h>
39 #include <cfg/debug.h>
41 #include "gpio_lm3s.h"
43 /* Set the pin(s) direction and mode */
44 INLINE int lm3s_gpioPinConfigMode(uint32_t port, uint8_t pins, uint32_t mode)
48 case GPIO_DIR_MODE_IN:
49 HWREG(port + GPIO_O_DIR) &= ~pins;
50 HWREG(port + GPIO_O_AFSEL) &= ~pins;
52 case GPIO_DIR_MODE_OUT:
53 HWREG(port + GPIO_O_DIR) |= pins;
54 HWREG(port + GPIO_O_AFSEL) &= ~pins;
56 case GPIO_DIR_MODE_HW:
57 HWREG(port + GPIO_O_DIR) &= ~pins;
58 HWREG(port + GPIO_O_AFSEL) |= pins;
67 /* Set the pin(s) output strength */
69 lm3s_gpioPinConfigStrength(uint32_t port, uint8_t pins, uint32_t strength)
73 case GPIO_STRENGTH_2MA:
74 HWREG(port + GPIO_O_DR2R) |= pins;
75 HWREG(port + GPIO_O_DR4R) &= ~pins;
76 HWREG(port + GPIO_O_DR8R) &= ~pins;
77 HWREG(port + GPIO_O_SLR) &= ~pins;
79 case GPIO_STRENGTH_4MA:
80 HWREG(port + GPIO_O_DR2R) &= ~pins;
81 HWREG(port + GPIO_O_DR4R) |= pins;
82 HWREG(port + GPIO_O_DR8R) &= ~pins;
83 HWREG(port + GPIO_O_SLR) &= ~pins;
85 case GPIO_STRENGTH_8MA:
86 HWREG(port + GPIO_O_DR2R) &= ~pins;
87 HWREG(port + GPIO_O_DR4R) &= ~pins;
88 HWREG(port + GPIO_O_DR8R) |= pins;
89 HWREG(port + GPIO_O_SLR) &= ~pins;
91 case GPIO_STRENGTH_8MA_SC:
92 HWREG(port + GPIO_O_DR2R) &= ~pins;
93 HWREG(port + GPIO_O_DR4R) &= ~pins;
94 HWREG(port + GPIO_O_DR8R) |= pins;
95 HWREG(port + GPIO_O_SLR) |= pins;
104 /* Set the pin(s) type */
105 INLINE int lm3s_gpioPinConfigType(uint32_t port, uint8_t pins, uint32_t type)
109 case GPIO_PIN_TYPE_ANALOG:
110 HWREG(port + GPIO_O_ODR) &= ~pins;
111 HWREG(port + GPIO_O_PUR) &= ~pins;
112 HWREG(port + GPIO_O_PDR) &= ~pins;
113 HWREG(port + GPIO_O_DEN) &= ~pins;
114 HWREG(port + GPIO_O_AMSEL) |= pins;
116 case GPIO_PIN_TYPE_STD:
117 HWREG(port + GPIO_O_ODR) &= ~pins;
118 HWREG(port + GPIO_O_PUR) &= ~pins;
119 HWREG(port + GPIO_O_PDR) &= ~pins;
120 HWREG(port + GPIO_O_DEN) |= pins;
121 HWREG(port + GPIO_O_AMSEL) &= ~pins;
123 case GPIO_PIN_TYPE_STD_WPU:
124 HWREG(port + GPIO_O_ODR) &= ~pins;
125 HWREG(port + GPIO_O_PUR) |= pins;
126 HWREG(port + GPIO_O_PDR) &= ~pins;
127 HWREG(port + GPIO_O_DEN) |= pins;
128 HWREG(port + GPIO_O_AMSEL) &= ~pins;
130 case GPIO_PIN_TYPE_STD_WPD:
131 HWREG(port + GPIO_O_ODR) &= ~pins;
132 HWREG(port + GPIO_O_PUR) &= ~pins;
133 HWREG(port + GPIO_O_PDR) |= pins;
134 HWREG(port + GPIO_O_DEN) |= pins;
135 HWREG(port + GPIO_O_AMSEL) &= ~pins;
137 case GPIO_PIN_TYPE_OD:
138 HWREG(port + GPIO_O_ODR) |= pins;
139 HWREG(port + GPIO_O_PUR) &= ~pins;
140 HWREG(port + GPIO_O_PDR) &= ~pins;
141 HWREG(port + GPIO_O_DEN) |= pins;
142 HWREG(port + GPIO_O_AMSEL) &= ~pins;
144 case GPIO_PIN_TYPE_OD_WPU:
145 HWREG(port + GPIO_O_ODR) |= pins;
146 HWREG(port + GPIO_O_PUR) |= pins;
147 HWREG(port + GPIO_O_PDR) &= ~pins;
148 HWREG(port + GPIO_O_DEN) |= pins;
149 HWREG(port + GPIO_O_AMSEL) &= ~pins;
151 case GPIO_PIN_TYPE_OD_WPD:
152 HWREG(port + GPIO_O_ODR) |= pins;
153 HWREG(port + GPIO_O_PUR) &= pins;
154 HWREG(port + GPIO_O_PDR) |= pins;
155 HWREG(port + GPIO_O_DEN) |= pins;
156 HWREG(port + GPIO_O_AMSEL) &= ~pins;
166 * Configure a GPIO pin
168 * \param port Base address of the GPIO port
169 * \param pins Bit-packed representation of the pin(s)
170 * \param mode Pin(s) configuration mode
171 * \param strength Output drive strength
172 * \param type Pin(s) type
174 * Return 0 on success, otherwise a negative value.
176 int lm3s_gpioPinConfig(uint32_t port, uint8_t pins,
177 uint32_t mode, uint32_t strength, uint32_t type)
181 ret = lm3s_gpioPinConfigMode(port, pins, mode);
182 if (UNLIKELY(ret < 0))
184 ret = lm3s_gpioPinConfigStrength(port, pins, strength);
185 if (UNLIKELY(ret < 0))
187 ret = lm3s_gpioPinConfigType(port, pins, type);
188 if (UNLIKELY(ret < 0))