4 * This file is part of BeRTOS.
6 * Bertos is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 * As a special exception, you may use this file as part of a free software
21 * library without restriction. Specifically, if other files instantiate
22 * templates or use macros or inline functions from this file, or you compile
23 * this file and link it with other files to produce an executable, this
24 * file does not by itself cause the resulting executable to be covered by
25 * the GNU General Public License. This exception does not however
26 * invalidate any other reasons why the executable file might be covered by
27 * the GNU General Public License.
29 * Copyright 2010 Develer S.r.l. (http://www.develer.com/)
33 * \brief LM3S1968 GPIO control interface.
35 * \author Andrea Righi <arighi@develer.com>
38 #include <cfg/compiler.h>
39 #include <cfg/debug.h>
41 #include "gpio_lm3s.h"
43 /* Write a value to the specified pin(s) */
44 void lm3s_gpio_pin_write(uint32_t port, uint8_t pins, uint8_t val)
46 HWREG(port + (GPIO_O_DATA + (pins << 2))) = val;
50 * Configure a GPIO pin
52 * @port: the base address of the GPIO port
53 * @pins: the bit-packed representation of the pin(s)
54 * @mode: the pin(s) configuration mode
55 * @strength: the output drive strength
56 * @type: the pin(s) type
58 * Return 0 on success, otherwise a negative value.
60 int lm3s_gpio_pin_config(uint32_t port, uint8_t pins,
61 uint32_t mode, uint32_t strength, uint32_t type)
63 /* Set the pin direction and mode */
66 case GPIO_DIR_MODE_IN:
67 HWREG(port + GPIO_O_DIR) &= ~pins;
68 HWREG(port + GPIO_O_AFSEL) &= ~pins;
70 case GPIO_DIR_MODE_OUT:
71 HWREG(port + GPIO_O_DIR) |= pins;
72 HWREG(port + GPIO_O_AFSEL) &= ~pins;
74 case GPIO_DIR_MODE_HW:
75 HWREG(port + GPIO_O_DIR) &= ~pins;
76 HWREG(port + GPIO_O_AFSEL) |= pins;
82 /* Set the output strength */
85 case GPIO_STRENGTH_2MA:
86 HWREG(port + GPIO_O_DR2R) |= pins;
87 HWREG(port + GPIO_O_DR4R) &= ~pins;
88 HWREG(port + GPIO_O_DR8R) &= ~pins;
89 HWREG(port + GPIO_O_SLR) &= ~pins;
91 case GPIO_STRENGTH_4MA:
92 HWREG(port + GPIO_O_DR2R) &= ~pins;
93 HWREG(port + GPIO_O_DR4R) |= pins;
94 HWREG(port + GPIO_O_DR8R) &= ~pins;
95 HWREG(port + GPIO_O_SLR) &= ~pins;
97 case GPIO_STRENGTH_8MA:
98 HWREG(port + GPIO_O_DR2R) &= ~pins;
99 HWREG(port + GPIO_O_DR4R) &= ~pins;
100 HWREG(port + GPIO_O_DR8R) |= pins;
101 HWREG(port + GPIO_O_SLR) &= ~pins;
103 case GPIO_STRENGTH_8MA_SC:
104 HWREG(port + GPIO_O_DR2R) &= ~pins;
105 HWREG(port + GPIO_O_DR4R) &= ~pins;
106 HWREG(port + GPIO_O_DR8R) |= pins;
107 HWREG(port + GPIO_O_SLR) |= pins;
113 /* Set the pin type */
116 case GPIO_PIN_TYPE_STD:
117 HWREG(port + GPIO_O_ODR) &= ~pins;
118 HWREG(port + GPIO_O_PUR) &= ~pins;
119 HWREG(port + GPIO_O_PDR) &= ~pins;
120 HWREG(port + GPIO_O_DEN) |= pins;
121 HWREG(port + GPIO_O_AMSEL) &= ~pins;
123 case GPIO_PIN_TYPE_STD_WPU:
124 HWREG(port + GPIO_O_ODR) &= ~pins;
125 HWREG(port + GPIO_O_PUR) |= pins;
126 HWREG(port + GPIO_O_PDR) &= ~pins;
127 HWREG(port + GPIO_O_DEN) |= pins;
128 HWREG(port + GPIO_O_AMSEL) &= ~pins;
130 case GPIO_PIN_TYPE_STD_WPD:
131 HWREG(port + GPIO_O_ODR) &= ~pins;
132 HWREG(port + GPIO_O_PUR) &= ~pins;
133 HWREG(port + GPIO_O_PDR) |= pins;
134 HWREG(port + GPIO_O_DEN) |= pins;
135 HWREG(port + GPIO_O_AMSEL) &= ~pins;
137 case GPIO_PIN_TYPE_OD:
138 HWREG(port + GPIO_O_ODR) |= pins;
139 HWREG(port + GPIO_O_PUR) &= ~pins;
140 HWREG(port + GPIO_O_PDR) &= ~pins;
141 HWREG(port + GPIO_O_DEN) |= pins;
142 HWREG(port + GPIO_O_AMSEL) &= ~pins;
144 case GPIO_PIN_TYPE_OD_WPU:
145 HWREG(port + GPIO_O_ODR) |= pins;
146 HWREG(port + GPIO_O_PUR) |= pins;
147 HWREG(port + GPIO_O_PDR) &= ~pins;
148 HWREG(port + GPIO_O_DEN) |= pins;
149 HWREG(port + GPIO_O_AMSEL) &= ~pins;
151 case GPIO_PIN_TYPE_OD_WPD:
152 HWREG(port + GPIO_O_ODR) |= pins;
153 HWREG(port + GPIO_O_PUR) &= pins;
154 HWREG(port + GPIO_O_PDR) |= pins;
155 HWREG(port + GPIO_O_DEN) |= pins;
156 HWREG(port + GPIO_O_AMSEL) &= ~pins;
158 case GPIO_PIN_TYPE_ANALOG:
159 HWREG(port + GPIO_O_ODR) &= ~pins;
160 HWREG(port + GPIO_O_PUR) &= ~pins;
161 HWREG(port + GPIO_O_PDR) &= ~pins;
162 HWREG(port + GPIO_O_DEN) &= ~pins;
163 HWREG(port + GPIO_O_AMSEL) |= pins;