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29 * Copyright 2010 Develer S.r.l. (http://www.develer.com/)
33 * \brief LM3S1968 GPIO control interface.
35 * \author Andrea Righi <arighi@develer.com>
38 #include <cfg/compiler.h>
39 #include <cfg/debug.h>
41 #include "gpio_lm3s.h"
43 /* Set the pin(s) direction and mode */
44 INLINE int lm3s_gpioPinConfigMode(uint32_t port, uint8_t pins, uint32_t mode)
46 if (mode == GPIO_DIR_MODE_IN)
48 HWREG(port + GPIO_O_DIR) &= ~pins;
49 HWREG(port + GPIO_O_AFSEL) &= ~pins;
51 else if (mode == GPIO_DIR_MODE_OUT)
53 HWREG(port + GPIO_O_DIR) |= pins;
54 HWREG(port + GPIO_O_AFSEL) &= ~pins;
56 else if (mode == GPIO_DIR_MODE_HW)
58 HWREG(port + GPIO_O_DIR) &= ~pins;
59 HWREG(port + GPIO_O_AFSEL) |= pins;
69 /* Set the pin(s) output strength */
71 lm3s_gpioPinConfigStrength(uint32_t port, uint8_t pins, uint32_t strength)
73 if (strength == GPIO_STRENGTH_2MA)
75 HWREG(port + GPIO_O_DR2R) |= pins;
76 HWREG(port + GPIO_O_DR4R) &= ~pins;
77 HWREG(port + GPIO_O_DR8R) &= ~pins;
78 HWREG(port + GPIO_O_SLR) &= ~pins;
80 else if (strength == GPIO_STRENGTH_4MA)
82 HWREG(port + GPIO_O_DR2R) &= ~pins;
83 HWREG(port + GPIO_O_DR4R) |= pins;
84 HWREG(port + GPIO_O_DR8R) &= ~pins;
85 HWREG(port + GPIO_O_SLR) &= ~pins;
87 else if (strength == GPIO_STRENGTH_8MA)
89 HWREG(port + GPIO_O_DR2R) &= ~pins;
90 HWREG(port + GPIO_O_DR4R) &= ~pins;
91 HWREG(port + GPIO_O_DR8R) |= pins;
92 HWREG(port + GPIO_O_SLR) &= ~pins;
94 else if (strength == GPIO_STRENGTH_8MA_SC)
96 HWREG(port + GPIO_O_DR2R) &= ~pins;
97 HWREG(port + GPIO_O_DR4R) &= ~pins;
98 HWREG(port + GPIO_O_DR8R) |= pins;
99 HWREG(port + GPIO_O_SLR) |= pins;
109 /* Set the pin(s) type */
110 INLINE int lm3s_gpioPinConfigType(uint32_t port, uint8_t pins, uint32_t type)
112 if (type == GPIO_PIN_TYPE_STD)
114 HWREG(port + GPIO_O_ODR) &= ~pins;
115 HWREG(port + GPIO_O_PUR) &= ~pins;
116 HWREG(port + GPIO_O_PDR) &= ~pins;
117 HWREG(port + GPIO_O_DEN) |= pins;
118 HWREG(port + GPIO_O_AMSEL) &= ~pins;
120 else if (type == GPIO_PIN_TYPE_STD_WPU)
122 HWREG(port + GPIO_O_ODR) &= ~pins;
123 HWREG(port + GPIO_O_PUR) |= pins;
124 HWREG(port + GPIO_O_PDR) &= ~pins;
125 HWREG(port + GPIO_O_DEN) |= pins;
126 HWREG(port + GPIO_O_AMSEL) &= ~pins;
128 else if (type == GPIO_PIN_TYPE_STD_WPD)
130 HWREG(port + GPIO_O_ODR) &= ~pins;
131 HWREG(port + GPIO_O_PUR) &= ~pins;
132 HWREG(port + GPIO_O_PDR) |= pins;
133 HWREG(port + GPIO_O_DEN) |= pins;
134 HWREG(port + GPIO_O_AMSEL) &= ~pins;
136 else if (type == GPIO_PIN_TYPE_OD)
138 HWREG(port + GPIO_O_ODR) |= pins;
139 HWREG(port + GPIO_O_PUR) &= ~pins;
140 HWREG(port + GPIO_O_PDR) &= ~pins;
141 HWREG(port + GPIO_O_DEN) |= pins;
142 HWREG(port + GPIO_O_AMSEL) &= ~pins;
144 else if (type == GPIO_PIN_TYPE_OD_WPU)
146 HWREG(port + GPIO_O_ODR) |= pins;
147 HWREG(port + GPIO_O_PUR) |= pins;
148 HWREG(port + GPIO_O_PDR) &= ~pins;
149 HWREG(port + GPIO_O_DEN) |= pins;
150 HWREG(port + GPIO_O_AMSEL) &= ~pins;
152 else if (type == GPIO_PIN_TYPE_OD_WPD)
154 HWREG(port + GPIO_O_ODR) |= pins;
155 HWREG(port + GPIO_O_PUR) &= pins;
156 HWREG(port + GPIO_O_PDR) |= pins;
157 HWREG(port + GPIO_O_DEN) |= pins;
158 HWREG(port + GPIO_O_AMSEL) &= ~pins;
160 else if (type == GPIO_PIN_TYPE_ANALOG)
162 HWREG(port + GPIO_O_ODR) &= ~pins;
163 HWREG(port + GPIO_O_PUR) &= ~pins;
164 HWREG(port + GPIO_O_PDR) &= ~pins;
165 HWREG(port + GPIO_O_DEN) &= ~pins;
166 HWREG(port + GPIO_O_AMSEL) |= pins;
177 * Configure a GPIO pin
179 * \param port Base address of the GPIO port
180 * \param pins Bit-packed representation of the pin(s)
181 * \param mode Pin(s) configuration mode
182 * \param strength Output drive strength
183 * \param type Pin(s) type
185 * Return 0 on success, otherwise a negative value.
187 int lm3s_gpioPinConfig(uint32_t port, uint8_t pins,
188 uint32_t mode, uint32_t strength, uint32_t type)
192 ret = lm3s_gpioPinConfigMode(port, pins, mode);
193 if (UNLIKELY(ret < 0))
195 ret = lm3s_gpioPinConfigStrength(port, pins, strength);
196 if (UNLIKELY(ret < 0))
198 ret = lm3s_gpioPinConfigType(port, pins, type);
199 if (UNLIKELY(ret < 0))