4 * This file is part of BeRTOS.
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29 * Copyright 2010 Develer S.r.l. (http://www.develer.com/)
33 * \brief Driver for the LM3S I2C (implementation)
35 * \author Daniele Basile <asterix@develer.com>
39 #include "cfg/cfg_i2c.h"
41 #define LOG_LEVEL I2C_LOG_LEVEL
42 #define LOG_FORMAT I2C_LOG_FORMAT
46 #include <cfg/debug.h>
47 #include <cfg/macros.h> // BV()
48 #include <cfg/module.h>
50 #include <cpu/detect.h>
52 #include <cpu/types.h>
53 #include <cpu/power.h>
57 #include <drv/timer.h>
59 #include <drv/gpio_lm3s.h>
60 #include <drv/clock_lm3s.h>
73 #define WAIT_BUSY(base) \
75 while (HWREG(base + I2C_O_MCS) & I2C_MCS_BUSY ) \
81 * The start is not performed when we call the start function
82 * because the hardware should know the first data byte to send.
83 * Generally to perform a byte send we should write the slave address
84 * in slave address register and the first byte to send in data registry.
85 * After then we can perform the start write procedure, and send really
86 * the our data. To use common bertos i2c api the really start will be
87 * performed when the user "put" or "send" its data. These tricks are hide
88 * from the driver implementation.
90 static void i2c_lm3s_start(struct I2c *i2c, uint16_t slave_addr)
92 i2c->hw->first_xtranf = true;
94 if (I2C_TEST_START(i2c->flags) == I2C_START_W)
95 HWREG(i2c->hw->base + I2C_O_MSA) = slave_addr & ~BV(0);
96 else /* (I2C_TEST_START(i2c->flags) == I2C_START_R) */
97 HWREG(i2c->hw->base + I2C_O_MSA) = slave_addr | BV(0);
100 INLINE bool wait_addrAck(I2c *i2c, uint32_t mode_mask)
102 ticks_t start = timer_clock();
105 uint32_t status = HWREG(i2c->hw->base + I2C_O_MCS);
107 if (timer_clock() - start > ms_to_ticks(CONFIG_I2C_START_TIMEOUT))
110 if(status & I2C_MCS_ADRACK)
112 HWREG(i2c->hw->base + I2C_O_MCS) = mode_mask;
113 WAIT_BUSY(i2c->hw->base);
123 static void i2c_lm3s_putc(I2c *i2c, const uint8_t data)
125 HWREG(i2c->hw->base + I2C_O_MDR) = data;
127 if (i2c->hw->first_xtranf)
129 HWREG(i2c->hw->base + I2C_O_MCS) = I2C_MCS_RUN | I2C_MCS_START;
130 while( HWREG(i2c->hw->base + I2C_O_MCS) & I2C_MCS_BUSY );
132 if (!wait_addrAck(i2c, I2C_MCS_RUN | I2C_MCS_START))
134 LOG_ERR("Start timeout\n");
135 i2c->errors |= I2C_START_TIMEOUT;
136 HWREG(i2c->hw->base + I2C_O_MCS) = I2C_MCS_STOP;
137 WAIT_BUSY(i2c->hw->base);
141 i2c->hw->first_xtranf = false;
145 HWREG(i2c->hw->base + I2C_O_MCS) = I2C_MCS_RUN;
146 WAIT_BUSY(i2c->hw->base);
149 if ((i2c->xfer_size == 1) && (I2C_TEST_STOP(i2c->flags) == I2C_STOP))
151 HWREG(i2c->hw->base + I2C_O_MCS) = I2C_MCS_STOP;
152 WAIT_BUSY(i2c->hw->base);
156 static uint8_t i2c_lm3s_getc(I2c *i2c)
159 if (i2c->hw->first_xtranf)
162 if (i2c->xfer_size == 1)
163 start_mode = I2C_MCS_RUN | I2C_MCS_START;
165 start_mode = I2C_MCS_ACK | I2C_MCS_RUN | I2C_MCS_START;
167 HWREG(i2c->hw->base + I2C_O_MCS) = start_mode;
168 WAIT_BUSY(i2c->hw->base);
169 if (!wait_addrAck(i2c, start_mode))
171 LOG_ERR("Start timeout\n");
172 i2c->errors |= I2C_START_TIMEOUT;
173 HWREG(i2c->hw->base + I2C_O_MCS) = I2C_MCS_STOP;
174 WAIT_BUSY(i2c->hw->base);
178 data = HWREG(i2c->hw->base + I2C_O_MDR);
179 i2c->hw->first_xtranf = false;
183 if (i2c->xfer_size > 1)
184 HWREG(i2c->hw->base + I2C_O_MCS) = I2C_MCS_ACK | I2C_MCS_RUN;
186 HWREG(i2c->hw->base + I2C_O_MCS) = I2C_MCS_RUN;
188 WAIT_BUSY(i2c->hw->base);
189 data = HWREG(i2c->hw->base + I2C_O_MDR);
192 if ((i2c->xfer_size == 1) && (I2C_TEST_STOP(i2c->flags) == I2C_STOP))
194 HWREG(i2c->hw->base + I2C_O_MCS) = I2C_MCS_STOP;
195 WAIT_BUSY(i2c->hw->base);
202 static const I2cVT i2c_lm3s_vt =
204 .start = i2c_lm3s_start,
205 .getc = i2c_lm3s_getc,
206 .putc = i2c_lm3s_putc,
207 .write = i2c_genericWrite,
208 .read = i2c_genericRead,
211 struct I2cHardware i2c_lm3s_hw[] =
214 .base = I2C0_MASTER_BASE,
215 .sys_cntl = SYSCTL_RCGC1_I2C0,
216 .sys_gpio = SYSCTL_RCGC2_GPIOB,
217 .pin_mask = (GPIO_I2C0_SCL_PIN | GPIO_I2C0_SDA_PIN),
218 .gpio_base = GPIO_PORTB_BASE,
221 .base = I2C1_MASTER_BASE,
222 .sys_cntl = SYSCTL_RCGC1_I2C1,
223 .sys_gpio = SYSCTL_RCGC2_GPIOA,
224 .pin_mask = (GPIO_I2C1_SCL_PIN | GPIO_I2C1_SDA_PIN),
225 .gpio_base = GPIO_PORTA_BASE,
230 * Initialize I2C module.
232 void i2c_hw_init(I2c *i2c, int dev, uint32_t clock)
234 i2c->hw = &i2c_lm3s_hw[dev];
235 i2c->vt = &i2c_lm3s_vt;
237 /* Enable the peripheral clock */
238 SYSCTL_RCGC1_R |= i2c->hw->sys_cntl;
239 SYSCTL_RCGC2_R |= i2c->hw->sys_gpio;
241 /* Configure GPIO pins to work as I2C pins */
242 lm3s_gpioPinConfig(i2c->hw->gpio_base, i2c->hw->pin_mask,
243 GPIO_DIR_MODE_HW, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_OD_WPU);
245 * Note: to set correctly the i2c speed we shold before enable the i2c
246 * device and then set in master time period the correct value
249 /* Enable i2c device */
250 HWREG(i2c->hw->base + I2C_O_MCR) |= I2C_MCR_MFE;
253 * Compute the clock divider that achieves the fastest speed less than or
254 * equal to the desired speed. The numerator is biased to favor a larger
255 * clock divider so that the resulting clock is always less than or equal
256 * to the desired clock, never greater.
258 HWREG(i2c->hw->base + I2C_O_MTPR) = ((CPU_FREQ + (2 * 10 * clock) - 1) / (2 * 10 * clock)) - 1;