4 * This file is part of BeRTOS.
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18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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29 * Copyright 2010 Develer S.r.l. (http://www.develer.com/)
33 * \brief Driver for the LM3S I2C (implementation)
35 * \author Daniele Basile <asterix@develer.com>
39 #include "cfg/cfg_i2c.h"
41 #define LOG_LEVEL I2C_LOG_LEVEL
42 #define LOG_FORMAT I2C_LOG_FORMAT
46 #include <cfg/debug.h>
47 #include <cfg/macros.h> // BV()
49 #include <cpu/detect.h>
51 #include <cpu/types.h>
52 #include <cpu/power.h>
56 #include <drv/timer.h>
58 #include <drv/gpio_lm3s.h>
59 #include <drv/clock_lm3s.h>
72 #define WAIT_BUSY(base) \
74 while (HWREG(base + I2C_O_MCS) & I2C_MCS_BUSY ) \
80 * The start is not performed when we call the start function
81 * because the hardware should know the first data byte to send.
82 * Generally to perform a byte send we should write the slave address
83 * in slave address register and the first byte to send in data registry.
84 * After then we can perform the start write procedure, and send really
85 * the our data. To use common bertos i2c api the really start will be
86 * performed when the user "put" or "send" its data. These tricks are hide
87 * from the driver implementation.
89 static void i2c_lm3s_start(struct I2c *i2c, uint16_t slave_addr)
91 i2c->hw->first_xtranf = true;
93 if (I2C_TEST_START(i2c->flags) == I2C_START_W)
94 HWREG(i2c->hw->base + I2C_O_MSA) = slave_addr & ~BV(0);
95 else /* (I2C_TEST_START(i2c->flags) == I2C_START_R) */
96 HWREG(i2c->hw->base + I2C_O_MSA) = slave_addr | BV(0);
99 INLINE bool wait_addrAck(I2c *i2c, uint32_t mode_mask)
101 ticks_t start = timer_clock();
104 uint32_t status = HWREG(i2c->hw->base + I2C_O_MCS);
106 if (timer_clock() - start > ms_to_ticks(CONFIG_I2C_START_TIMEOUT))
109 if(status & I2C_MCS_ADRACK)
111 HWREG(i2c->hw->base + I2C_O_MCS) = mode_mask;
112 WAIT_BUSY(i2c->hw->base);
122 static void i2c_lm3s_putc(I2c *i2c, const uint8_t data)
124 HWREG(i2c->hw->base + I2C_O_MDR) = data;
126 if (i2c->hw->first_xtranf)
128 HWREG(i2c->hw->base + I2C_O_MCS) = I2C_MCS_RUN | I2C_MCS_START;
129 while( HWREG(i2c->hw->base + I2C_O_MCS) & I2C_MCS_BUSY );
131 if (!wait_addrAck(i2c, I2C_MCS_RUN | I2C_MCS_START))
133 LOG_ERR("Start timeout\n");
134 i2c->errors |= I2C_START_TIMEOUT;
135 HWREG(i2c->hw->base + I2C_O_MCS) = I2C_MCS_STOP;
136 WAIT_BUSY(i2c->hw->base);
140 i2c->hw->first_xtranf = false;
144 HWREG(i2c->hw->base + I2C_O_MCS) = I2C_MCS_RUN;
145 WAIT_BUSY(i2c->hw->base);
148 if ((i2c->xfer_size == 1) && (I2C_TEST_STOP(i2c->flags) == I2C_STOP))
150 HWREG(i2c->hw->base + I2C_O_MCS) = I2C_MCS_STOP;
151 WAIT_BUSY(i2c->hw->base);
155 static uint8_t i2c_lm3s_getc(I2c *i2c)
158 if (i2c->hw->first_xtranf)
161 if (i2c->xfer_size == 1)
162 start_mode = I2C_MCS_RUN | I2C_MCS_START;
164 start_mode = I2C_MCS_ACK | I2C_MCS_RUN | I2C_MCS_START;
166 HWREG(i2c->hw->base + I2C_O_MCS) = start_mode;
167 WAIT_BUSY(i2c->hw->base);
168 if (!wait_addrAck(i2c, start_mode))
170 LOG_ERR("Start timeout\n");
171 i2c->errors |= I2C_START_TIMEOUT;
172 HWREG(i2c->hw->base + I2C_O_MCS) = I2C_MCS_STOP;
173 WAIT_BUSY(i2c->hw->base);
177 data = HWREG(i2c->hw->base + I2C_O_MDR);
178 i2c->hw->first_xtranf = false;
182 if (i2c->xfer_size > 1)
183 HWREG(i2c->hw->base + I2C_O_MCS) = I2C_MCS_ACK | I2C_MCS_RUN;
185 HWREG(i2c->hw->base + I2C_O_MCS) = I2C_MCS_RUN;
187 WAIT_BUSY(i2c->hw->base);
188 data = HWREG(i2c->hw->base + I2C_O_MDR);
191 if ((i2c->xfer_size == 1) && (I2C_TEST_STOP(i2c->flags) == I2C_STOP))
193 HWREG(i2c->hw->base + I2C_O_MCS) = I2C_MCS_STOP;
194 WAIT_BUSY(i2c->hw->base);
199 static const I2cVT i2c_lm3s_vt =
201 .start = i2c_lm3s_start,
202 .getc = i2c_lm3s_getc,
203 .putc = i2c_lm3s_putc,
204 .write = i2c_genericWrite,
205 .read = i2c_genericRead,
208 static struct I2cHardware i2c_lm3s_hw[] =
211 .base = I2C0_MASTER_BASE,
212 .sys_cntl = SYSCTL_RCGC1_I2C0,
213 .sys_gpio = SYSCTL_RCGC2_GPIOB,
214 .pin_mask = (GPIO_I2C0_SCL_PIN | GPIO_I2C0_SDA_PIN),
215 .gpio_base = GPIO_PORTB_BASE,
218 .base = I2C1_MASTER_BASE,
219 .sys_cntl = SYSCTL_RCGC1_I2C1,
220 .sys_gpio = SYSCTL_RCGC2_GPIOA,
221 .pin_mask = (GPIO_I2C1_SCL_PIN | GPIO_I2C1_SDA_PIN),
222 .gpio_base = GPIO_PORTA_BASE,
227 * Initialize I2C module.
229 void i2c_hw_init(I2c *i2c, int dev, uint32_t clock)
231 i2c->hw = &i2c_lm3s_hw[dev];
232 i2c->vt = &i2c_lm3s_vt;
234 /* Enable the peripheral clock */
235 SYSCTL_RCGC1_R |= i2c->hw->sys_cntl;
236 SYSCTL_RCGC2_R |= i2c->hw->sys_gpio;
238 /* Configure GPIO pins to work as I2C pins */
239 lm3s_gpioPinConfig(i2c->hw->gpio_base, i2c->hw->pin_mask,
240 GPIO_DIR_MODE_HW, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_OD_WPU);
242 * Note: to set correctly the i2c speed we shold before enable the i2c
243 * device and then set in master time period the correct value
246 /* Enable i2c device */
247 HWREG(i2c->hw->base + I2C_O_MCR) |= I2C_MCR_MFE;
250 * Compute the clock divider that achieves the fastest speed less than or
251 * equal to the desired speed. The numerator is biased to favor a larger
252 * clock divider so that the resulting clock is always less than or equal
253 * to the desired clock, never greater.
255 HWREG(i2c->hw->base + I2C_O_MTPR) = ((CPU_FREQ + (2 * 10 * clock) - 1) / (2 * 10 * clock)) - 1;