4 * This file is part of BeRTOS.
6 * Bertos is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 * As a special exception, you may use this file as part of a free software
21 * library without restriction. Specifically, if other files instantiate
22 * templates or use macros or inline functions from this file, or you compile
23 * this file and link it with other files to produce an executable, this
24 * file does not by itself cause the resulting executable to be covered by
25 * the GNU General Public License. This exception does not however
26 * invalidate any other reasons why the executable file might be covered by
27 * the GNU General Public License.
29 * Copyright 2010 Develer S.r.l. (http://www.develer.com/)
33 * \brief AT91SAM3 debug support (implementation).
35 * \author Stefano Fedrigo <aleph@develer.com>
38 #include <cfg/cfg_debug.h>
39 #include <cfg/macros.h> /* for BV() */
41 #include <io/sam3_gpio.h>
42 #include <io/sam3_pmc.h>
43 #include <io/sam3_uart.h>
46 #if CONFIG_KDEBUG_PORT == 0
47 #define UART_BASE UART0_BASE
48 #define UART_INT INT_UART0
49 #define UART_GPIO_BASE GPIO_PORTA_BASE
50 #ifdef CPU_CM3_AT91SAM3U
51 #define UART_PINS (BV(12) | BV(11))
53 #define UART_PINS (BV(10) | BV(9))
55 #elif (CONFIG_KDEBUG_PORT == 1) && !defined(CPU_CM3_AT91SAM3U)
56 #define UART_BASE UART1_BASE
57 #define UART_INT INT_UART1
58 #define UART_GPIO_BASE GPIO_PORTB_BASE
59 #define UART_PINS (BV(3) | BV(2))
61 #error "UART port not supported in this board"
64 // TODO: refactor serial simple functions and use them, see lm3s kdebug
65 #define KDBG_WAIT_READY() while (!(HWREG(UART_BASE + UART_SR) & UART_SR_TXRDY)) {}
66 #define KDBG_WAIT_TXDONE() while (!(HWREG(UART_BASE + UART_SR) & UART_SR_TXEMPTY)) {}
68 #define KDBG_WRITE_CHAR(c) do { HWREG(UART_BASE + UART_THR) = (c); } while(0)
70 /* Debug unit is used only for debug purposes so does not generate interrupts. */
71 #define KDBG_MASK_IRQ(old) do { (void)old; } while(0)
73 /* Debug unit is used only for debug purposes so does not generate interrupts. */
74 #define KDBG_RESTORE_IRQ(old) do { (void)old; } while(0)
76 typedef uint32_t kdbg_irqsave_t;
79 INLINE void kdbg_hw_init(void)
81 /* Disable PIO mode and set appropriate UART pins peripheral mode */
82 HWREG(UART_GPIO_BASE + GPIO_PDR) = UART_PINS;
83 HWREG(UART_GPIO_BASE + GPIO_ABCDSR1) &= ~UART_PINS;
84 HWREG(UART_GPIO_BASE + GPIO_ABCDSR2) &= ~UART_PINS;
86 /* Enable the peripheral clock */
87 PMC_PCER_R = UART_INT;
89 /* Reset and disable receiver & transmitter */
90 HWREG(UART_BASE + UART_CR) = UART_CR_RSTRX | UART_CR_RSTTX | UART_CR_RXDIS | UART_CR_TXDIS;
92 /* Set mode: normal, no parity */
93 HWREG(UART_BASE + UART_MR) = UART_MR_PAR_NO;
96 HWREG(UART_BASE + UART_BRGR) = CPU_FREQ / CONFIG_KDEBUG_BAUDRATE / 16;
98 /* Enable receiver & transmitter */
99 HWREG(UART_BASE + UART_CR) = UART_CR_RXEN | UART_CR_TXEN;