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29 * Copyright 2011 Develer S.r.l. (http://www.develer.com/)
33 * \brief Micron MT29F serial NAND driver for SAM3's static memory controller.
35 * \author Stefano Fedrigo <aleph@develer.com>
38 #include "mt29f_sam3.h"
39 #include "cfg/cfg_mt29f.h"
41 // Define log settings for cfg/log.h
42 #define LOG_LEVEL CONFIG_MT29F_LOG_LEVEL
43 #define LOG_FORMAT CONFIG_MT29F_LOG_FORMAT
46 #include <cfg/macros.h>
48 #include <drv/timer.h>
49 #include <drv/mt29f.h>
50 #include <struct/heap.h>
51 #include <cpu/power.h> /* cpu_relax() */
52 #include <cpu/types.h>
54 #include <string.h> /* memcpy() */
56 // Timeout for NAND operations in ms
57 #define MT29F_TMOUT 100
59 // NAND flash status codes
60 #define MT29F_STATUS_READY BV(6)
61 #define MT29F_STATUS_ERROR BV(0)
63 // NAND flash commands
64 #define MT29F_CMD_READ_1 0x00
65 #define MT29F_CMD_READ_2 0x30
66 #define MT29F_CMD_COPYBACK_READ_1 0x00
67 #define MT29F_CMD_COPYBACK_READ_2 0x35
68 #define MT29F_CMD_COPYBACK_PROGRAM_1 0x85
69 #define MT29F_CMD_COPYBACK_PROGRAM_2 0x10
70 #define MT29F_CMD_RANDOM_OUT 0x05
71 #define MT29F_CMD_RANDOM_OUT_2 0xE0
72 #define MT29F_CMD_RANDOM_IN 0x85
73 #define MT29F_CMD_READID 0x90
74 #define MT29F_CMD_WRITE_1 0x80
75 #define MT29F_CMD_WRITE_2 0x10
76 #define MT29F_CMD_ERASE_1 0x60
77 #define MT29F_CMD_ERASE_2 0xD0
78 #define MT29F_CMD_STATUS 0x70
79 #define MT29F_CMD_RESET 0xFF
81 // Addresses for sending command, addresses and data bytes to flash
82 #define MT29F_CMD_ADDR 0x60400000
83 #define MT29F_ADDR_ADDR 0x60200000
84 #define MT29F_DATA_ADDR 0x60000000
86 // Get chip select mask for command register
87 #define MT29F_CSID(chip) (((chip)->chip_select << NFC_CMD_CSID_SHIFT) & NFC_CMD_CSID_MASK)
89 // Get block from page
90 #define PAGE(blk) ((blk) * MT29F_PAGES_PER_BLOCK)
92 // Page from block and page in block
93 #define BLOCK(page) ((uint16_t)((page) / MT29F_PAGES_PER_BLOCK))
94 #define PAGE_IN_BLOCK(page) ((uint16_t)((page) % MT29F_PAGES_PER_BLOCK))
98 * Remap info written in the first page of each block
99 * used to remap bad blocks.
103 uint32_t tag; // Magic number to detect valid info
104 uint16_t mapped_blk; // Bad block the block containing this info is remapping
109 * Translate flash page index plus a byte offset
110 * in the five address cycles format needed by NAND.
112 * Cycles in x8 mode as the MT29F2G08AAD
113 * CA = column addr, PA = page addr, BA = block addr
115 * Cycle I/O7 I/O6 I/O5 I/O4 I/O3 I/O2 I/O1 I/O0
116 * -------------------------------------------------------
117 * First CA7 CA6 CA5 CA4 CA3 CA2 CA1 CA0
118 * Second LOW LOW LOW LOW CA11 CA10 CA9 CA8
119 * Third BA7 BA6 PA5 PA4 PA3 PA2 PA1 PA0
120 * Fourth BA15 BA14 BA13 BA12 BA11 BA10 BA9 BA8
121 * Fifth LOW LOW LOW LOW LOW LOW LOW BA16
123 static void getAddrCycles(uint32_t page, uint16_t offset, uint32_t *cycle0, uint32_t *cycle1234)
125 ASSERT(offset < MT29F_PAGE_SIZE);
127 *cycle0 = offset & 0xff;
128 *cycle1234 = (page << 8) | ((offset >> 8) & 0xf);
130 //LOG_INFO("mt29f addr: %lx %lx\n", *cycle1234, *cycle0);
134 INLINE bool nfcIsBusy(void)
136 return HWREG(NFC_CMD_BASE_ADDR + NFC_CMD_NFCCMD) & 0x8000000;
141 * Return true if SMC/NFC controller completed the last operations.
143 INLINE bool isCmdDone(void)
145 return SMC_SR & SMC_SR_CMDDONE;
150 * Wait for edge transition of READY/BUSY NAND
152 * Return true for edge detection, false in case of timeout.
154 static bool waitReadyBusy(void)
156 time_t start = timer_clock();
158 while (!(SMC_SR & SMC_SR_RB_EDGE0))
161 if (timer_clock() - start > MT29F_TMOUT)
163 LOG_INFO("mt29f: R/B timeout\n");
172 * Wait for transfer to complete until timeout.
173 * If transfer completes return true, false in case of timeout.
175 static bool waitTransferComplete(void)
177 time_t start = timer_clock();
179 while (!(SMC_SR & SMC_SR_XFRDONE))
182 if (timer_clock() - start > MT29F_TMOUT)
184 LOG_INFO("mt29f: xfer complete timeout\n");
194 * Send command to NAND and wait for completion.
196 static void sendCommand(uint32_t cmd,
197 int num_cycles, uint32_t cycle0, uint32_t cycle1234)
206 cmd_addr = (reg32_t *)(NFC_CMD_BASE_ADDR + cmd);
207 *cmd_addr = cycle1234;
209 while (!isCmdDone());
213 static bool isOperationComplete(Mt29f *chip)
217 sendCommand(MT29F_CSID(chip) |
218 NFC_CMD_NFCCMD | NFC_CMD_ACYCLE_NONE |
219 MT29F_CMD_STATUS << 2,
222 status = (uint8_t)HWREG(MT29F_DATA_ADDR);
223 return (status & MT29F_STATUS_READY) && !(status & MT29F_STATUS_ERROR);
227 static void chipReset(Mt29f *chip)
229 sendCommand(MT29F_CSID(chip) |
230 NFC_CMD_NFCCMD | NFC_CMD_ACYCLE_NONE |
231 MT29F_CMD_RESET << 2,
239 * Erase the whole block.
241 int mt29f_blockErase(Mt29f *chip, uint16_t block)
246 uint16_t remapped_block = chip->block_map[block];
247 if (block != remapped_block)
249 LOG_INFO("mt29f_blockErase: remapped block: blk %d->%d\n", block, remapped_block);
250 block = remapped_block;
253 getAddrCycles(PAGE(block), 0, &cycle0, &cycle1234);
255 sendCommand(MT29F_CSID(chip) |
256 NFC_CMD_NFCCMD | NFC_CMD_ACYCLE_THREE | NFC_CMD_VCMD2 |
257 (MT29F_CMD_ERASE_2 << 10) | (MT29F_CMD_ERASE_1 << 2),
258 3, 0, cycle1234 >> 8);
262 if (!isOperationComplete(chip))
264 LOG_ERR("mt29f: error erasing block\n");
265 chip->status |= MT29F_ERR_ERASE;
274 * Read Device ID and configuration codes.
276 bool mt29f_getDevId(Mt29f *chip, uint8_t dev_id[5])
278 sendCommand(MT29F_CSID(chip) |
279 NFC_CMD_NFCCMD | NFC_CMD_NFCEN | NFC_CMD_ACYCLE_ONE |
280 MT29F_CMD_READID << 2,
284 if (!waitTransferComplete())
286 LOG_ERR("mt29f: getDevId timeout\n");
287 chip->status |= MT29F_ERR_RD_TMOUT;
291 memcpy(dev_id, (void *)NFC_SRAM_BASE_ADDR, 5);
296 static bool checkEcc(Mt29f *chip)
298 struct RemapInfo *remap_info = (struct RemapInfo *)(NFC_SRAM_BASE_ADDR + MT29F_REMAP_TAG_OFFSET);
301 * Check for ECC hardware status only if a valid RemapInfo structure is found.
302 * That guarantees we wrote the block and a valid ECC is present.
304 if (remap_info->tag == MT29F_REMAP_TAG)
306 uint32_t sr1 = SMC_ECC_SR1;
309 LOG_INFO("ECC error, ECC_SR1=0x%lx\n", sr1);
310 chip->status |= MT29F_ERR_ECC;
319 static bool mt29f_readPage(Mt29f *chip, uint32_t page, uint16_t offset)
324 //LOG_INFO("mt29f_readPage: page 0x%lx off 0x%x\n", page, offset);
326 getAddrCycles(page, offset, &cycle0, &cycle1234);
328 sendCommand(MT29F_CSID(chip) |
329 NFC_CMD_NFCCMD | NFC_CMD_NFCEN | NFC_CMD_ACYCLE_FIVE | NFC_CMD_VCMD2 |
330 (MT29F_CMD_READ_2 << 10) | (MT29F_CMD_READ_1 << 2),
331 5, cycle0, cycle1234);
334 if (!waitTransferComplete())
336 LOG_ERR("mt29f: read timeout\n");
337 chip->status |= MT29F_ERR_RD_TMOUT;
346 * Read page data and ECC, checking for errors.
347 * TODO: fix errors with ECC when possible.
349 static bool mt29f_read(Mt29f *chip, uint32_t page, void *buf, uint16_t size)
351 uint32_t remapped_page = PAGE(chip->block_map[BLOCK(page)]) + PAGE_IN_BLOCK(page);
353 if (page != remapped_page)
355 LOG_INFO("mt29f_read: remapped block: blk %d->%d, pg %ld->%ld\n",
356 BLOCK(page), chip->block_map[BLOCK(page)], page, remapped_page);
357 page = remapped_page;
360 if (!mt29f_readPage(chip, page, 0))
363 memcpy(buf, (void *)NFC_SRAM_BASE_ADDR, size);
365 return checkEcc(chip);
370 * Write data in NFC SRAM buffer to a NAND page, starting at a given offset.
371 * Usually offset will be 0 to write data or MT29F_DATA_SIZE to write the spare
374 * According to datasheet to get ECC computed by hardware is sufficient
375 * to write the main area. But it seems that in that way the last ECC_PR
376 * register is not generated. The workaround is to write data and dummy (ff)
377 * spare data in one write, at this point the last ECC_PR is correct and
378 * ECC data can be written in the spare area with a second program operation.
380 static bool mt29f_writePage(Mt29f *chip, uint32_t page, uint16_t offset)
385 //LOG_INFO("mt29f_writePage: page 0x%lx off 0x%x\n", page, offset);
387 getAddrCycles(page, offset, &cycle0, &cycle1234);
389 sendCommand(MT29F_CSID(chip) |
390 NFC_CMD_NFCCMD | NFC_CMD_NFCWR | NFC_CMD_NFCEN | NFC_CMD_ACYCLE_FIVE |
391 MT29F_CMD_WRITE_1 << 2,
392 5, cycle0, cycle1234);
394 if (!waitTransferComplete())
396 LOG_ERR("mt29f: write timeout\n");
397 chip->status |= MT29F_ERR_WR_TMOUT;
401 sendCommand(MT29F_CSID(chip) |
402 NFC_CMD_NFCCMD | NFC_CMD_ACYCLE_NONE |
403 MT29F_CMD_WRITE_2 << 2,
408 if (!isOperationComplete(chip))
410 LOG_ERR("mt29f: error writing page\n");
411 chip->status |= MT29F_ERR_WRITE;
420 * Write data in a page.
422 static bool mt29f_writePageData(Mt29f *chip, uint32_t page, const void *buf, uint16_t size)
424 ASSERT(size <= MT29F_DATA_SIZE);
426 memset((void *)NFC_SRAM_BASE_ADDR, 0xff, MT29F_PAGE_SIZE);
427 memcpy((void *)NFC_SRAM_BASE_ADDR, buf, size);
429 return mt29f_writePage(chip, page, 0);
434 * Write the spare area in a page: ECC and remap block index.
435 * \param page the page to be written
436 * \parma original_page if different from page, it's the page that's being remapped
438 * ECC data are extracted from ECC_PRx registers and written
439 * in the page's spare area.
440 * For 2048 bytes pages and 1 ECC word each 256 bytes,
441 * 24 bytes of ECC data are stored.
443 static bool mt29f_writePageSpare(Mt29f *chip, uint32_t page, uint32_t original_page)
446 uint32_t *buf = (uint32_t *)NFC_SRAM_BASE_ADDR;
447 struct RemapInfo *remap_info = (struct RemapInfo *)(NFC_SRAM_BASE_ADDR + MT29F_REMAP_TAG_OFFSET);
449 memset((void *)NFC_SRAM_BASE_ADDR, 0xff, MT29F_SPARE_SIZE);
451 for (i = 0; i < MT29F_ECC_NWORDS; i++)
452 buf[i] = *((reg32_t *)(SMC_BASE + SMC_ECC_PR0_OFF) + i);
455 remap_info->tag = MT29F_REMAP_TAG;
456 remap_info->mapped_blk = BLOCK(original_page);
458 return mt29f_writePage(chip, page, MT29F_DATA_SIZE);
462 static bool mt29f_write(Mt29f *chip, uint32_t page, const void *buf, uint16_t size)
464 uint32_t remapped_page = PAGE(chip->block_map[BLOCK(page)]) + PAGE_IN_BLOCK(page);
466 if (page != remapped_page)
467 LOG_INFO("mt29f_write: remapped block: blk %d->%d, pg %ld->%ld\n",
468 BLOCK(page), chip->block_map[BLOCK(page)], page, remapped_page);
471 mt29f_writePageData(chip, remapped_page, buf, size) &&
472 mt29f_writePageSpare(chip, remapped_page, page);
477 * Check if the given block is marked bad: ONFI standard mandates
478 * that bad block are marked with "00" bytes on the spare area of the
479 * first page in block.
481 static bool blockIsGood(Mt29f *chip, uint16_t blk)
483 uint8_t *first_byte = (uint8_t *)NFC_SRAM_BASE_ADDR;
486 // Check first byte in spare area of first page in block
487 mt29f_readPage(chip, PAGE(blk), MT29F_DATA_SIZE);
488 good = *first_byte != 0;
491 LOG_INFO("mt29f: bad block %d\n", blk);
498 * Return the main partition block remapped on given block in the remap
499 * partition (dest_blk).
501 static int getBadBlockFromRemapBlock(Mt29f *chip, uint16_t dest_blk)
503 struct RemapInfo *remap_info = (struct RemapInfo *)NFC_SRAM_BASE_ADDR;
505 if (!mt29f_readPage(chip, PAGE(dest_blk), MT29F_DATA_SIZE + MT29F_REMAP_TAG_OFFSET))
508 if (remap_info->tag == MT29F_REMAP_TAG)
509 return remap_info->mapped_blk;
516 * Set a block remapping: src_blk (a block in main data partition) is remappend
517 * on dest_blk (block in reserved remapped blocks partition).
519 static bool setMapping(Mt29f *chip, uint32_t src_blk, uint32_t dest_blk)
521 struct RemapInfo *remap_info = (struct RemapInfo *)NFC_SRAM_BASE_ADDR;
523 LOG_INFO("mt29f, setMapping(): src=%ld dst=%ld\n", src_blk, dest_blk);
525 if (!mt29f_readPage(chip, PAGE(dest_blk), MT29F_DATA_SIZE + MT29F_REMAP_TAG_OFFSET))
528 remap_info->tag = MT29F_REMAP_TAG;
529 remap_info->mapped_blk = src_blk;
531 return mt29f_writePage(chip, PAGE(dest_blk), MT29F_DATA_SIZE + MT29F_REMAP_TAG_OFFSET);
536 * Get a new block from the remap partition to use as a substitute
539 static uint16_t getFreeRemapBlock(Mt29f *chip)
543 for (blk = chip->remap_start; blk < MT29F_NUM_BLOCKS; blk++)
545 if (blockIsGood(chip, blk))
547 chip->remap_start = blk + 1;
552 LOG_ERR("mt29f: reserved blocks for bad block remapping exhausted!\n");
558 * Check if NAND is initialized.
560 static bool chipIsMarked(Mt29f *chip)
562 return getBadBlockFromRemapBlock(chip, MT29F_NUM_USER_BLOCKS) != -1;
567 * Initialize NAND (format). Scan NAND for factory marked bad blocks.
568 * All bad blocks found are remapped to the remap partition: each
569 * block in the remap partition used to remap bad blocks is marked.
571 static void initBlockMap(Mt29f *chip)
575 // Default is for each block to not be remapped
576 for (b = 0; b < MT29F_NUM_BLOCKS; b++)
577 chip->block_map[b] = b;
578 chip->remap_start = MT29F_NUM_USER_BLOCKS;
580 if (chipIsMarked(chip))
582 LOG_INFO("mt29f: found initialized NAND, searching for remapped blocks\n");
584 // Scan for assigned blocks in remap area
585 for (b = last = MT29F_NUM_USER_BLOCKS; b < MT29F_NUM_BLOCKS; b++)
587 int remapped_blk = getBadBlockFromRemapBlock(chip, b);
588 if (remapped_blk != -1 && remapped_blk != b)
590 LOG_INFO("mt29f: found remapped block %d->%d\n", remapped_blk, b);
591 chip->block_map[remapped_blk] = b;
595 chip->remap_start = last;
599 bool remapped_anything = false;
601 LOG_INFO("mt29f: found new NAND, searching for bad blocks\n");
603 for (b = 0; b < MT29F_NUM_USER_BLOCKS; b++)
605 if (!blockIsGood(chip, b))
607 chip->block_map[b] = getFreeRemapBlock(chip);
608 setMapping(chip, b, chip->block_map[b]);
609 remapped_anything = true;
610 LOG_INFO("mt29f: found new bad block %d, remapped to %d\n", b, chip->block_map[b]);
615 * If no bad blocks are found (we're lucky!) write a dummy
616 * remap to mark NAND and detect we already scanned it next time.
618 if (!remapped_anything)
620 setMapping(chip, MT29F_NUM_USER_BLOCKS, MT29F_NUM_USER_BLOCKS);
621 LOG_INFO("mt29f: no bad block founds, marked NAND\n");
630 * Reset bad blocks map and erase all blocks.
631 * DON'T USE on production chips: this function will try to erase
632 * factory marked bad blocks too.
634 static void mt29f_wipe(Mt29f *chip)
638 for (b = 0; b < MT29F_NUM_BLOCKS; b++)
640 LOG_INFO("mt29f: erasing block %d\n", b);
641 chip->block_map[b] = b;
642 mt29f_blockErase(chip, b);
644 chip->remap_start = MT29F_NUM_USER_BLOCKS;
648 * Create some bad blocks, erasing them and writing the bad block mark.
650 static void mt29f_ruinSomeBlocks(Mt29f *chip)
652 int bads[] = { 7, 99, 555, 1003, 1004, 1432 };
655 LOG_INFO("mt29f: erasing mark\n");
656 mt29f_blockErase(chip, MT29F_NUM_USER_BLOCKS);
658 for (i = 0; i < countof(bads); i++)
660 LOG_INFO("mt29f: erasing block %d\n", bads[i]);
661 mt29f_blockErase(chip, bads[i]);
663 LOG_INFO("mt29f: marking page %d as bad\n", PAGE(bads[i]));
664 memset((void *)NFC_SRAM_BASE_ADDR, 0, MT29F_SPARE_SIZE);
665 mt29f_writePage(chip, PAGE(bads[i]), MT29F_DATA_SIZE);
672 static void initPio(void)
675 * TODO: put following stuff in hw_ file dependent
676 * Parameters for MT29F8G08AAD
678 pmc_periphEnable(PIOA_ID);
679 pmc_periphEnable(PIOC_ID);
680 pmc_periphEnable(PIOD_ID);
682 PIO_PERIPH_SEL(PIOA_BASE, MT29F_PINS_PORTA, MT29F_PERIPH_PORTA);
683 PIOA_PDR = MT29F_PINS_PORTA;
684 PIOA_PUER = MT29F_PINS_PORTA;
686 PIO_PERIPH_SEL(PIOC_BASE, MT29F_PINS_PORTC, MT29F_PERIPH_PORTC);
687 PIOC_PDR = MT29F_PINS_PORTC;
688 PIOC_PUER = MT29F_PINS_PORTC;
690 PIO_PERIPH_SEL(PIOD_BASE, MT29F_PINS_PORTD, MT29F_PERIPH_PORTD);
691 PIOD_PDR = MT29F_PINS_PORTD;
692 PIOD_PUER = MT29F_PINS_PORTD;
694 pmc_periphEnable(SMC_SDRAMC_ID);
698 static void initSmc(void)
700 SMC_SETUP0 = SMC_SETUP_NWE_SETUP(0)
701 | SMC_SETUP_NCS_WR_SETUP(0)
702 | SMC_SETUP_NRD_SETUP(0)
703 | SMC_SETUP_NCS_RD_SETUP(0);
705 SMC_PULSE0 = SMC_PULSE_NWE_PULSE(2)
706 | SMC_PULSE_NCS_WR_PULSE(3)
707 | SMC_PULSE_NRD_PULSE(2)
708 | SMC_PULSE_NCS_RD_PULSE(3);
710 SMC_CYCLE0 = SMC_CYCLE_NWE_CYCLE(3)
711 | SMC_CYCLE_NRD_CYCLE(3);
713 SMC_TIMINGS0 = SMC_TIMINGS_TCLR(1)
714 | SMC_TIMINGS_TADL(6)
718 | SMC_TIMINGS_RBNSEL(7)
721 SMC_MODE0 = SMC_MODE_READ_MODE
722 | SMC_MODE_WRITE_MODE;
724 SMC_CFG = SMC_CFG_PAGESIZE_PS2048_64
726 | SMC_CFG_DTOMUL_X1048576
727 | SMC_CFG_DTOCYC(0xF)
731 // Disable SMC interrupts, reset and enable NFC controller
734 SMC_CTRL = SMC_CTRL_NFCEN;
736 // Enable ECC, 1 ECC per 256 bytes
737 SMC_ECC_CTRL = SMC_ECC_CTRL_SWRST;
738 SMC_ECC_MD = SMC_ECC_MD_ECC_PAGESIZE_PS2048_64 | SMC_ECC_MD_TYPCORREC_C256B;
742 static bool commonInit(Mt29f *chip, struct Heap *heap, unsigned chip_select)
744 memset(chip, 0, sizeof(Mt29f));
746 DB(chip->fd.priv.type = KBT_NAND);
747 chip->fd.blk_size = MT29F_BLOCK_SIZE;
748 chip->fd.blk_cnt = MT29F_NUM_USER_BLOCKS;
750 chip->chip_select = chip_select;
751 chip->block_map = heap_allocmem(heap, MT29F_NUM_BLOCKS * sizeof(*chip->block_map));
752 if (!chip->block_map)
754 LOG_ERR("mt29f: error allocating block map\n");
767 /**************** Kblock interface ****************/
770 static size_t mt29f_writeDirect(struct KBlock *kblk, block_idx_t idx, const void *buf, size_t offset, size_t size)
772 ASSERT(offset <= MT29F_BLOCK_SIZE);
773 ASSERT(offset % MT29F_DATA_SIZE == 0);
774 ASSERT(size <= MT29F_BLOCK_SIZE);
775 ASSERT(size % MT29F_DATA_SIZE == 0);
777 LOG_INFO("mt29f_writeDirect: blk=%ld\n", idx);
779 mt29f_blockErase(MT29F_CAST(kblk), idx);
781 while (offset < size)
783 uint32_t page = PAGE(idx) + (offset / MT29F_DATA_SIZE);
785 if (!mt29f_write(MT29F_CAST(kblk), page, buf, MT29F_DATA_SIZE))
788 offset += MT29F_DATA_SIZE;
789 buf = (const char *)buf + MT29F_DATA_SIZE;
796 static size_t mt29f_readDirect(struct KBlock *kblk, block_idx_t idx, void *buf, size_t offset, size_t size)
798 ASSERT(offset <= MT29F_BLOCK_SIZE);
799 ASSERT(offset % MT29F_DATA_SIZE == 0);
800 ASSERT(size <= MT29F_BLOCK_SIZE);
801 ASSERT(size % MT29F_DATA_SIZE == 0);
803 LOG_INFO("mt29f_readDirect: blk=%ld\n", idx);
805 while (offset < size)
807 uint32_t page = PAGE(idx) + (offset / MT29F_DATA_SIZE);
809 if (!mt29f_read(MT29F_CAST(kblk), page, buf, MT29F_DATA_SIZE))
812 offset += MT29F_DATA_SIZE;
813 buf = (char *)buf + MT29F_DATA_SIZE;
820 static int mt29f_error(struct KBlock *kblk)
822 Mt29f *chip = MT29F_CAST(kblk);
827 static void mt29f_clearError(struct KBlock *kblk)
829 Mt29f *chip = MT29F_CAST(kblk);
834 static const KBlockVTable mt29f_buffered_vt =
836 .readDirect = mt29f_readDirect,
837 .writeDirect = mt29f_writeDirect,
839 .readBuf = kblock_swReadBuf,
840 .writeBuf = kblock_swWriteBuf,
841 .load = kblock_swLoad,
842 .store = kblock_swStore,
844 .error = mt29f_error,
845 .clearerr = mt29f_clearError,
848 static const KBlockVTable mt29f_unbuffered_vt =
850 .readDirect = mt29f_readDirect,
851 .writeDirect = mt29f_writeDirect,
853 .error = mt29f_error,
854 .clearerr = mt29f_clearError,
858 bool mt29f_init(Mt29f *chip, struct Heap *heap, unsigned chip_select)
860 if (!commonInit(chip, heap, chip_select))
863 chip->fd.priv.vt = &mt29f_buffered_vt;
864 chip->fd.priv.flags |= KB_BUFFERED;
866 chip->fd.priv.buf = heap_allocmem(heap, MT29F_BLOCK_SIZE);
867 if (!chip->fd.priv.buf)
869 LOG_ERR("mt29f: error allocating block buffer\n");
873 // Load the first block in the cache
874 return mt29f_readDirect(&chip->fd, 0, chip->fd.priv.buf, 0, MT29F_DATA_SIZE);
878 bool mt29f_initUnbuffered(Mt29f *chip, struct Heap *heap, unsigned chip_select)
880 chip->fd.priv.vt = &mt29f_unbuffered_vt;
881 return commonInit(chip, heap, chip_select);