bertos/cpu/cortex-m3/drv/ser_lm3s.c

   1 /**
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  29  * Copyright 2010 Develer S.r.l. (http://www.develer.com/)
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  31  * -->
  32  *
  33  * \brief LM3S1968 UART interface driver.
  34  *
  35  * \author Andrea Righi <arighi@develer.com>
  36  */
  37
  38 #include <cfg/macros.h> /* for BV() */
  39 #include <drv/gpio_lm3s.h>
  40 #include <drv/ser_p.h>
  41 #include <drv/ser.h>
  42 #include <drv/irq_cm3.h>
  43 #include "cfg/cfg_ser.h"
  44 #include "ser_lm3s.h"
  45
  46 /* From the high-level serial driver */
  47 extern struct Serial *ser_handles[SER_CNT];
  48
  49 struct CM3Serial
  50 {
  51         struct SerialHardware hw;
  52         bool sending;
  53         uint32_t base;
  54         sysirq_t irq;
  55 };
  56
  57 /* Forward declaration */
  58 static struct CM3Serial UARTDesc[SER_CNT];
  59
  60 /* GPIO descriptor for UART pins */
  61 struct gpio_uart_info
  62 {
  63         /* Sysctl */
  64         uint32_t sysctl;
  65         /* GPIO base address register */
  66         uint32_t base;
  67         /* Pin(s) bitmask */
  68         uint8_t pins;
  69 };
  70
  71 /* Table to retrieve GPIO pins configuration to work as UART pins */
  72 static const struct gpio_uart_info gpio_uart[SER_CNT] =
  73 {
  74         /* UART0 */
  75         {
  76                 .base = GPIO_PORTA_BASE,
  77                 .pins = BV(1) | BV(0),
  78                 .sysctl = SYSCTL_RCGC2_GPIOA,
  79         },
  80         /* UART1 */
  81         {
  82                 .base = GPIO_PORTD_BASE,
  83                 .pins = BV(3) | BV(2),
  84                 .sysctl = SYSCTL_RCGC2_GPIOD,
  85         },
  86         /* UART2 */
  87         {
  88                 .base = GPIO_PORTG_BASE,
  89                 .pins = BV(1) | BV(0),
  90                 .sysctl = SYSCTL_RCGC2_GPIOG,
  91         },
  92 };
  93
  94 void lm3s_uartSetBaudRate(uint32_t base, unsigned long baud)
  95 {
  96         unsigned long div;
  97         bool hi_speed;
  98
  99         if (baud * 16 > CPU_FREQ)
 100         {
 101                 hi_speed = true;
 102                 baud /= 2;
 103         }
 104         div = (CPU_FREQ * 8 / baud + 1) / 2;
 105
 106         lm3s_uartDisable(base);
 107         if (hi_speed)
 108                 HWREG(base + UART_O_CTL) |= UART_CTL_HSE;
 109         else
 110                 HWREG(base + UART_O_CTL) &= ~UART_CTL_HSE;
 111         /* Set the baud rate */
 112         HWREG(base + UART_O_IBRD) = div / 64;
 113         HWREG(base + UART_O_FBRD) = div % 64;
 114         lm3s_uartClear(base);
 115         lm3s_uartEnable(base);
 116 }
 117
 118 void lm3s_uartSetParity(uint32_t base, int parity)
 119 {
 120         /* Set 8-bit word, one stop bit by default */
 121         uint32_t config = UART_LCRH_WLEN_8;
 122
 123         switch(parity)
 124         {
 125         case SER_PARITY_NONE:
 126                 break;
 127         case SER_PARITY_ODD:
 128                 config |= UART_LCRH_PEN;
 129                 break;
 130         case SER_PARITY_EVEN:
 131                 config |= UART_LCRH_EPS | UART_LCRH_PEN;
 132                 break;
 133         default:
 134                 ASSERT(0);
 135                 return;
 136         }
 137         lm3s_uartDisable(base);
 138         HWREG(base + UART_O_LCRH) = config;
 139         lm3s_uartClear(base);
 140         lm3s_uartEnable(base);
 141 }
 142
 143 void lm3s_uartInit(int port)
 144 {
 145         uint32_t reg_clock, base;
 146
 147         ASSERT(port >= 0 && port < SER_CNT);
 148
 149         base = UARTDesc[port].base;
 150         reg_clock = 1 << port;
 151
 152         /* Enable the peripheral clock */
 153         SYSCTL_RCGC1_R |= reg_clock;
 154         SYSCTL_RCGC2_R |= gpio_uart[port].sysctl;
 155         lm3s_busyWait(512);
 156
 157         /* Configure GPIO pins to work as UART pins */
 158         lm3s_gpioPinConfig(gpio_uart[port].base, gpio_uart[port].pins,
 159                         GPIO_DIR_MODE_HW, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD);
 160
 161         /* Set serial param: 115.200 bps, no parity */
 162         lm3s_uartSetBaudRate(base, 115200);
 163         lm3s_uartSetParity(base, SER_PARITY_NONE);
 164 }
 165
 166 static bool tx_sending(struct SerialHardware *_hw)
 167 {
 168         struct CM3Serial *hw = (struct CM3Serial *)_hw;
 169         return hw->sending;
 170 }
 171
 172 static void uart_irq_rx(int port)
 173 {
 174         struct FIFOBuffer *rxfifo = &ser_handles[port]->rxfifo;
 175         uint32_t base = UARTDesc[port].base;
 176         char c;
 177
 178         while (lm3s_uartRxReady(base))
 179         {
 180                 c = HWREG(base + UART_O_DR);
 181                 if (fifo_isfull(rxfifo))
 182                         ser_handles[port]->status |= SERRF_RXFIFOOVERRUN;
 183                 else
 184                         fifo_push(rxfifo, c);
 185         }
 186 }
 187
 188 static void uart_irq_tx(int port)
 189 {
 190         struct FIFOBuffer *txfifo = &ser_handles[port]->txfifo;
 191         uint32_t base = UARTDesc[port].base;
 192
 193         while (lm3s_uartTxReady(base))
 194         {
 195                 if (fifo_isempty(txfifo)) {
 196                         /*
 197                          * Disable TX empty interrupts if there're no more
 198                          * characters to transmit.
 199                          */
 200                         HWREG(base + UART_O_IM) &= ~UART_IM_TXIM;
 201                         UARTDesc[port].sending = false;
 202                         break;
 203                 }
 204                 HWREG(base + UART_O_DR) = fifo_pop(txfifo);
 205         }
 206 }
 207
 208 static void uart_common_irq_handler(int port)
 209 {
 210         uint32_t base = UARTDesc[port].base;
 211         uint32_t status;
 212
 213         /* Read and clear the IRQ status */
 214         status = HWREG(base + UART_O_RIS);
 215
 216         /* Process the IRQ */
 217         if (status & (UART_RIS_RXRIS | UART_RIS_RTRIS))
 218                 uart_irq_rx(port);
 219         if (status & UART_RIS_TXRIS)
 220                 uart_irq_tx(port);
 221 }
 222
 223 static void
 224 lm3s_uartIRQEnable(int port, sysirq_handler_t handler)
 225 {
 226         uint32_t base = UARTDesc[port].base;
 227         sysirq_t irq = UARTDesc[port].irq;
 228
 229         /* Register the IRQ handler */
 230         sysirq_setHandler(irq, handler);
 231         /* Enable RX interrupt in the UART interrupt mask register */
 232         HWREG(base + UART_O_IM) |= UART_IM_RXIM | UART_IM_RTIM;
 233 }
 234
 235 static void lm3s_uartIRQDisable(int port)
 236 {
 237         uint32_t base = UARTDesc[port].base;
 238
 239         HWREG(base + UART_O_IM) &=
 240                         ~(UART_IM_TXIM | UART_IM_RXIM | UART_IM_RTIM);
 241 }
 242
 243 /* UART class definition */
 244 #define UART_PORT(port)                                                         \
 245         /* UART TX and RX buffers */                                            \
 246         static unsigned char                                                    \
 247                 uart ## port ## _txbuffer[CONFIG_UART ## port ## _TXBUFSIZE];   \
 248         static unsigned char                                                    \
 249                 uart ## port ## _rxbuffer[CONFIG_UART ## port ## _RXBUFSIZE];   \
 250                                                                                 \
 251         /* UART interrupt handler */                                            \
 252         static DECLARE_ISR(uart ## port ## _irq_handler)                        \
 253         {                                                                       \
 254                 uart_common_irq_handler(port);                                  \
 255         }                                                                       \
 256                                                                                 \
 257         /* UART public methods */                                               \
 258         static void                                                             \
 259         uart ## port ## _txStart(struct SerialHardware *_hw)                    \
 260         {                                                                       \
 261                 struct FIFOBuffer *txfifo = &ser_handles[port]->txfifo;         \
 262                 struct CM3Serial *hw = (struct CM3Serial *)_hw;                 \
 263                                                                                 \
 264                 if (hw->sending)                                                \
 265                         return;                                                 \
 266                 lm3s_uartPutChar(UART ## port ## _BASE, fifo_pop(txfifo));      \
 267                 if (!fifo_isempty(txfifo))                                      \
 268                 {                                                               \
 269                         HWREG(UART ## port ## _BASE + UART_O_IM) |=             \
 270                                                  UART_IM_TXIM;                  \
 271                         hw->sending = true;                                     \
 272                 }                                                               \
 273         }                                                                       \
 274                                                                                 \
 275         static void                                                             \
 276         uart ## port ## _setbaudrate(UNUSED_ARG(struct SerialHardware *, hw),   \
 277                                                 unsigned long baud)             \
 278         {                                                                       \
 279                 lm3s_uartSetBaudRate(UART ## port ## _BASE, baud);              \
 280         }                                                                       \
 281                                                                                 \
 282         static void                                                             \
 283         uart ## port ## _setparity(UNUSED_ARG(struct SerialHardware *, hw),     \
 284                                                 int parity)                     \
 285         {                                                                       \
 286                 lm3s_uartSetParity(UART ## port ## _BASE, parity);              \
 287         }                                                                       \
 288                                                                                 \
 289         static void                                                             \
 290         uart ## port ## _cleanup(struct SerialHardware *_hw)                    \
 291         {                                                                       \
 292                 struct CM3Serial *hw = (struct CM3Serial *)_hw;                 \
 293                                                                                 \
 294                 hw->sending = false;                                            \
 295                 lm3s_uartIRQDisable(port);                                      \
 296                 lm3s_uartClear(UART ## port ## _BASE);                          \
 297                 lm3s_uartDisable(UART ## port ## _BASE);                        \
 298         }                                                                       \
 299                                                                                 \
 300         static void                                                             \
 301         uart ## port ## _init(UNUSED_ARG(struct SerialHardware *, hw),          \
 302                                 UNUSED_ARG(struct Serial *, ser))               \
 303         {                                                                       \
 304                 lm3s_uartInit(port);                                            \
 305                 lm3s_uartEnable(UART ## port ## _BASE);                         \
 306                 lm3s_uartIRQEnable(port, uart ## port ## _irq_handler);         \
 307         }                                                                       \
 308                                                                                 \
 309         /* UART operations */                                                   \
 310         static const struct SerialHardwareVT UART ## port ## _VT =              \
 311         {                                                                       \
 312                 .init = uart ## port ## _init,                                  \
 313                 .cleanup = uart ## port ## _cleanup,                            \
 314                 .setBaudrate = uart ## port ## _setbaudrate,                    \
 315                 .setParity = uart ## port ## _setparity,                        \
 316                 .txStart = uart ## port ## _txStart,                            \
 317                 .txSending = tx_sending,                                        \
 318         };
 319
 320 /* UART port instances */
 321 UART_PORT(0)
 322 UART_PORT(1)
 323 UART_PORT(2)
 324
 325 static struct CM3Serial UARTDesc[SER_CNT] =
 326 {
 327         {
 328                 .hw = {
 329                         .table = &UART0_VT,
 330                         .txbuffer = uart0_txbuffer,
 331                         .rxbuffer = uart0_rxbuffer,
 332                         .txbuffer_size = sizeof(uart0_txbuffer),
 333                         .rxbuffer_size = sizeof(uart0_rxbuffer),
 334                 },
 335                 .sending = false,
 336                 .base = UART0_BASE,
 337                 .irq = INT_UART0,
 338         },
 339         {
 340                 .hw = {
 341                         .table = &UART1_VT,
 342                         .txbuffer = uart1_txbuffer,
 343                         .rxbuffer = uart1_rxbuffer,
 344                         .txbuffer_size = sizeof(uart1_txbuffer),
 345                         .rxbuffer_size = sizeof(uart1_rxbuffer),
 346                 },
 347                 .sending = false,
 348                 .base = UART1_BASE,
 349                 .irq = INT_UART1,
 350         },
 351         {
 352                 .hw = {
 353                         .table = &UART2_VT,
 354                         .txbuffer = uart2_txbuffer,
 355                         .rxbuffer = uart2_rxbuffer,
 356                         .txbuffer_size = sizeof(uart2_txbuffer),
 357                         .rxbuffer_size = sizeof(uart2_rxbuffer),
 358                 },
 359                 .sending = false,
 360                 .base = UART2_BASE,
 361                 .irq = INT_UART2,
 362         },
 363 };
 364
 365 struct SerialHardware *ser_hw_getdesc(int port)
 366 {
 367         ASSERT(port >= 0 && port < SER_CNT);
 368         return &UARTDesc[port].hw;
 369 }