4 * This file is part of BeRTOS.
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13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
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18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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21 * library without restriction. Specifically, if other files instantiate
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29 * Copyright 2010 Develer S.r.l. (http://www.develer.com/)
33 * \brief LM3S1968 UART interface driver.
35 * \author Andrea Righi <arighi@develer.com>
38 #include <cfg/macros.h> /* for BV() */
39 #include <drv/clock_lm3s.h> /* lm3s_busyWait() */
40 #include <drv/gpio_lm3s.h>
41 #include <drv/ser_p.h>
43 #include <drv/irq_cm3.h>
44 #include "cfg/cfg_ser.h"
47 /* From the high-level serial driver */
48 extern struct Serial *ser_handles[SER_CNT];
52 struct SerialHardware hw;
58 /* Forward declaration */
59 static struct CM3Serial UARTDesc[SER_CNT];
61 /* Clear the flags register */
62 INLINE void lm3s_uartClear(uint32_t base)
64 HWREG(base + UART_O_FR) = 0;
67 void lm3s_uartSetBaudRate(uint32_t base, unsigned long baud)
72 if (baud * 16 > CPU_FREQ)
77 div = (CPU_FREQ * 8 / baud + 1) / 2;
79 lm3s_uartDisable(base);
81 HWREG(base + UART_O_CTL) |= UART_CTL_HSE;
83 HWREG(base + UART_O_CTL) &= ~UART_CTL_HSE;
84 /* Set the baud rate */
85 HWREG(base + UART_O_IBRD) = div / 64;
86 HWREG(base + UART_O_FBRD) = div % 64;
88 lm3s_uartEnable(base);
91 void lm3s_uartSetParity(uint32_t base, int parity)
93 /* Set 8-bit word, one stop bit by default */
94 uint32_t config = UART_LCRH_WLEN_8;
101 config |= UART_LCRH_PEN;
103 case SER_PARITY_EVEN:
104 config |= UART_LCRH_EPS | UART_LCRH_PEN;
110 lm3s_uartDisable(base);
111 HWREG(base + UART_O_LCRH) = config;
112 lm3s_uartClear(base);
113 lm3s_uartEnable(base);
116 void lm3s_uartInit(int port)
118 uint32_t reg_clock, base;
120 ASSERT(port >= 0 && port < SER_CNT);
122 base = UARTDesc[port].base;
123 reg_clock = 1 << port;
125 /* Enable the peripheral clock */
126 SYSCTL_RCGC1_R |= reg_clock;
127 SYSCTL_RCGC2_R |= SYSCTL_RCGC2_GPIOA;
130 /* Set GPIO A0 and A1 as UART pins */
131 lm3s_gpioPinConfig(GPIO_PORTA_BASE, BV(0) | BV(1),
132 GPIO_DIR_MODE_HW, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD);
134 /* Set serial param: 115.200 bps, no parity */
135 lm3s_uartSetBaudRate(base, 115200);
136 lm3s_uartSetParity(base, SER_PARITY_NONE);
139 static bool tx_sending(struct SerialHardware *_hw)
141 struct CM3Serial *hw = (struct CM3Serial *)_hw;
145 static void uart_irq_rx(int port)
147 struct FIFOBuffer *rxfifo = &ser_handles[port]->rxfifo;
148 uint32_t base = UARTDesc[port].base;
151 while (lm3s_uartRxReady(base))
153 c = HWREG(base + UART_O_DR);
154 if (fifo_isfull(rxfifo))
155 ser_handles[port]->status |= SERRF_RXFIFOOVERRUN;
157 fifo_push(rxfifo, c);
161 static void uart_irq_tx(int port)
163 struct FIFOBuffer *txfifo = &ser_handles[port]->txfifo;
164 uint32_t base = UARTDesc[port].base;
166 while (lm3s_uartTxReady(base))
168 if (fifo_isempty(txfifo)) {
170 * Disable TX empty interrupts if there're no more
171 * characters to transmit.
173 HWREG(base + UART_O_IM) &= ~UART_IM_TXIM;
174 UARTDesc[port].sending = false;
177 HWREG(base + UART_O_DR) = fifo_pop(txfifo);
181 static void uart_common_irq_handler(int port)
183 uint32_t base = UARTDesc[port].base;
186 /* Read and clear the IRQ status */
187 status = HWREG(base + UART_O_RIS);
189 /* Process the IRQ */
190 if (status & (UART_RIS_RXRIS | UART_RIS_RTRIS))
192 if (status & UART_RIS_TXRIS)
197 lm3s_uartIRQEnable(int port, sysirq_handler_t handler)
199 uint32_t base = UARTDesc[port].base;
200 sysirq_t irq = UARTDesc[port].irq;
202 /* Register the IRQ handler */
203 sysirq_setHandler(irq, handler);
204 /* Enable RX interrupt in the UART interrupt mask register */
205 HWREG(base + UART_O_IM) |= UART_IM_RXIM | UART_IM_RTIM;
208 static void lm3s_uartIRQDisable(int port)
210 uint32_t base = UARTDesc[port].base;
212 HWREG(base + UART_O_IM) &=
213 ~(UART_IM_TXIM | UART_IM_RXIM | UART_IM_RTIM);
216 /* UART class definition */
217 #define UART_PORT(port) \
218 /* UART TX and RX buffers */ \
219 static unsigned char \
220 uart ## port ## _txbuffer[CONFIG_UART ## port ## _TXBUFSIZE]; \
221 static unsigned char \
222 uart ## port ## _rxbuffer[CONFIG_UART ## port ## _RXBUFSIZE]; \
224 /* UART interrupt handler */ \
225 static DECLARE_ISR(uart ## port ## _irq_handler) \
227 uart_common_irq_handler(port); \
230 /* UART public methods */ \
232 uart ## port ## _txStart(struct SerialHardware *_hw) \
234 struct FIFOBuffer *txfifo = &ser_handles[port]->txfifo; \
235 struct CM3Serial *hw = (struct CM3Serial *)_hw; \
239 lm3s_uartPutChar(UART ## port ## _BASE, fifo_pop(txfifo)); \
240 if (!fifo_isempty(txfifo)) \
242 HWREG(UART ## port ## _BASE + UART_O_IM) |= \
244 hw->sending = true; \
249 uart ## port ## _setbaudrate(UNUSED_ARG(struct SerialHardware *, hw), \
250 unsigned long baud) \
252 lm3s_uartSetBaudRate(UART ## port ## _BASE, baud); \
256 uart ## port ## _setparity(UNUSED_ARG(struct SerialHardware *, hw), \
259 lm3s_uartSetParity(UART ## port ## _BASE, parity); \
263 uart ## port ## _cleanup(struct SerialHardware *_hw) \
265 struct CM3Serial *hw = (struct CM3Serial *)_hw; \
267 hw->sending = false; \
268 lm3s_uartIRQDisable(port); \
269 lm3s_uartClear(UART ## port ## _BASE); \
270 lm3s_uartDisable(UART ## port ## _BASE); \
274 uart ## port ## _init(UNUSED_ARG(struct SerialHardware *, hw), \
275 UNUSED_ARG(struct Serial *, ser)) \
277 lm3s_uartInit(port); \
278 lm3s_uartEnable(UART ## port ## _BASE); \
279 lm3s_uartIRQEnable(port, uart ## port ## _irq_handler); \
282 /* UART operations */ \
283 static const struct SerialHardwareVT UART ## port ## _VT = \
285 .init = uart ## port ## _init, \
286 .cleanup = uart ## port ## _cleanup, \
287 .setBaudrate = uart ## port ## _setbaudrate, \
288 .setParity = uart ## port ## _setparity, \
289 .txStart = uart ## port ## _txStart, \
290 .txSending = tx_sending, \
293 /* UART port instances */
298 static struct CM3Serial UARTDesc[SER_CNT] =
303 .txbuffer = uart0_txbuffer,
304 .rxbuffer = uart0_rxbuffer,
305 .txbuffer_size = sizeof(uart0_txbuffer),
306 .rxbuffer_size = sizeof(uart0_rxbuffer),
315 .txbuffer = uart1_txbuffer,
316 .rxbuffer = uart1_rxbuffer,
317 .txbuffer_size = sizeof(uart1_txbuffer),
318 .rxbuffer_size = sizeof(uart1_rxbuffer),
327 .txbuffer = uart2_txbuffer,
328 .rxbuffer = uart2_rxbuffer,
329 .txbuffer_size = sizeof(uart2_txbuffer),
330 .rxbuffer_size = sizeof(uart2_rxbuffer),
338 struct SerialHardware *ser_hw_getdesc(int port)
340 ASSERT(port >= 0 && port < SER_CNT);
341 return &UARTDesc[port].hw;