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29 * Copyright 2010 Develer S.r.l. (http://www.develer.com/)
33 * \brief LM3S1968 Synchronous Serial Interface (SSI) driver.
40 #include <cpu/power.h> /* cpu_relax() */
41 #include <io/kfile.h> /* KFile */
45 * LM3S1968 SSI frame format
48 #define SSI_FRF_MOTO_MODE_0 0x00000000 //< Moto fmt, polarity 0, phase 0
49 #define SSI_FRF_MOTO_MODE_1 0x00000002 //< Moto fmt, polarity 0, phase 1
50 #define SSI_FRF_MOTO_MODE_2 0x00000001 //< Moto fmt, polarity 1, phase 0
51 #define SSI_FRF_MOTO_MODE_3 0x00000003 //< Moto fmt, polarity 1, phase 1
52 #define SSI_FRF_TI 0x00000010 //< TI frame format
53 #define SSI_FRF_NMW 0x00000020 //< National MicroWire frame format
57 * LM3S1968 SSI operational mode
60 #define SSI_MODE_MASTER 0x00000000 //< SSI master
61 #define SSI_MODE_SLAVE 0x00000001 //< SSI slave
62 #define SSI_MODE_SLAVE_OD 0x00000002 //< SSI slave with output disabled
65 /* LM3S SSI handle properties */
68 /* Non-blocking I/O */
69 LM3S_SSI_NONBLOCK = 1,
72 /** LM3S1968 SSI handle structure */
73 typedef struct LM3SSSI
75 /* SSI Kfile structure */
78 /* Handle properties */
81 /* SSI port address */
88 #define KFT_LM3SSSI MAKE_ID('L', 'S', 'S', 'I')
90 INLINE LM3SSSI *LM3SSSI_CAST(KFile *fd)
92 ASSERT(fd->_type == KFT_LM3SSSI);
96 /* KFile interface to LM3S SSI */
97 void lm3s_ssiInit(struct LM3SSSI *fds, uint32_t addr, uint32_t frame, int mode,
98 int bitrate, uint32_t data_width);
100 /* Raw interface to LM3S SSI */
101 int lm3s_ssiOpen(uint32_t addr, uint32_t frame, int mode,
102 int bitrate, uint32_t data_width);
105 * Check if the SSI transmitter is busy or not
107 * This allows to determine whether the TX FIFO have been cleared by the
108 * hardware, so the transmission can be safely considered completed.
110 INLINE bool lm3s_ssiTxDone(uint32_t base)
112 return (HWREG(base + SSI_O_SR) & SSI_SR_BSY) ? true : false;
116 * Check if the SSI TX FIFO is full
118 INLINE bool lm3s_ssiTxReady(uint32_t base)
120 return (HWREG(base + SSI_O_SR) & SSI_SR_TNF) ? true : false;
124 * Check for data available in the RX FIFO
126 INLINE bool lm3s_ssiRxReady(uint32_t base)
128 return (HWREG(base + SSI_O_SR) & SSI_SR_RNE) ? true : false;
132 * Get a frame into the SSI receive FIFO without blocking.
134 * Return the number of frames read from the RX FIFO.
136 INLINE int lm3s_ssiReadFrameNonBlocking(uint32_t base, uint32_t *val)
138 /* Check for data available in the RX FIFO */
139 if (!lm3s_ssiRxReady(base))
141 /* Read data from SSI RX FIFO */
142 *val = HWREG(base + SSI_O_DR);
147 * Get a frame from the SSI receive FIFO.
149 INLINE void lm3s_ssiReadFrame(uint32_t base, uint32_t *val)
151 /* Wait for data available in the RX FIFO */
152 while (!lm3s_ssiRxReady(base))
154 /* Read data from SSI RX FIFO */
155 *val = HWREG(base + SSI_O_DR);
159 * Put a frame into the SSI transmit FIFO without blocking.
161 * NOTE: the upper bits of the frame will be automatically discarded by the
162 * hardware according to the frame data width.
164 * Return the number of frames written to the TX FIFO.
166 INLINE int lm3s_ssiWriteFrameNonBlocking(uint32_t base, uint32_t val)
168 /* Check for available space in the TX FIFO */
169 if (!lm3s_ssiTxReady(base))
171 /* Enqueue data to the TX FIFO */
172 HWREG(base + SSI_O_DR) = val;
177 * Put a frame into the SSI transmit FIFO.
179 * NOTE: the upper bits of the frame will be automatically discarded by the
180 * hardware according to the frame data width.
182 INLINE void lm3s_ssiWriteFrame(uint32_t base, uint32_t val)
184 /* Wait for available space in the TX FIFO */
185 while (!lm3s_ssiTxReady(base))
187 /* Enqueue data to the TX FIFO */
188 HWREG(base + SSI_O_DR) = val;
191 #endif /* SSI_LM3S_H */