4 * This file is part of BeRTOS.
6 * Bertos is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 * As a special exception, you may use this file as part of a free software
21 * library without restriction. Specifically, if other files instantiate
22 * templates or use macros or inline functions from this file, or you compile
23 * this file and link it with other files to produce an executable, this
24 * file does not by itself cause the resulting executable to be covered by
25 * the GNU General Public License. This exception does not however
26 * invalidate any other reasons why the executable file might be covered by
27 * the GNU General Public License.
29 * Copyright 2010 Develer S.r.l. (http://www.develer.com/)
33 * \brief Cortex-M3 architecture's entry point
35 * \author Andrea Righi <arighi@develer.com>
38 #include <cfg/compiler.h>
39 #include <cfg/cfg_proc.h> /* CONFIG_KERN_PREEMPT */
40 #include <kern/proc_p.h>
41 #include <cfg/debug.h>
42 #include <cpu/attr.h> /* PAUSE */
43 #include <cpu/irq.h> /* IRQ_DISABLE */
44 #include <cpu/types.h>
45 #include <drv/irq_cm3.h>
46 #include "switch_ctx_cm3.h"
49 #include <drv/clock_lm3s.h>
52 #include <drv/clock_stm32.h>
56 extern size_t __text_end, __data_start, __data_end, __bss_start, __bss_end;
58 extern void __init2(void);
60 /* Architecture's entry point */
64 * The main application expects IRQs disabled.
70 * PLL may not function properly at default LDO setting.
74 * In designs that enable and use the PLL module, unstable device
75 * behavior may occur with the LDO set at its default of 2.5 volts or
76 * below (minimum of 2.25 volts). Designs that do not use the PLL
77 * module are not affected.
79 * Workaround: Prior to enabling the PLL module, it is recommended that
80 * the default LDO voltage setting of 2.5 V be adjusted to 2.75 V using
81 * the LDO Power Control (LDOPCTL) register.
83 * Silicon Revision Affected: A1, A2
85 * See also: Stellaris LM3S1968 A2 Errata documentation.
87 if (REVISION_IS_A1 | REVISION_IS_A2)
88 HWREG(SYSCTL_LDOPCTL) = SYSCTL_LDOPCTL_2_75V;
90 /* Set the appropriate clocking configuration */
93 /* Initialize IRQ vector table in RAM */
96 #if (CONFIG_KERN && CONFIG_KERN_PREEMPT)
98 * Voluntary context switch handler.
100 * This software interrupt can always be triggered and must be
101 * dispatched as soon as possible, thus we just disable IRQ priority
104 sysirq_setHandler(FAULT_SVCALL, svcall_handler);
105 sysirq_setPriority(FAULT_SVCALL, IRQ_PRIO_MAX);
107 * Preemptible context switch handler
109 * The priority of this IRQ must be the lowest priority in the system
110 * in order to run last in the interrupt service routines' chain.
112 sysirq_setHandler(FAULT_PENDSV, pendsv_handler);
113 sysirq_setPriority(FAULT_PENDSV, IRQ_PRIO_MIN);