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29 * Copyright 2010 Develer S.r.l. (http://www.develer.com/)
33 * \brief STM32F10xx interrupts definition.
40 * The following are defines for the interrupt assignments.
43 #define WWDG_IRQHANDLER 16 /* Window WatchDog Interrupt */
44 #define PVD_IRQHANDLER 17 /* PVD through EXTI Line detection Interrupt */
45 #define TAMPER_IRQHANDLER 18 /* Tamper Interrupt */
46 #define RTC_IRQHANDLER 19 /* RTC global Interrupt */
47 #define FLASH_IRQHANDLER 20 /* FLASH global Interrupt */
48 #define RCC_IRQHANDLER 21 /* RCC global Interrupt */
49 #define EXTI0_IRQHANDLER 22 /* EXTI Line0 Interrupt */
50 #define EXTI1_IRQHANDLER 23 /* EXTI Line1 Interrupt */
51 #define EXTI2_IRQHANDLER 24 /* EXTI Line2 Interrupt */
52 #define EXTI3_IRQHANDLER 25 /* EXTI Line3 Interrupt */
53 #define EXTI4_IRQHANDLER 26 /* EXTI Line4 Interrupt */
54 #define DMACHANNEL1_IRQHANDLER 27 /* DMA Channel 1 global Interrupt */
55 #define DMACHANNEL2_IRQHANDLER 28 /* DMA Channel 2 global Interrupt */
56 #define DMACHANNEL3_IRQHANDLER 29 /* DMA Channel 3 global Interrupt */
57 #define DMACHANNEL4_IRQHANDLER 30 /* DMA Channel 4 global Interrupt */
58 #define DMACHANNEL5_IRQHANDLER 31 /* DMA Channel 5 global Interrupt */
59 #define DMACHANNEL6_IRQHANDLER 32 /* DMA Channel 6 global Interrupt */
60 #define DMACHANNEL7_IRQHANDLER 33 /* DMA Channel 7 global Interrupt */
61 #define ADC_IRQHANDLER 34 /* ADC global Interrupt */
62 #define USB_HP_CAN_TX_IRQHANDLER 35 /* USB High Priority or CAN TX Interrupts */
63 #define USB_LP_CAN_RX0_IRQHANDLER 36 /* USB Low Priority or CAN RX0 Interrupts */
64 #define CAN_RX1_IRQHANDLER 37 /* CAN RX1 Interrupt */
65 #define CAN_SCE_IRQHANDLER 38 /* CAN SCE Interrupt */
66 #define EXTI9_5_IRQHANDLER 39 /* External Line[9:5] Interrupts */
67 #define TIM1_BRK_IRQHANDLER 40 /* TIM1 Break Interrupt */
68 #define TIM1_UP_IRQHANDLER 41 /* TIM1 Update Interrupt */
69 #define TIM1_TRG_COM_IRQHANDLER 42 /* TIM1 Trigger and Commutation Interrupt */
70 #define TIM1_CC_IRQHANDLER 43 /* TIM1 Capture Compare Interrupt */
71 #define TIM2_IRQHANDLER 44 /* TIM2 global Interrupt */
72 #define TIM3_IRQHANDLER 45 /* TIM3 global Interrupt */
73 #define TIM4_IRQHANDLER 46 /* TIM4 global Interrupt */
74 #define I2C1_EV_IRQHANDLER 47 /* I2C1 Event Interrupt */
75 #define I2C1_ER_IRQHANDLER 48 /* I2C1 Error Interrupt */
76 #define I2C2_EV_IRQHANDLER 49 /* I2C2 Event Interrupt */
77 #define I2C2_ER_IRQHANDLER 50 /* I2C2 Error Interrupt */
78 #define SPI1_IRQHANDLER 51 /* SPI1 global Interrupt */
79 #define SPI2_IRQHANDLER 52 /* SPI2 global Interrupt */
80 #define USART1_IRQHANDLER 53 /* USART1 global Interrupt */
81 #define USART2_IRQHANDLER 54 /* USART2 global Interrupt */
82 #define USART3_IRQHANDLER 55 /* USART3 global Interrupt */
83 #define EXTI15_10_IRQHANDLER 56 /* External Line[15:10] Interrupts */
84 #define RTCALARM_IRQHANDLER 57 /* RTC Alarm through EXTI Line Interrupt */
85 #define USBWAKEUP_IRQHANDLER 58 /* USB WakeUp from suspend through EXTI Line Interrupt */
88 #define NUM_INTERRUPTS 66
90 #endif /* STM32_INTS_H */