19fb80b73c51154e387a1dbcdf1aa517193e109b
[bertos.git] / bertos / cpu / detect.h
1 /**
2  * \file
3  * <!--
4  * This file is part of BeRTOS.
5  *
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8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
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17  * along with this program; if not, write to the Free Software
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19  *
20  * As a special exception, you may use this file as part of a free software
21  * library without restriction.  Specifically, if other files instantiate
22  * templates or use macros or inline functions from this file, or you compile
23  * this file and link it with other files to produce an executable, this
24  * file does not by itself cause the resulting executable to be covered by
25  * the GNU General Public License.  This exception does not however
26  * invalidate any other reasons why the executable file might be covered by
27  * the GNU General Public License.
28  *
29  * Copyright 2004, 2005, 2006, 2007 Develer S.r.l. (http://www.develer.com/)
30  * Copyright 2004 Giovanni Bajo
31  *
32  * -->
33  *
34  * \brief CPU detection through special preprocessor macros
35  */
36 #ifndef CPU_DETECT_H
37 #define CPU_DETECT_H
38
39 #if defined(__arm__) /* GCC */ \
40         || defined(__ARM4TM__) /* IAR: defined for all cores >= 4tm */
41         #define CPU_ARM                 1
42         #define CPU_ID                  arm
43
44         // AT91SAM7S core family
45         #if defined(__ARM_AT91SAM7S32__)
46                 #define CPU_ARM_AT91         1
47                 #define CPU_ARM_AT91SAM7S32  1
48         #else
49                 #define CPU_ARM_AT91SAM7S32  0
50         #endif
51
52         #if defined(__ARM_AT91SAM7S64__)
53                 #define CPU_ARM_AT91         1
54                 #define CPU_ARM_SAM7S_LARGE  1
55                 #define CPU_ARM_AT91SAM7S64  1
56         #else
57                 #define CPU_ARM_AT91SAM7S64  0
58         #endif
59
60         #if defined(__ARM_AT91SAM7S128__)
61                 #define CPU_ARM_AT91         1
62                 #define CPU_ARM_SAM7S_LARGE  1
63                 #define CPU_ARM_AT91SAM7S128 1
64         #else
65                 #define CPU_ARM_AT91SAM7S128 0
66         #endif
67
68         #if defined(__ARM_AT91SAM7S256__)
69                 #define CPU_ARM_AT91         1
70                 #define CPU_ARM_SAM7S_LARGE  1
71                 #define CPU_ARM_AT91SAM7S256 1
72         #else
73                 #define CPU_ARM_AT91SAM7S256 0
74         #endif
75
76         #if defined(__ARM_AT91SAM7S512__)
77                 #define CPU_ARM_AT91         1
78                 #define CPU_ARM_SAM7S_LARGE  1
79                 #define CPU_ARM_AT91SAM7S512 1
80         #else
81                 #define CPU_ARM_AT91SAM7S512 0
82         #endif
83
84         // AT91SAM7X core family
85         #if defined(__ARM_AT91SAM7X128__)
86                 #define CPU_ARM_AT91         1
87                 #define CPU_ARM_SAM7X        1
88                 #define CPU_ARM_AT91SAM7X128 1
89         #else
90                 #define CPU_ARM_AT91SAM7X128 0
91         #endif
92
93         #if defined(__ARM_AT91SAM7X256__)
94                 #define CPU_ARM_AT91         1
95                 #define CPU_ARM_SAM7X        1
96                 #define CPU_ARM_AT91SAM7X256 1
97         #else
98                 #define CPU_ARM_AT91SAM7X256 0
99         #endif
100
101
102         #if defined(__ARM_AT91SAM7X512__)
103                 #define CPU_ARM_AT91         1
104                 #define CPU_ARM_SAM7X        1
105                 #define CPU_ARM_AT91SAM7X512 1
106         #else
107                 #define CPU_ARM_AT91SAM7X512 0
108         #endif
109
110         #if defined (__ARM_LM3S1968__)
111                 #define CPU_ARM_LM3S        1
112                 #define CPU_ARM_LM3S1968    1
113         #else
114                 #define CPU_ARM_LM3S1968    0
115         #endif
116
117         #if defined(__ARM_LPC2378__)
118                 #define CPU_ARM_LPC2        1
119                 #define CPU_ARM_LPC2378     1
120         #else
121                 #define CPU_ARM_LPC2378     0
122         #endif  
123
124         #if !defined(CPU_ARM_SAM7S_LARGE)
125                 #define CPU_ARM_SAM7S_LARGE 0
126         #endif
127
128         #if !defined(CPU_ARM_SAM7X)
129                 #define CPU_ARM_SAM7X 0
130         #endif
131
132
133         #if defined(CPU_ARM_AT91)
134                 #if CPU_ARM_AT91SAM7S32 + CPU_ARM_AT91SAM7S64 \
135                 + CPU_ARM_AT91SAM7S128 + CPU_ARM_AT91SAM7S256 \
136                 + CPU_ARM_AT91SAM7S512 \
137                 + CPU_ARM_AT91SAM7X128 + CPU_ARM_AT91SAM7X256 \
138                 + CPU_ARM_AT91SAM7X512 != 1
139                         #error ARM CPU configuration error
140                 #endif
141                 #define CPU_ARM_LM3S        0
142                 #define CPU_ARM_LPC2        0
143
144         #elif defined (CPU_ARM_LM3S)
145                 #if CPU_ARM_LM3S1968 + 0 != 1
146                         #error Luminary ARM CPU configuration error
147                 #endif
148                 #define CPU_ARM_AT91        0
149                 #define CPU_ARM_LPC2        0
150         #elif defined (CPU_ARM_LPC2)
151                 
152                 #if CPU_ARM_LPC2378 + 0 != 1
153                         #error NXP LPC2xxx ARM CPU configuration error
154                 #endif
155                 #define CPU_ARM_AT91        0
156                 #define CPU_ARM_LM3S        0
157         /* #elif Add other ARM families here */
158         #else
159                 #define CPU_ARM_AT91        0
160                 #define CPU_ARM_LM3S        0
161                 #define CPU_ARM_LPC2        0
162         #endif
163
164
165         #if CPU_ARM_AT91 + CPU_ARM_LM3S \
166                 + CPU_ARM_LPC2 + 0 /* Add other ARM families here */ != 1
167                 #error ARM CPU configuration error
168         #endif
169 #else
170         #define CPU_ARM                 0
171
172         /* ARM Families */
173         #define CPU_ARM_AT91            0
174         #define CPU_ARM_LM3S            0
175         #define CPU_ARM_LPC2            0
176
177         /* SAM7 sub-families */
178         #define CPU_ARM_SAM7S_LARGE     0
179         #define CPU_ARM_SAM7X           0
180
181         /* ARM CPUs */
182         #define CPU_ARM_AT91SAM7S32     0
183         #define CPU_ARM_AT91SAM7S64     0
184         #define CPU_ARM_AT91SAM7S128    0
185         #define CPU_ARM_AT91SAM7S256    0
186         #define CPU_ARM_AT91SAM7S512    0
187         #define CPU_ARM_AT91SAM7X128    0
188         #define CPU_ARM_AT91SAM7X256    0
189         #define CPU_ARM_AT91SAM7X512    0
190
191         #define CPU_ARM_LM3S1968        0
192
193         #define CPU_ARM_LPC2378         0
194 #endif
195
196 #if (defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC)) \
197         && !defined(__ARM4TM__) /* IAR: if not ARM assume I196 */
198         #warning Assuming CPU is I196
199         #define CPU_I196                1
200         #define CPU_ID                  i196
201 #else
202         #define CPU_I196                0
203 #endif
204
205 #if defined(__i386__) /* GCC */ \
206         || (defined(_M_IX86) && !defined(_WIN64)) /* MSVC */
207         #define CPU_X86                 1
208         #define CPU_X86_32              1
209         #define CPU_X86_64              0
210         #define CPU_ID                  x86
211 #elif defined(__x86_64__) /* GCC */ \
212         || (defined(_M_IX86) && defined(_WIN64)) /* MSVC */
213         #define CPU_X86                 1
214         #define CPU_X86_32              0
215         #define CPU_X86_64              1
216         #define CPU_ID                  x86
217 #else
218         #define CPU_X86                 0
219         #define CPU_I386                0
220         #define CPU_X86_64              0
221 #endif
222
223 #if defined (_ARCH_PPC) || defined(_ARCH_PPC64)
224         #define CPU_PPC                 1
225         #define CPU_ID                  ppc
226         #if defined(_ARCH_PPC)
227                 #define CPU_PPC32       1
228         #else
229                 #define CPU_PPC32       0
230         #endif
231         #if defined(_ARCH_PPC64)
232                 #define CPU_PPC64       1
233         #else
234                 #define CPU_PPC64       0
235         #endif
236 #else
237         #define CPU_PPC                 0
238         #define CPU_PPC32               0
239         #define CPU_PPC64               0
240 #endif
241
242 #if defined(__m56800E__) || defined(__m56800__)
243         #define CPU_DSP56K              1
244         #define CPU_ID                  dsp56k
245 #else
246         #define CPU_DSP56K              0
247 #endif
248
249 #if defined (__AVR__)
250         #define CPU_AVR                 1
251         #define CPU_ID                  avr
252
253         #if defined(__AVR_ATmega32__)
254                 #define CPU_AVR_ATMEGA32    1
255         #else
256                 #define CPU_AVR_ATMEGA32    0
257         #endif
258
259         #if defined(__AVR_ATmega64__)
260                 #define CPU_AVR_ATMEGA64    1
261         #else
262                 #define CPU_AVR_ATMEGA64    0
263         #endif
264
265         #if defined(__AVR_ATmega103__)
266                 #define CPU_AVR_ATMEGA103   1
267         #else
268                 #define CPU_AVR_ATMEGA103   0
269         #endif
270
271         #if defined(__AVR_ATmega128__)
272                 #define CPU_AVR_ATMEGA128   1
273         #else
274                 #define CPU_AVR_ATMEGA128   0
275         #endif
276
277         #if defined(__AVR_ATmega8__)
278                 #define CPU_AVR_ATMEGA8     1
279         #else
280                 #define CPU_AVR_ATMEGA8     0
281         #endif
282
283         #if defined(__AVR_ATmega168__)
284                 #define CPU_AVR_ATMEGA168   1
285         #else
286                 #define CPU_AVR_ATMEGA168   0
287         #endif
288
289         #if defined(__AVR_ATmega328P__)
290                 #define CPU_AVR_ATMEGA328P   1
291         #else
292                 #define CPU_AVR_ATMEGA328P   0
293         #endif
294
295         #if defined(__AVR_ATmega1281__)
296                 #define CPU_AVR_ATMEGA1281  1
297         #else
298                 #define CPU_AVR_ATMEGA1281  0
299         #endif
300
301         #if CPU_AVR_ATMEGA32 + CPU_AVR_ATMEGA64 + CPU_AVR_ATMEGA103 + CPU_AVR_ATMEGA128 \
302           + CPU_AVR_ATMEGA8 + CPU_AVR_ATMEGA168 + CPU_AVR_ATMEGA328P + CPU_AVR_ATMEGA1281 != 1
303                 #error AVR CPU configuration error
304         #endif
305 #else
306         #define CPU_AVR                 0
307         #define CPU_AVR_ATMEGA8         0
308         #define CPU_AVR_ATMEGA168       0
309         #define CPU_AVR_ATMEGA328P      0
310         #define CPU_AVR_ATMEGA32        0
311         #define CPU_AVR_ATMEGA64        0
312         #define CPU_AVR_ATMEGA103       0
313         #define CPU_AVR_ATMEGA128       0
314         #define CPU_AVR_ATMEGA1281      0
315 #endif
316
317
318 /* Self-check for the detection: only one CPU must be detected */
319 #if CPU_ARM + CPU_I196 + CPU_X86 + CPU_PPC + CPU_DSP56K + CPU_AVR == 0
320         #error Unknown CPU
321 #elif !defined(CPU_ID)
322         #error CPU_ID not defined
323 #elif CPU_ARM + CPU_I196 + CPU_X86 + CPU_PPC + CPU_DSP56K + CPU_AVR != 1
324         #error Internal CPU configuration error
325 #endif
326
327
328 #endif /* CPU_DETECT_H */