bertos/cpu/detect.h

   1 /**
   2  * \file
   3  * <!--
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   5  *
   6  * Bertos is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  19  *
  20  * As a special exception, you may use this file as part of a free software
  21  * library without restriction.  Specifically, if other files instantiate
  22  * templates or use macros or inline functions from this file, or you compile
  23  * this file and link it with other files to produce an executable, this
  24  * file does not by itself cause the resulting executable to be covered by
  25  * the GNU General Public License.  This exception does not however
  26  * invalidate any other reasons why the executable file might be covered by
  27  * the GNU General Public License.
  28  *
  29  * Copyright 2004, 2005, 2006, 2007 Develer S.r.l. (http://www.develer.com/)
  30  * Copyright 2004 Giovanni Bajo
  31  *
  32  * -->
  33  *
  34  * \brief CPU detection through special preprocessor macros
  35  */
  36 #ifndef CPU_DETECT_H
  37 #define CPU_DETECT_H
  38
  39 #if defined(__arm__) /* GCC */ \
  40         || defined(__ARM4TM__) /* IAR: defined for all cores >= 4tm */
  41         #define CPU_ARM                 1
  42
  43         // Cortex-M3 core family
  44         #if defined(__ARM_LM3S1968__)
  45                 #define CPU_ID                  lm3s
  46         #else
  47                 #define CPU_ID                  arm
  48         #endif
  49
  50         // AT91SAM7S core family
  51         #if defined(__ARM_AT91SAM7S32__)
  52                 #define CPU_ARM_AT91         1
  53                 #define CPU_ARM_AT91SAM7S32  1
  54         #else
  55                 #define CPU_ARM_AT91SAM7S32  0
  56         #endif
  57
  58         #if defined(__ARM_AT91SAM7S64__)
  59                 #define CPU_ARM_AT91         1
  60                 #define CPU_ARM_SAM7S_LARGE  1
  61                 #define CPU_ARM_AT91SAM7S64  1
  62         #else
  63                 #define CPU_ARM_AT91SAM7S64  0
  64         #endif
  65
  66         #if defined(__ARM_AT91SAM7S128__)
  67                 #define CPU_ARM_AT91         1
  68                 #define CPU_ARM_SAM7S_LARGE  1
  69                 #define CPU_ARM_AT91SAM7S128 1
  70         #else
  71                 #define CPU_ARM_AT91SAM7S128 0
  72         #endif
  73
  74         #if defined(__ARM_AT91SAM7S256__)
  75                 #define CPU_ARM_AT91         1
  76                 #define CPU_ARM_SAM7S_LARGE  1
  77                 #define CPU_ARM_AT91SAM7S256 1
  78         #else
  79                 #define CPU_ARM_AT91SAM7S256 0
  80         #endif
  81
  82         #if defined(__ARM_AT91SAM7S512__)
  83                 #define CPU_ARM_AT91         1
  84                 #define CPU_ARM_SAM7S_LARGE  1
  85                 #define CPU_ARM_AT91SAM7S512 1
  86         #else
  87                 #define CPU_ARM_AT91SAM7S512 0
  88         #endif
  89
  90         // AT91SAM7X core family
  91         #if defined(__ARM_AT91SAM7X128__)
  92                 #define CPU_ARM_AT91         1
  93                 #define CPU_ARM_SAM7X        1
  94                 #define CPU_ARM_AT91SAM7X128 1
  95         #else
  96                 #define CPU_ARM_AT91SAM7X128 0
  97         #endif
  98
  99         #if defined(__ARM_AT91SAM7X256__)
 100                 #define CPU_ARM_AT91         1
 101                 #define CPU_ARM_SAM7X        1
 102                 #define CPU_ARM_AT91SAM7X256 1
 103         #else
 104                 #define CPU_ARM_AT91SAM7X256 0
 105         #endif
 106
 107
 108         #if defined(__ARM_AT91SAM7X512__)
 109                 #define CPU_ARM_AT91         1
 110                 #define CPU_ARM_SAM7X        1
 111                 #define CPU_ARM_AT91SAM7X512 1
 112         #else
 113                 #define CPU_ARM_AT91SAM7X512 0
 114         #endif
 115
 116         #if defined (__ARM_LM3S1968__)
 117                 #define CPU_ARM_LM3S        1
 118                 #define CPU_ARM_LM3S1968    1
 119         #else
 120                 #define CPU_ARM_LM3S1968    0
 121         #endif
 122
 123         #if defined(__ARM_LPC2378__)
 124                 #define CPU_ARM_LPC2        1
 125                 #define CPU_ARM_LPC2378     1
 126         #else
 127                 #define CPU_ARM_LPC2378     0
 128         #endif
 129
 130         #if !defined(CPU_ARM_SAM7S_LARGE)
 131                 #define CPU_ARM_SAM7S_LARGE 0
 132         #endif
 133
 134         #if !defined(CPU_ARM_SAM7X)
 135                 #define CPU_ARM_SAM7X 0
 136         #endif
 137
 138
 139         #if defined(CPU_ARM_AT91)
 140                 #if CPU_ARM_AT91SAM7S32 + CPU_ARM_AT91SAM7S64 \
 141                 + CPU_ARM_AT91SAM7S128 + CPU_ARM_AT91SAM7S256 \
 142                 + CPU_ARM_AT91SAM7S512 \
 143                 + CPU_ARM_AT91SAM7X128 + CPU_ARM_AT91SAM7X256 \
 144                 + CPU_ARM_AT91SAM7X512 != 1
 145                         #error ARM CPU configuration error
 146                 #endif
 147                 #define CPU_ARM_LM3S        0
 148                 #define CPU_ARM_LPC2        0
 149
 150         #elif defined (CPU_ARM_LM3S)
 151                 #if CPU_ARM_LM3S1968 + 0 != 1
 152                         #error Luminary ARM CPU configuration error
 153                 #endif
 154                 #define CPU_ARM_AT91        0
 155                 #define CPU_ARM_LPC2        0
 156         #elif defined (CPU_ARM_LPC2)
 157
 158                 #if CPU_ARM_LPC2378 + 0 != 1
 159                         #error NXP LPC2xxx ARM CPU configuration error
 160                 #endif
 161                 #define CPU_ARM_AT91        0
 162                 #define CPU_ARM_LM3S        0
 163         /* #elif Add other ARM families here */
 164         #else
 165                 #define CPU_ARM_AT91        0
 166                 #define CPU_ARM_LM3S        0
 167                 #define CPU_ARM_LPC2        0
 168         #endif
 169
 170
 171         #if CPU_ARM_AT91 + CPU_ARM_LM3S \
 172                 + CPU_ARM_LPC2 + 0 /* Add other ARM families here */ != 1
 173                 #error ARM CPU configuration error
 174         #endif
 175 #else
 176         #define CPU_ARM                 0
 177
 178         /* ARM Families */
 179         #define CPU_ARM_AT91            0
 180         #define CPU_ARM_LM3S            0
 181         #define CPU_ARM_LPC2            0
 182
 183         /* SAM7 sub-families */
 184         #define CPU_ARM_SAM7S_LARGE     0
 185         #define CPU_ARM_SAM7X           0
 186
 187         /* ARM CPUs */
 188         #define CPU_ARM_AT91SAM7S32     0
 189         #define CPU_ARM_AT91SAM7S64     0
 190         #define CPU_ARM_AT91SAM7S128    0
 191         #define CPU_ARM_AT91SAM7S256    0
 192         #define CPU_ARM_AT91SAM7S512    0
 193         #define CPU_ARM_AT91SAM7X128    0
 194         #define CPU_ARM_AT91SAM7X256    0
 195         #define CPU_ARM_AT91SAM7X512    0
 196
 197         #define CPU_ARM_LM3S1968        0
 198
 199         #define CPU_ARM_LPC2378         0
 200 #endif
 201
 202 #if (defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC)) \
 203         && !defined(__ARM4TM__) /* IAR: if not ARM assume I196 */
 204         #warning Assuming CPU is I196
 205         #define CPU_I196                1
 206         #define CPU_ID                  i196
 207 #else
 208         #define CPU_I196                0
 209 #endif
 210
 211 #if defined(__i386__) /* GCC */ \
 212         || (defined(_M_IX86) && !defined(_WIN64)) /* MSVC */
 213         #define CPU_X86                 1
 214         #define CPU_X86_32              1
 215         #define CPU_X86_64              0
 216         #define CPU_ID                  x86
 217 #elif defined(__x86_64__) /* GCC */ \
 218         || (defined(_M_IX86) && defined(_WIN64)) /* MSVC */
 219         #define CPU_X86                 1
 220         #define CPU_X86_32              0
 221         #define CPU_X86_64              1
 222         #define CPU_ID                  x86
 223 #else
 224         #define CPU_X86                 0
 225         #define CPU_I386                0
 226         #define CPU_X86_64              0
 227 #endif
 228
 229 #if defined (_ARCH_PPC) || defined(_ARCH_PPC64)
 230         #define CPU_PPC                 1
 231         #define CPU_ID                  ppc
 232         #if defined(_ARCH_PPC)
 233                 #define CPU_PPC32       1
 234         #else
 235                 #define CPU_PPC32       0
 236         #endif
 237         #if defined(_ARCH_PPC64)
 238                 #define CPU_PPC64       1
 239         #else
 240                 #define CPU_PPC64       0
 241         #endif
 242 #else
 243         #define CPU_PPC                 0
 244         #define CPU_PPC32               0
 245         #define CPU_PPC64               0
 246 #endif
 247
 248 #if defined(__m56800E__) || defined(__m56800__)
 249         #define CPU_DSP56K              1
 250         #define CPU_ID                  dsp56k
 251 #else
 252         #define CPU_DSP56K              0
 253 #endif
 254
 255 #if defined (__AVR__)
 256         #define CPU_AVR                 1
 257         #define CPU_ID                  avr
 258
 259         #if defined(__AVR_ATmega32__)
 260                 #define CPU_AVR_ATMEGA32    1
 261         #else
 262                 #define CPU_AVR_ATMEGA32    0
 263         #endif
 264
 265         #if defined(__AVR_ATmega64__)
 266                 #define CPU_AVR_ATMEGA64    1
 267         #else
 268                 #define CPU_AVR_ATMEGA64    0
 269         #endif
 270
 271         #if defined(__AVR_ATmega103__)
 272                 #define CPU_AVR_ATMEGA103   1
 273         #else
 274                 #define CPU_AVR_ATMEGA103   0
 275         #endif
 276
 277         #if defined(__AVR_ATmega128__)
 278                 #define CPU_AVR_ATMEGA128   1
 279         #else
 280                 #define CPU_AVR_ATMEGA128   0
 281         #endif
 282
 283         #if defined(__AVR_ATmega8__)
 284                 #define CPU_AVR_ATMEGA8     1
 285         #else
 286                 #define CPU_AVR_ATMEGA8     0
 287         #endif
 288
 289         #if defined(__AVR_ATmega168__)
 290                 #define CPU_AVR_ATMEGA168   1
 291         #else
 292                 #define CPU_AVR_ATMEGA168   0
 293         #endif
 294
 295         #if defined(__AVR_ATmega328P__)
 296                 #define CPU_AVR_ATMEGA328P   1
 297         #else
 298                 #define CPU_AVR_ATMEGA328P   0
 299         #endif
 300
 301         #if defined(__AVR_ATmega1281__)
 302                 #define CPU_AVR_ATMEGA1281  1
 303         #else
 304                 #define CPU_AVR_ATMEGA1281  0
 305         #endif
 306
 307         #if CPU_AVR_ATMEGA32 + CPU_AVR_ATMEGA64 + CPU_AVR_ATMEGA103 + CPU_AVR_ATMEGA128 \
 308           + CPU_AVR_ATMEGA8 + CPU_AVR_ATMEGA168 + CPU_AVR_ATMEGA328P + CPU_AVR_ATMEGA1281 != 1
 309                 #error AVR CPU configuration error
 310         #endif
 311 #else
 312         #define CPU_AVR                 0
 313         #define CPU_AVR_ATMEGA8         0
 314         #define CPU_AVR_ATMEGA168       0
 315         #define CPU_AVR_ATMEGA328P      0
 316         #define CPU_AVR_ATMEGA32        0
 317         #define CPU_AVR_ATMEGA64        0
 318         #define CPU_AVR_ATMEGA103       0
 319         #define CPU_AVR_ATMEGA128       0
 320         #define CPU_AVR_ATMEGA1281      0
 321 #endif
 322
 323
 324 /* Self-check for the detection: only one CPU must be detected */
 325 #if CPU_ARM + CPU_I196 + CPU_X86 + CPU_PPC + CPU_DSP56K + CPU_AVR == 0
 326         #error Unknown CPU
 327 #elif !defined(CPU_ID)
 328         #error CPU_ID not defined
 329 #elif CPU_ARM + CPU_I196 + CPU_X86 + CPU_PPC + CPU_DSP56K + CPU_AVR != 1
 330         #error Internal CPU configuration error
 331 #endif
 332
 333
 334 #endif /* CPU_DETECT_H */