4 * This file is part of BeRTOS.
6 * Bertos is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 * As a special exception, you may use this file as part of a free software
21 * library without restriction. Specifically, if other files instantiate
22 * templates or use macros or inline functions from this file, or you compile
23 * this file and link it with other files to produce an executable, this
24 * file does not by itself cause the resulting executable to be covered by
25 * the GNU General Public License. This exception does not however
26 * invalidate any other reasons why the executable file might be covered by
27 * the GNU General Public License.
29 * Copyright 2004, 2005, 2006, 2007 Develer S.r.l. (http://www.develer.com/)
30 * Copyright 2004 Giovanni Bajo
34 * \brief CPU detection through special preprocessor macros
39 #if defined(__ARM_ARCH_4T__) /* GCC */ \
40 || (defined(__ICCARM__) && (__CORE__== __ARM4TM__)) /* IAR: defined for all cores == 4tm */
43 #define CPU_CORE_NAME "ARM7TDMI"
45 // AT91SAM7S products serie
46 #if defined(__ARM_AT91SAM7S32__)
47 #define CPU_ARM_AT91 1
48 #define CPU_ARM_AT91SAM7S32 1
49 #define CPU_NAME "AT91SAM7S32"
51 #define CPU_ARM_AT91SAM7S32 0
54 #if defined(__ARM_AT91SAM7S64__)
55 #define CPU_ARM_AT91 1
56 #define CPU_ARM_SAM7S_LARGE 1
57 #define CPU_ARM_AT91SAM7S64 1
58 #define CPU_NAME "AT91SAM7S64"
60 #define CPU_ARM_AT91SAM7S64 0
63 #if defined(__ARM_AT91SAM7S128__)
64 #define CPU_ARM_AT91 1
65 #define CPU_ARM_SAM7S_LARGE 1
66 #define CPU_ARM_AT91SAM7S128 1
67 #define CPU_NAME "AT91SAM7S128"
69 #define CPU_ARM_AT91SAM7S128 0
72 #if defined(__ARM_AT91SAM7S256__)
73 #define CPU_ARM_AT91 1
74 #define CPU_ARM_SAM7S_LARGE 1
75 #define CPU_ARM_AT91SAM7S256 1
76 #define CPU_NAME "AT91SAM7S256"
78 #define CPU_ARM_AT91SAM7S256 0
81 #if defined(__ARM_AT91SAM7S512__)
82 #define CPU_ARM_AT91 1
83 #define CPU_ARM_SAM7S_LARGE 1
84 #define CPU_ARM_AT91SAM7S512 1
85 #define CPU_NAME "AT91SAM7S512"
87 #define CPU_ARM_AT91SAM7S512 0
90 // AT91SAM7X products serie
91 #if defined(__ARM_AT91SAM7X128__)
92 #define CPU_ARM_AT91 1
93 #define CPU_ARM_SAM7X 1
94 #define CPU_ARM_AT91SAM7X128 1
95 #define CPU_NAME "AT91SAM7X128"
97 #define CPU_ARM_AT91SAM7X128 0
100 #if defined(__ARM_AT91SAM7X256__)
101 #define CPU_ARM_AT91 1
102 #define CPU_ARM_SAM7X 1
103 #define CPU_ARM_AT91SAM7X256 1
104 #define CPU_NAME "AT91SAM7X256"
106 #define CPU_ARM_AT91SAM7X256 0
110 #if defined(__ARM_AT91SAM7X512__)
111 #define CPU_ARM_AT91 1
112 #define CPU_ARM_SAM7X 1
113 #define CPU_ARM_AT91SAM7X512 1
114 #define CPU_NAME "AT91SAM7X512"
116 #define CPU_ARM_AT91SAM7X512 0
119 #if defined(__ARM_LPC2378__)
120 #define CPU_ARM_LPC2 1
121 #define CPU_ARM_LPC2378 1
122 #define CPU_NAME "LPC2378"
124 #define CPU_ARM_LPC2378 0
127 #if !defined(CPU_ARM_SAM7S_LARGE)
128 #define CPU_ARM_SAM7S_LARGE 0
131 #if !defined(CPU_ARM_SAM7X)
132 #define CPU_ARM_SAM7X 0
136 #if defined(CPU_ARM_AT91)
137 #if CPU_ARM_AT91SAM7S32 + CPU_ARM_AT91SAM7S64 \
138 + CPU_ARM_AT91SAM7S128 + CPU_ARM_AT91SAM7S256 \
139 + CPU_ARM_AT91SAM7S512 \
140 + CPU_ARM_AT91SAM7X128 + CPU_ARM_AT91SAM7X256 \
141 + CPU_ARM_AT91SAM7X512 != 1
142 #error ARM CPU configuration error
144 #define CPU_ARM_LPC2 0
146 #elif defined (CPU_ARM_LPC2)
148 #if CPU_ARM_LPC2378 + 0 != 1
149 #error NXP LPC2xxx ARM CPU configuration error
151 #define CPU_ARM_AT91 0
152 /* #elif Add other ARM families here */
154 #define CPU_ARM_AT91 0
155 #define CPU_ARM_LPC2 0
159 #if CPU_ARM_AT91 + CPU_ARM_LPC2 + 0 /* Add other ARM families here */ != 1
160 #error ARM CPU configuration error
166 #define CPU_ARM_AT91 0
167 #define CPU_ARM_LPC2 0
169 /* SAM7 sub-families */
170 #define CPU_ARM_SAM7S_LARGE 0
171 #define CPU_ARM_SAM7X 0
174 #define CPU_ARM_AT91SAM7S32 0
175 #define CPU_ARM_AT91SAM7S64 0
176 #define CPU_ARM_AT91SAM7S128 0
177 #define CPU_ARM_AT91SAM7S256 0
178 #define CPU_ARM_AT91SAM7S512 0
179 #define CPU_ARM_AT91SAM7X128 0
180 #define CPU_ARM_AT91SAM7X256 0
181 #define CPU_ARM_AT91SAM7X512 0
183 #define CPU_ARM_LPC2378 0
186 #if defined(__ARM_ARCH_7M__) /* GCC */ \
187 || (defined(__ICCARM__) && (__CORE__== __ARM7M__)) /* IAR: defined for all cores v7M */
191 #define CPU_CORE_NAME "Cortex-M3"
193 #if defined (__ARM_LM3S1968__)
194 #define CPU_CM3_LM3S 1
195 #define CPU_CM3_LM3S1968 1
196 #define CPU_NAME "LM3S1968"
198 #define CPU_CM3_LM3S1968 0
201 #if defined (__ARM_LM3S8962__)
202 #define CPU_CM3_LM3S 1
203 #define CPU_CM3_LM3S8962 1
204 #define CPU_NAME "LM3S8962"
206 #define CPU_CM3_LM3S8962 0
209 #if defined (__ARM_STM32F100RB__)
210 #define CPU_CM3_STM32 1
211 #define CPU_CM3_STM32F100RB 1
212 #define CPU_NAME "STM32F100RB"
214 #define CPU_CM3_STM32F100RB 0
217 #if defined (__ARM_STM32F101C4__)
218 #define CPU_CM3_STM32 1
219 #define CPU_CM3_STM32F101C4 1
220 #define CPU_NAME "STM32F101C4"
222 #define CPU_CM3_STM32F101C4 0
225 #if defined (__ARM_STM32F103RB__)
226 #define CPU_CM3_STM32 1
227 #define CPU_CM3_STM32F103RB 1
228 #define CPU_NAME "STM32F103RB"
230 #define CPU_CM3_STM32F103RB 0
233 #if defined (__ARM_STM32F103RE__)
234 #define CPU_CM3_STM32 1
235 #define CPU_CM3_STM32F103RE 1
236 #define CPU_NAME "STM32F103RE"
238 #define CPU_CM3_STM32F103RE 0
241 // AT91SAM3N products serie
242 #if defined (__ARM_SAM3N4__)
243 #define CPU_CM3_SAM3 1
244 #define CPU_CM3_SAM3N 1
245 #define CPU_CM3_SAM3N4 1
246 #define CPU_NAME "SAM3N4"
248 #define CPU_CM3_SAM3S 0
249 #define CPU_CM3_SAM3U 0
250 #define CPU_CM3_SAM3N2 0
251 #define CPU_CM3_SAM3N1 0
252 #define CPU_CM3_SAM3X 0
254 #define CPU_CM3_SAM3N4 0
257 // AT91SAM3S products serie
258 #if defined (__ARM_SAM3S4__)
259 #define CPU_CM3_SAM3 1
260 #define CPU_CM3_SAM3S 1
261 #define CPU_CM3_SAM3S4 1
262 #define CPU_NAME "SAM3S4"
264 #define CPU_CM3_SAM3N 0
265 #define CPU_CM3_SAM3U 0
266 #define CPU_CM3_SAM3X 0
268 #define CPU_CM3_SAM3S4 0
271 // AT91SAM3U products serie
272 #if defined (__ARM_SAM3U4__)
273 #define CPU_CM3_SAM3 1
274 #define CPU_CM3_SAM3U 1
275 #define CPU_CM3_SAM3U4 1
276 #define CPU_NAME "SAM3U4"
278 #define CPU_CM3_SAM3N 0
279 #define CPU_CM3_SAM3S 0
280 #define CPU_CM3_SAM3X 0
282 #define CPU_CM3_SAM3U4 0
285 // AT91SAM3X products serie
286 #if defined (__ARM_SAM3X8__)
287 #define CPU_CM3_SAM3 1
288 #define CPU_CM3_SAM3X 1
289 #define CPU_CM3_SAM3X8 1
290 #define CPU_NAME "SAM3X8"
292 #define CPU_CM3_SAM3N 0
293 #define CPU_CM3_SAM3S 0
294 #define CPU_CM3_SAM3U 0
296 #define CPU_CM3_SAM3X8 0
299 #if defined (CPU_CM3_LM3S)
300 #if CPU_CM3_LM3S1968 + CPU_CM3_LM3S8962 + 0 != 1
301 #error Luminary Cortex-M3 CPU configuration error
303 #define CPU_CM3_STM32 0
304 #define CPU_CM3_SAM3 0
305 #elif defined (CPU_CM3_STM32)
306 #if CPU_CM3_STM32F100RB + CPU_CM3_STM32F101C4 + CPU_CM3_STM32F103RB + CPU_CM3_STM32F103RE + 0 != 1
307 #error STM32 Cortex-M3 CPU configuration error
309 #define CPU_CM3_LM3S 0
310 #define CPU_CM3_SAM3 0
311 #elif defined (CPU_CM3_SAM3)
312 #if CPU_CM3_SAM3N + CPU_CM3_SAM3U + CPU_CM3_SAM3S + CPU_CM3_SAM3X + 0 != 1
313 #error SAM3 Cortex-M3 CPU configuration error
315 #if CPU_CM3_SAM3N4 + CPU_CM3_SAM3S4 + CPU_CM3_SAM3U4 + CPU_CM3_SAM3X8 + 0 != 1
316 #error SAM3 Cortex-M3 CPU configuration error
318 #define CPU_CM3_LM3S 0
319 #define CPU_CM3_STM32 0
320 /* #elif Add other Cortex-M3 families here */
322 #define CPU_CM3_LM3S 0
323 #define CPU_CM3_STM32 0
324 #define CPU_CM3_SAM3 0
328 #if CPU_CM3_LM3S + CPU_CM3_STM32 + CPU_CM3_SAM3 + 0 /* Add other Cortex-M3 families here */ != 1
329 #error Cortex-M3 CPU configuration error
334 #define CPU_CM3_LM3S 0
335 #define CPU_CM3_LM3S1968 0
336 #define CPU_CM3_LM3S8962 0
338 #define CPU_CM3_STM32 0
339 #define CPU_CM3_STM32F100RB 0
340 #define CPU_CM3_STM32F103RB 0
341 #define CPU_CM3_STM32F101C4 0
342 #define CPU_CM3_STM32F103RE 0
344 #define CPU_CM3_SAM3 0
345 #define CPU_CM3_SAM3N 0
346 #define CPU_CM3_SAM3N4 0
347 #define CPU_CM3_SAM3X 0
348 #define CPU_CM3_SAM3X8 0
351 #if (defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC)) \
352 && !defined(__ICCARM__) /* IAR: if not ARM assume I196 */
353 #warning Assuming CPU is I196
360 #if defined(__i386__) /* GCC */ \
361 || (defined(_M_IX86) && !defined(_WIN64)) /* MSVC */
366 #define CPU_CORE_NAME "x86"
367 #define CPU_NAME "generic"
368 #elif defined(__x86_64__) /* GCC */ \
369 || (defined(_M_IX86) && defined(_WIN64)) /* MSVC */
374 #define CPU_CORE_NAME "x86_64"
375 #define CPU_NAME "generic"
382 #if defined (_ARCH_PPC) || defined(_ARCH_PPC64)
385 #if defined(_ARCH_PPC)
390 #if defined(_ARCH_PPC64)
401 #if defined(__m56800E__) || defined(__m56800__)
403 #define CPU_ID dsp56k
408 #if defined (__AVR__)
411 #define CPU_CORE_NAME "AVR"
413 #if defined(__AVR_ATmega32__)
414 #define CPU_AVR_MEGA 1
415 #define CPU_AVR_ATMEGA32 1
416 #define CPU_NAME "ATmega32"
418 #define CPU_AVR_ATMEGA32 0
421 #if defined(__AVR_ATmega64__)
422 #define CPU_AVR_MEGA 1
423 #define CPU_AVR_ATMEGA64 1
424 #define CPU_NAME "ATmega64"
426 #define CPU_AVR_ATMEGA64 0
429 #if defined(__AVR_ATmega103__)
430 #define CPU_AVR_MEGA 1
431 #define CPU_AVR_ATMEGA103 1
432 #define CPU_NAME "ATmega103"
434 #define CPU_AVR_ATMEGA103 0
437 #if defined(__AVR_ATmega128__)
438 #define CPU_AVR_MEGA 1
439 #define CPU_AVR_ATMEGA128 1
440 #define CPU_NAME "ATmega128"
442 #define CPU_AVR_ATMEGA128 0
445 #if defined(__AVR_ATmega8__)
446 #define CPU_AVR_MEGA 1
447 #define CPU_AVR_ATMEGA8 1
448 #define CPU_NAME "ATmega8"
450 #define CPU_AVR_ATMEGA8 0
453 #if defined(__AVR_ATmega168__)
454 #define CPU_AVR_MEGA 1
455 #define CPU_AVR_ATMEGA168 1
456 #define CPU_NAME "ATmega168"
458 #define CPU_AVR_ATMEGA168 0
461 #if defined(__AVR_ATmega328P__)
462 #define CPU_AVR_MEGA 1
463 #define CPU_AVR_ATMEGA328P 1
464 #define CPU_NAME "ATmega328P"
466 #define CPU_AVR_ATMEGA328P 0
469 #if defined(__AVR_ATmega1281__)
470 #define CPU_AVR_MEGA 1
471 #define CPU_AVR_ATMEGA1281 1
472 #define CPU_NAME "ATmega1281"
474 #define CPU_AVR_ATMEGA1281 0
477 #if defined(__AVR_ATmega1280__)
478 #define CPU_AVR_MEGA 1
479 #define CPU_AVR_ATMEGA1280 1
480 #define CPU_NAME "ATmega1280"
482 #define CPU_AVR_ATMEGA1280 0
485 #if defined(__AVR_ATmega2560__)
486 #define CPU_AVR_MEGA 1
487 #define CPU_AVR_ATMEGA2560 1
488 #define CPU_NAME "ATmega2560"
490 #define CPU_AVR_ATMEGA2560 0
493 #if defined(__AVR_ATxmega32D4__)
494 #define CPU_AVR_XMEGA 1
495 #define CPU_AVR_XMEGA_D 1
496 #define CPU_AVR_ATXMEGA32D4 1
497 #define CPU_NAME "ATxmega32d4"
499 #define CPU_AVR_ATXMEGA32D4 0
502 #if CPU_AVR_ATMEGA32 + CPU_AVR_ATMEGA64 + CPU_AVR_ATMEGA103 + CPU_AVR_ATMEGA128 \
503 + CPU_AVR_ATMEGA8 + CPU_AVR_ATMEGA168 + CPU_AVR_ATMEGA328P + CPU_AVR_ATMEGA1281 \
504 + CPU_AVR_ATMEGA1280 + CPU_AVR_ATMEGA2560 + CPU_AVR_ATXMEGA32D4 != 1
505 #error AVR CPU configuration error
508 #if defined(CPU_AVR_XMEGA) && defined(CPU_AVR_MEGA)
509 #error CPU cannot be MEGA and XMEGA
510 #elif defined(CPU_AVR_MEGA)
511 #define CPU_AVR_XMEGA 0
512 #define CPU_AVR_XMEGA_D 0
513 #elif defined(CPU_AVR_XMEGA)
514 #define CPU_AVR_MEGA 0
517 #if CPU_AVR_MEGA + CPU_AVR_XMEGA != 1
518 #error AVR CPU configuration error
523 #define CPU_AVR_MEGA 0
524 #define CPU_AVR_ATMEGA8 0
525 #define CPU_AVR_ATMEGA168 0
526 #define CPU_AVR_ATMEGA328P 0
527 #define CPU_AVR_ATMEGA32 0
528 #define CPU_AVR_ATMEGA64 0
529 #define CPU_AVR_ATMEGA103 0
530 #define CPU_AVR_ATMEGA128 0
531 #define CPU_AVR_ATMEGA1281 0
532 #define CPU_AVR_ATMEGA1280 0
533 #define CPU_AVR_ATMEGA2560 0
534 #define CPU_AVR_XMEGA 0
535 #define CPU_AVR_XMEGA_D 0
538 #if defined (__MSP430__)
540 #define CPU_ID msp430
541 #define CPU_CORE_NAME "MSP430"
543 #if defined(__MSP430F2274__)
544 #define CPU_MSP430F2274 1
545 #define CPU_NAME "MSP430F2274"
547 #define CPU_MSP430F2274 0
550 #if defined(__MSP430G2231__)
551 #define CPU_MSP430G2231 1
552 #define CPU_NAME "MSP430G2231"
554 #define CPU_MSP430G2231 0
557 #if CPU_MSP430F2274 + CPU_MSP430G2231 != 1
558 #error MSP430 CPU configuration error
562 #define CPU_MSP430F2274 0
563 #define CPU_MSP430G2231 0
567 /* Self-check for the detection: only one CPU must be detected */
568 #if CPU_ARM + CPU_CM3 + CPU_I196 + CPU_X86 + CPU_PPC + CPU_DSP56K + CPU_AVR + CPU_MSP430 == 0
570 #elif !defined(CPU_ID)
571 #error CPU_ID not defined
572 #elif CPU_ARM + CPU_CM3 + CPU_I196 + CPU_X86 + CPU_PPC + CPU_DSP56K + CPU_AVR + CPU_MSP430 != 1
573 #error Internal CPU configuration error
577 #endif /* CPU_DETECT_H */