Fix 500 error page.
[bertos.git] / bertos / cpu / detect.h
1 /**
2  * \file
3  * <!--
4  * This file is part of BeRTOS.
5  *
6  * Bertos is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
19  *
20  * As a special exception, you may use this file as part of a free software
21  * library without restriction.  Specifically, if other files instantiate
22  * templates or use macros or inline functions from this file, or you compile
23  * this file and link it with other files to produce an executable, this
24  * file does not by itself cause the resulting executable to be covered by
25  * the GNU General Public License.  This exception does not however
26  * invalidate any other reasons why the executable file might be covered by
27  * the GNU General Public License.
28  *
29  * Copyright 2004, 2005, 2006, 2007 Develer S.r.l. (http://www.develer.com/)
30  * Copyright 2004 Giovanni Bajo
31  *
32  * -->
33  *
34  * \brief CPU detection through special preprocessor macros
35  */
36 #ifndef CPU_DETECT_H
37 #define CPU_DETECT_H
38
39 #if defined(__ARM_ARCH_4T__) /* GCC */ \
40         || (defined(__ICCARM__) && (__CORE__== __ARM4TM__)) /* IAR: defined for all cores == 4tm */
41         #define CPU_ARM 1
42         #define CPU_ID  arm
43         #define CPU_CORE_NAME            "ARM7TDMI"
44
45     // AT91SAM7S products serie
46         #if defined(__ARM_AT91SAM7S32__)
47                 #define CPU_ARM_AT91         1
48                 #define CPU_ARM_AT91SAM7S32  1
49                 #define CPU_NAME             "AT91SAM7S32"
50         #else
51                 #define CPU_ARM_AT91SAM7S32  0
52         #endif
53
54         #if defined(__ARM_AT91SAM7S64__)
55                 #define CPU_ARM_AT91         1
56                 #define CPU_ARM_SAM7S_LARGE  1
57                 #define CPU_ARM_AT91SAM7S64  1
58                 #define CPU_NAME             "AT91SAM7S64"
59         #else
60                 #define CPU_ARM_AT91SAM7S64  0
61         #endif
62
63         #if defined(__ARM_AT91SAM7S128__)
64                 #define CPU_ARM_AT91         1
65                 #define CPU_ARM_SAM7S_LARGE  1
66                 #define CPU_ARM_AT91SAM7S128 1
67                 #define CPU_NAME             "AT91SAM7S128"
68         #else
69                 #define CPU_ARM_AT91SAM7S128 0
70         #endif
71
72         #if defined(__ARM_AT91SAM7S256__)
73                 #define CPU_ARM_AT91         1
74                 #define CPU_ARM_SAM7S_LARGE  1
75                 #define CPU_ARM_AT91SAM7S256 1
76                 #define CPU_NAME             "AT91SAM7S256"
77         #else
78                 #define CPU_ARM_AT91SAM7S256 0
79         #endif
80
81         #if defined(__ARM_AT91SAM7S512__)
82                 #define CPU_ARM_AT91         1
83                 #define CPU_ARM_SAM7S_LARGE  1
84                 #define CPU_ARM_AT91SAM7S512 1
85                 #define CPU_NAME             "AT91SAM7S512"
86         #else
87                 #define CPU_ARM_AT91SAM7S512 0
88         #endif
89
90         // AT91SAM7X products serie
91         #if defined(__ARM_AT91SAM7X128__)
92                 #define CPU_ARM_AT91         1
93                 #define CPU_ARM_SAM7X        1
94                 #define CPU_ARM_AT91SAM7X128 1
95                 #define CPU_NAME             "AT91SAM7X128"
96         #else
97                 #define CPU_ARM_AT91SAM7X128 0
98         #endif
99
100         #if defined(__ARM_AT91SAM7X256__)
101                 #define CPU_ARM_AT91         1
102                 #define CPU_ARM_SAM7X        1
103                 #define CPU_ARM_AT91SAM7X256 1
104                 #define CPU_NAME             "AT91SAM7X256"
105         #else
106                 #define CPU_ARM_AT91SAM7X256 0
107         #endif
108
109
110         #if defined(__ARM_AT91SAM7X512__)
111                 #define CPU_ARM_AT91         1
112                 #define CPU_ARM_SAM7X        1
113                 #define CPU_ARM_AT91SAM7X512 1
114                 #define CPU_NAME             "AT91SAM7X512"
115         #else
116                 #define CPU_ARM_AT91SAM7X512 0
117         #endif
118
119         #if defined(__ARM_LPC2378__)
120                 #define CPU_ARM_LPC2        1
121                 #define CPU_ARM_LPC2378     1
122                 #define CPU_NAME             "LPC2378"
123         #else
124                 #define CPU_ARM_LPC2378     0
125         #endif
126
127         #if !defined(CPU_ARM_SAM7S_LARGE)
128                 #define CPU_ARM_SAM7S_LARGE 0
129         #endif
130
131         #if !defined(CPU_ARM_SAM7X)
132                 #define CPU_ARM_SAM7X 0
133         #endif
134
135
136         #if defined(CPU_ARM_AT91)
137                 #if CPU_ARM_AT91SAM7S32 + CPU_ARM_AT91SAM7S64 \
138                 + CPU_ARM_AT91SAM7S128 + CPU_ARM_AT91SAM7S256 \
139                 + CPU_ARM_AT91SAM7S512 \
140                 + CPU_ARM_AT91SAM7X128 + CPU_ARM_AT91SAM7X256 \
141                 + CPU_ARM_AT91SAM7X512 != 1
142                         #error ARM CPU configuration error
143                 #endif
144                 #define CPU_ARM_LPC2        0
145
146         #elif defined (CPU_ARM_LPC2)
147
148                 #if CPU_ARM_LPC2378 + 0 != 1
149                         #error NXP LPC2xxx ARM CPU configuration error
150                 #endif
151                 #define CPU_ARM_AT91        0
152         /* #elif Add other ARM families here */
153         #else
154                 #define CPU_ARM_AT91        0
155                 #define CPU_ARM_LPC2        0
156         #endif
157
158
159         #if CPU_ARM_AT91 + CPU_ARM_LPC2 + 0 /* Add other ARM families here */ != 1
160                 #error ARM CPU configuration error
161         #endif
162 #else
163         #define CPU_ARM                 0
164
165         /* ARM Families */
166         #define CPU_ARM_AT91            0
167         #define CPU_ARM_LPC2            0
168
169         /* SAM7 sub-families */
170         #define CPU_ARM_SAM7S_LARGE     0
171         #define CPU_ARM_SAM7X           0
172
173         /* ARM CPUs */
174         #define CPU_ARM_AT91SAM7S32     0
175         #define CPU_ARM_AT91SAM7S64     0
176         #define CPU_ARM_AT91SAM7S128    0
177         #define CPU_ARM_AT91SAM7S256    0
178         #define CPU_ARM_AT91SAM7S512    0
179         #define CPU_ARM_AT91SAM7X128    0
180         #define CPU_ARM_AT91SAM7X256    0
181         #define CPU_ARM_AT91SAM7X512    0
182
183         #define CPU_ARM_LPC2378         0
184 #endif
185
186 #if defined(__ARM_ARCH_7M__) /* GCC */ \
187     || (defined(__ICCARM__) && (__CORE__== __ARM7M__)) /* IAR: defined for all cores v7M */
188         /* Cortex-M3 */
189         #define CPU_CM3 1
190         #define CPU_ID  cm3
191         #define CPU_CORE_NAME "Cortex-M3"
192
193         #if defined (__ARM_LM3S1968__)
194                 #define CPU_CM3_LM3S        1
195                 #define CPU_CM3_LM3S1968    1
196                 #define CPU_NAME            "LM3S1968"
197         #else
198                 #define CPU_CM3_LM3S1968    0
199         #endif
200
201         #if defined (__ARM_LM3S8962__)
202                 #define CPU_CM3_LM3S        1
203                 #define CPU_CM3_LM3S8962    1
204                 #define CPU_NAME            "LM3S8962"
205         #else
206                 #define CPU_CM3_LM3S8962    0
207         #endif
208
209         #if defined (__ARM_STM32F100RB__)
210                 #define CPU_CM3_STM32       1
211                 #define CPU_CM3_STM32F100RB 1
212                 #define CPU_NAME            "STM32F100RB"
213         #else
214                 #define CPU_CM3_STM32F100RB 0
215         #endif
216
217         #if defined (__ARM_STM32F101C4__)
218                 #define CPU_CM3_STM32       1
219                 #define CPU_CM3_STM32F101C4 1
220                 #define CPU_NAME            "STM32F101C4"
221         #else
222                 #define CPU_CM3_STM32F101C4 0
223         #endif
224
225         #if defined (__ARM_STM32F103RB__)
226                 #define CPU_CM3_STM32       1
227                 #define CPU_CM3_STM32F103RB 1
228                 #define CPU_NAME            "STM32F103RB"
229         #else
230                 #define CPU_CM3_STM32F103RB 0
231         #endif
232
233         #if defined (__ARM_STM32F103RE__)
234                 #define CPU_CM3_STM32       1
235                 #define CPU_CM3_STM32F103RE 1
236                 #define CPU_NAME            "STM32F103RE"
237         #else
238                 #define CPU_CM3_STM32F103RE 0
239         #endif
240
241         // AT91SAM3N products serie
242         #if defined (__ARM_SAM3N4__)
243                 #define CPU_CM3_SAM3    1
244                 #define CPU_CM3_SAM3N   1
245                 #define CPU_CM3_SAM3N4  1
246                 #define CPU_NAME        "SAM3N4"
247
248                 #define CPU_CM3_SAM3S   0
249                 #define CPU_CM3_SAM3U   0
250                 #define CPU_CM3_SAM3N2  0
251                 #define CPU_CM3_SAM3N1  0
252                 #define CPU_CM3_SAM3X   0
253         #else
254                 #define CPU_CM3_SAM3N4  0
255         #endif
256
257         // AT91SAM3S products serie
258         #if defined (__ARM_SAM3S4__)
259                 #define CPU_CM3_SAM3    1
260                 #define CPU_CM3_SAM3S   1
261                 #define CPU_CM3_SAM3S4  1
262                 #define CPU_NAME        "SAM3S4"
263
264                 #define CPU_CM3_SAM3N   0
265                 #define CPU_CM3_SAM3U   0
266                 #define CPU_CM3_SAM3X   0
267         #else
268                 #define CPU_CM3_SAM3S4  0
269         #endif
270
271         // AT91SAM3U products serie
272         #if defined (__ARM_SAM3U4__)
273                 #define CPU_CM3_SAM3    1
274                 #define CPU_CM3_SAM3U   1
275                 #define CPU_CM3_SAM3U4  1
276                 #define CPU_NAME        "SAM3U4"
277
278                 #define CPU_CM3_SAM3N   0
279                 #define CPU_CM3_SAM3S   0
280                 #define CPU_CM3_SAM3X   0
281         #else
282                 #define CPU_CM3_SAM3U4  0
283         #endif
284
285         // AT91SAM3X products serie
286         #if defined (__ARM_SAM3X8__)
287                 #define CPU_CM3_SAM3    1
288                 #define CPU_CM3_SAM3X   1
289                 #define CPU_CM3_SAM3X8  1
290                 #define CPU_NAME        "SAM3X8"
291
292                 #define CPU_CM3_SAM3N   0
293                 #define CPU_CM3_SAM3S   0
294                 #define CPU_CM3_SAM3U   0
295         #else
296                 #define CPU_CM3_SAM3X8  0
297         #endif
298
299         #if defined (CPU_CM3_LM3S)
300                 #if CPU_CM3_LM3S1968 + CPU_CM3_LM3S8962 + 0 != 1
301                         #error Luminary Cortex-M3 CPU configuration error
302                 #endif
303                 #define CPU_CM3_STM32       0
304                 #define CPU_CM3_SAM3        0
305         #elif defined (CPU_CM3_STM32)
306                 #if CPU_CM3_STM32F100RB + CPU_CM3_STM32F101C4 + CPU_CM3_STM32F103RB + CPU_CM3_STM32F103RE + 0 != 1
307                         #error STM32 Cortex-M3 CPU configuration error
308                 #endif
309                 #define CPU_CM3_LM3S        0
310                 #define CPU_CM3_SAM3        0
311         #elif defined (CPU_CM3_SAM3)
312                 #if CPU_CM3_SAM3N + CPU_CM3_SAM3U + CPU_CM3_SAM3S + CPU_CM3_SAM3X + 0 != 1
313                         #error SAM3 Cortex-M3 CPU configuration error
314                 #endif
315                 #if CPU_CM3_SAM3N4 + CPU_CM3_SAM3S4 + CPU_CM3_SAM3U4 + CPU_CM3_SAM3X8 + 0 != 1
316                         #error SAM3 Cortex-M3 CPU configuration error
317                 #endif
318                 #define CPU_CM3_LM3S        0
319                 #define CPU_CM3_STM32       0
320         /* #elif Add other Cortex-M3 families here */
321         #else
322                 #define CPU_CM3_LM3S        0
323                 #define CPU_CM3_STM32       0
324                 #define CPU_CM3_SAM3        0
325         #endif
326
327
328         #if CPU_CM3_LM3S + CPU_CM3_STM32 + CPU_CM3_SAM3 + 0 /* Add other Cortex-M3 families here */ != 1
329                 #error Cortex-M3 CPU configuration error
330         #endif
331
332 #else
333         #define CPU_CM3 0
334         #define CPU_CM3_LM3S 0
335         #define CPU_CM3_LM3S1968 0
336         #define CPU_CM3_LM3S8962 0
337
338         #define CPU_CM3_STM32 0
339         #define CPU_CM3_STM32F100RB 0
340         #define CPU_CM3_STM32F103RB 0
341         #define CPU_CM3_STM32F101C4 0
342         #define CPU_CM3_STM32F103RE 0
343
344         #define CPU_CM3_SAM3 0
345         #define CPU_CM3_SAM3N 0
346         #define CPU_CM3_SAM3N4 0
347         #define CPU_CM3_SAM3X 0
348         #define CPU_CM3_SAM3X8 0
349 #endif
350
351 #if (defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC)) \
352         && !defined(__ICCARM__) /* IAR: if not ARM assume I196 */
353         #warning Assuming CPU is I196
354         #define CPU_I196                1
355         #define CPU_ID                  i196
356 #else
357         #define CPU_I196                0
358 #endif
359
360 #if defined(__i386__) /* GCC */ \
361         || (defined(_M_IX86) && !defined(_WIN64)) /* MSVC */
362         #define CPU_X86                 1
363         #define CPU_X86_32              1
364         #define CPU_X86_64              0
365         #define CPU_ID                  x86
366         #define CPU_CORE_NAME           "x86"
367         #define CPU_NAME                "generic"
368 #elif defined(__x86_64__) /* GCC */ \
369         || (defined(_M_IX86) && defined(_WIN64)) /* MSVC */
370         #define CPU_X86                 1
371         #define CPU_X86_32              0
372         #define CPU_X86_64              1
373         #define CPU_ID                  x86
374         #define CPU_CORE_NAME           "x86_64"
375         #define CPU_NAME                "generic"
376 #else
377         #define CPU_X86                 0
378         #define CPU_I386                0
379         #define CPU_X86_64              0
380 #endif
381
382 #if defined (_ARCH_PPC) || defined(_ARCH_PPC64)
383         #define CPU_PPC                 1
384         #define CPU_ID                  ppc
385         #if defined(_ARCH_PPC)
386                 #define CPU_PPC32       1
387         #else
388                 #define CPU_PPC32       0
389         #endif
390         #if defined(_ARCH_PPC64)
391                 #define CPU_PPC64       1
392         #else
393                 #define CPU_PPC64       0
394         #endif
395 #else
396         #define CPU_PPC                 0
397         #define CPU_PPC32               0
398         #define CPU_PPC64               0
399 #endif
400
401 #if defined(__m56800E__) || defined(__m56800__)
402         #define CPU_DSP56K              1
403         #define CPU_ID                  dsp56k
404 #else
405         #define CPU_DSP56K              0
406 #endif
407
408 #if defined (__AVR__)
409         #define CPU_AVR                 1
410         #define CPU_ID                  avr
411         #define CPU_CORE_NAME           "AVR"
412
413         #if defined(__AVR_ATmega32__)
414                 #define CPU_AVR_MEGA            1
415                 #define CPU_AVR_ATMEGA32    1
416                 #define CPU_NAME            "ATmega32"
417         #else
418                 #define CPU_AVR_ATMEGA32    0
419         #endif
420
421         #if defined(__AVR_ATmega64__)
422                 #define CPU_AVR_MEGA            1
423                 #define CPU_AVR_ATMEGA64    1
424                 #define CPU_NAME            "ATmega64"
425         #else
426                 #define CPU_AVR_ATMEGA64    0
427         #endif
428
429         #if defined(__AVR_ATmega103__)
430                 #define CPU_AVR_MEGA            1
431                 #define CPU_AVR_ATMEGA103   1
432                 #define CPU_NAME            "ATmega103"
433         #else
434                 #define CPU_AVR_ATMEGA103   0
435         #endif
436
437         #if defined(__AVR_ATmega128__)
438                 #define CPU_AVR_MEGA            1
439                 #define CPU_AVR_ATMEGA128   1
440                 #define CPU_NAME            "ATmega128"
441         #else
442                 #define CPU_AVR_ATMEGA128   0
443         #endif
444
445         #if defined(__AVR_ATmega8__)
446                 #define CPU_AVR_MEGA            1
447                 #define CPU_AVR_ATMEGA8     1
448                 #define CPU_NAME            "ATmega8"
449         #else
450                 #define CPU_AVR_ATMEGA8     0
451         #endif
452
453         #if defined(__AVR_ATmega168__)
454                 #define CPU_AVR_MEGA            1
455                 #define CPU_AVR_ATMEGA168   1
456                 #define CPU_NAME            "ATmega168"
457         #else
458                 #define CPU_AVR_ATMEGA168   0
459         #endif
460
461         #if defined(__AVR_ATmega328P__)
462                 #define CPU_AVR_MEGA            1
463                 #define CPU_AVR_ATMEGA328P   1
464                 #define CPU_NAME            "ATmega328P"
465         #else
466                 #define CPU_AVR_ATMEGA328P   0
467         #endif
468
469         #if defined(__AVR_ATmega1281__)
470                 #define CPU_AVR_MEGA            1
471                 #define CPU_AVR_ATMEGA1281  1
472                 #define CPU_NAME            "ATmega1281"
473         #else
474                 #define CPU_AVR_ATMEGA1281  0
475         #endif
476
477         #if defined(__AVR_ATmega1280__)
478                 #define CPU_AVR_MEGA            1
479                 #define CPU_AVR_ATMEGA1280  1
480                 #define CPU_NAME            "ATmega1280"
481         #else
482                 #define CPU_AVR_ATMEGA1280  0
483         #endif
484
485         #if defined(__AVR_ATmega2560__)
486                 #define CPU_AVR_MEGA            1
487                 #define CPU_AVR_ATMEGA2560  1
488                 #define CPU_NAME            "ATmega2560"
489         #else
490                 #define CPU_AVR_ATMEGA2560  0
491         #endif
492
493         #if defined(__AVR_ATxmega32D4__)
494                 #define CPU_AVR_XMEGA           1
495                 #define CPU_AVR_XMEGA_D         1
496                 #define CPU_AVR_ATXMEGA32D4     1
497                 #define CPU_NAME                        "ATxmega32d4"
498         #else
499                 #define CPU_AVR_ATXMEGA32D4     0
500         #endif
501
502         #if CPU_AVR_ATMEGA32 + CPU_AVR_ATMEGA64 + CPU_AVR_ATMEGA103 + CPU_AVR_ATMEGA128 \
503           + CPU_AVR_ATMEGA8 + CPU_AVR_ATMEGA168 + CPU_AVR_ATMEGA328P + CPU_AVR_ATMEGA1281 \
504           + CPU_AVR_ATMEGA1280 + CPU_AVR_ATMEGA2560 + CPU_AVR_ATXMEGA32D4 != 1
505                 #error AVR CPU configuration error
506         #endif
507
508         #if defined(CPU_AVR_XMEGA) && defined(CPU_AVR_MEGA)
509                 #error CPU cannot be MEGA and XMEGA
510         #elif defined(CPU_AVR_MEGA)
511                 #define CPU_AVR_XMEGA           0
512                 #define CPU_AVR_XMEGA_D         0
513         #elif defined(CPU_AVR_XMEGA)
514                 #define CPU_AVR_MEGA            0
515         #endif
516
517         #if CPU_AVR_MEGA + CPU_AVR_XMEGA != 1
518                 #error AVR CPU configuration error
519         #endif
520
521 #else
522         #define CPU_AVR                 0
523         #define CPU_AVR_MEGA                    0
524         #define CPU_AVR_ATMEGA8         0
525         #define CPU_AVR_ATMEGA168       0
526         #define CPU_AVR_ATMEGA328P      0
527         #define CPU_AVR_ATMEGA32        0
528         #define CPU_AVR_ATMEGA64        0
529         #define CPU_AVR_ATMEGA103       0
530         #define CPU_AVR_ATMEGA128       0
531         #define CPU_AVR_ATMEGA1281      0
532         #define CPU_AVR_ATMEGA1280      0
533         #define CPU_AVR_ATMEGA2560      0
534         #define CPU_AVR_XMEGA                   0
535         #define CPU_AVR_XMEGA_D                 0
536 #endif
537
538 #if defined (__MSP430__)
539         #define CPU_MSP430              1
540         #define CPU_ID                  msp430
541         #define CPU_CORE_NAME           "MSP430"
542
543         #if defined(__MSP430F2274__)
544                 #define CPU_MSP430F2274     1
545                 #define CPU_NAME            "MSP430F2274"
546         #else
547                 #define CPU_MSP430F2274     0
548         #endif
549
550         #if defined(__MSP430G2231__)
551                 #define CPU_MSP430G2231     1
552                 #define CPU_NAME            "MSP430G2231"
553         #else
554                 #define CPU_MSP430G2231     0
555         #endif
556
557         #if CPU_MSP430F2274 + CPU_MSP430G2231 != 1
558                 #error MSP430 CPU configuration error
559         #endif
560 #else
561         #define CPU_MSP430                  0
562         #define CPU_MSP430F2274             0
563         #define CPU_MSP430G2231             0
564 #endif
565
566
567 /* Self-check for the detection: only one CPU must be detected */
568 #if CPU_ARM + CPU_CM3 + CPU_I196 + CPU_X86 + CPU_PPC + CPU_DSP56K + CPU_AVR + CPU_MSP430 == 0
569         #error Unknown CPU
570 #elif !defined(CPU_ID)
571         #error CPU_ID not defined
572 #elif CPU_ARM + CPU_CM3 + CPU_I196 + CPU_X86 + CPU_PPC + CPU_DSP56K + CPU_AVR + CPU_MSP430 != 1
573         #error Internal CPU configuration error
574 #endif
575
576
577 #endif /* CPU_DETECT_H */