4 * This file is part of BeRTOS.
6 * Bertos is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 * As a special exception, you may use this file as part of a free software
21 * library without restriction. Specifically, if other files instantiate
22 * templates or use macros or inline functions from this file, or you compile
23 * this file and link it with other files to produce an executable, this
24 * file does not by itself cause the resulting executable to be covered by
25 * the GNU General Public License. This exception does not however
26 * invalidate any other reasons why the executable file might be covered by
27 * the GNU General Public License.
29 * Copyright 2004, 2005, 2006, 2007 Develer S.r.l. (http://www.develer.com/)
30 * Copyright 2004 Giovanni Bajo
34 * \brief CPU detection through special preprocessor macros
39 #if defined(__arm__) /* GCC */ \
40 || defined(__ARM4TM__) /* IAR: defined for all cores >= 4tm */
44 // AT91SAM7S core family
45 #if defined(__ARM_AT91SAM7S32__)
46 #define CPU_ARM_AT91 1
47 #define CPU_ARM_AT91SAM7S32 1
49 #define CPU_ARM_AT91SAM7S32 0
52 #if defined(__ARM_AT91SAM7S64__)
53 #define CPU_ARM_AT91 1
54 #define CPU_ARM_AT91SAM7S64 1
56 #define CPU_ARM_AT91SAM7S64 0
59 #if defined(__ARM_AT91SAM7S128__)
60 #define CPU_ARM_AT91 1
61 #define CPU_ARM_AT91SAM7S128 1
63 #define CPU_ARM_AT91SAM7S128 0
66 #if defined(__ARM_AT91SAM7S256__)
67 #define CPU_ARM_AT91 1
68 #define CPU_ARM_AT91SAM7S256 1
70 #define CPU_ARM_AT91SAM7S256 0
73 // AT91SAM7X core family
74 #if defined(__ARM_AT91SAM7X128__)
75 #define CPU_ARM_AT91 1
76 #define CPU_ARM_AT91SAM7X128 1
78 #define CPU_ARM_AT91SAM7X128 0
81 #if defined(__ARM_AT91SAM7X256__)
82 #define CPU_ARM_AT91 1
83 #define CPU_ARM_AT91SAM7X256 1
85 #define CPU_ARM_AT91SAM7X256 0
88 #if defined (__ARM_LM3S1968__)
89 #define CPU_ARM_LM3S 1
90 #define CPU_ARM_LM3S1968 1
92 #define CPU_ARM_LM3S1968 0
97 #if defined(CPU_ARM_AT91)
98 #if CPU_ARM_AT91SAM7S32 + CPU_ARM_AT91SAM7S64 \
99 + CPU_ARM_AT91SAM7S128 + CPU_ARM_AT91SAM7S256 \
100 + CPU_ARM_AT91SAM7X128 + CPU_ARM_AT91SAM7X256 != 1
101 #error ARM CPU configuration error
103 #define CPU_ARM_LM3S 0
105 #elif defined (CPU_ARM_LM3S)
106 #if CPU_ARM_LM3S1968 + 0 != 1
107 #error Luminary ARM CPU configuration error
109 #define CPU_ARM_AT91 0
110 /* #elif Add other ARM families here */
112 #define CPU_ARM_AT91 0
113 #define CPU_ARM_LM3S 0
117 #if CPU_ARM_AT91 + CPU_ARM_LM3S + 0 /* Add other ARM families here */ != 1
118 #error ARM CPU configuration error
124 #define CPU_ARM_AT91 0
125 #define CPU_ARM_LM3S 0
128 #define CPU_ARM_AT91SAM7S32 0
129 #define CPU_ARM_AT91SAM7S64 0
130 #define CPU_ARM_AT91SAM7S128 0
131 #define CPU_ARM_AT91SAM7S256 0
132 #define CPU_ARM_AT91SAM7X128 0
133 #define CPU_ARM_AT91SAM7X256 0
135 #define CPU_ARM_LM3S1968 0
138 #if (defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC)) \
139 && !defined(__ARM4TM__) /* IAR: if not ARM assume I196 */
140 #warning Assuming CPU is I196
147 #if defined(__i386__) /* GCC */ \
148 || (defined(_M_IX86) && !defined(_WIN64)) /* MSVC */
153 #elif defined(__x86_64__) /* GCC */ \
154 || (defined(_M_IX86) && defined(_WIN64)) /* MSVC */
165 #if defined (_ARCH_PPC) || defined(_ARCH_PPC64)
168 #if defined(_ARCH_PPC)
173 #if defined(_ARCH_PPC64)
184 #if defined(__m56800E__) || defined(__m56800__)
186 #define CPU_ID dsp56k
191 #if defined (__AVR__)
195 #if defined(__AVR_ATmega32__)
196 #define CPU_AVR_ATMEGA32 1
198 #define CPU_AVR_ATMEGA32 0
201 #if defined(__AVR_ATmega64__)
202 #define CPU_AVR_ATMEGA64 1
204 #define CPU_AVR_ATMEGA64 0
207 #if defined(__AVR_ATmega103__)
208 #define CPU_AVR_ATMEGA103 1
210 #define CPU_AVR_ATMEGA103 0
213 #if defined(__AVR_ATmega128__)
214 #define CPU_AVR_ATMEGA128 1
216 #define CPU_AVR_ATMEGA128 0
219 #if defined(__AVR_ATmega8__)
220 #define CPU_AVR_ATMEGA8 1
222 #define CPU_AVR_ATMEGA8 0
225 #if defined(__AVR_ATmega168__)
226 #define CPU_AVR_ATMEGA168 1
228 #define CPU_AVR_ATMEGA168 0
231 #if defined(__AVR_ATmega1281__)
232 #define CPU_AVR_ATMEGA1281 1
234 #define CPU_AVR_ATMEGA1281 0
237 #if CPU_AVR_ATMEGA32 + CPU_AVR_ATMEGA64 + CPU_AVR_ATMEGA103 + CPU_AVR_ATMEGA128 \
238 + CPU_AVR_ATMEGA8 + CPU_AVR_ATMEGA168 + CPU_AVR_ATMEGA1281 != 1
239 #error AVR CPU configuration error
243 #define CPU_AVR_ATMEGA8 0
244 #define CPU_AVR_ATMEGA168 0
245 #define CPU_AVR_ATMEGA32 0
246 #define CPU_AVR_ATMEGA64 0
247 #define CPU_AVR_ATMEGA103 0
248 #define CPU_AVR_ATMEGA128 0
249 #define CPU_AVR_ATMEGA1281 0
253 /* Self-check for the detection: only one CPU must be detected */
254 #if CPU_ARM + CPU_I196 + CPU_X86 + CPU_PPC + CPU_DSP56K + CPU_AVR == 0
256 #elif !defined(CPU_ID)
257 #error CPU_ID not defined
258 #elif CPU_ARM + CPU_I196 + CPU_X86 + CPU_PPC + CPU_DSP56K + CPU_AVR != 1
259 #error Internal CPU configuration error
263 #endif /* CPU_DETECT_H */