f37d952574038199116e9de25d6051051e1a0367
[bertos.git] / bertos / cpu / detect.h
1 /**
2  * \file
3  * <!--
4  * This file is part of BeRTOS.
5  *
6  * Bertos is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
19  *
20  * As a special exception, you may use this file as part of a free software
21  * library without restriction.  Specifically, if other files instantiate
22  * templates or use macros or inline functions from this file, or you compile
23  * this file and link it with other files to produce an executable, this
24  * file does not by itself cause the resulting executable to be covered by
25  * the GNU General Public License.  This exception does not however
26  * invalidate any other reasons why the executable file might be covered by
27  * the GNU General Public License.
28  *
29  * Copyright 2004, 2005, 2006, 2007 Develer S.r.l. (http://www.develer.com/)
30  * Copyright 2004 Giovanni Bajo
31  *
32  * -->
33  *
34  * \brief CPU detection through special preprocessor macros
35  */
36 #ifndef CPU_DETECT_H
37 #define CPU_DETECT_H
38
39 #if defined(__arm__) /* GCC */ \
40         || defined(__ARM4TM__) /* IAR: defined for all cores >= 4tm */
41         #define CPU_ARM                 1
42         #define CPU_ID                  arm
43
44         // AT91SAM7S core family
45         #if defined(__ARM_AT91SAM7S32__)
46                 #define CPU_ARM_AT91         1
47                 #define CPU_ARM_AT91SAM7S32  1
48         #else
49                 #define CPU_ARM_AT91SAM7S32  0
50         #endif
51
52         #if defined(__ARM_AT91SAM7S64__)
53                 #define CPU_ARM_AT91         1
54                 #define CPU_ARM_AT91SAM7S64  1
55         #else
56                 #define CPU_ARM_AT91SAM7S64  0
57         #endif
58
59         #if defined(__ARM_AT91SAM7S128__)
60                 #define CPU_ARM_AT91         1
61                 #define CPU_ARM_AT91SAM7S128 1
62         #else
63                 #define CPU_ARM_AT91SAM7S128 0
64         #endif
65
66         #if defined(__ARM_AT91SAM7S256__)
67                 #define CPU_ARM_AT91         1
68                 #define CPU_ARM_AT91SAM7S256 1
69         #else
70                 #define CPU_ARM_AT91SAM7S256 0
71         #endif
72
73         // AT91SAM7X core family
74         #if defined(__ARM_AT91SAM7X128__)
75                 #define CPU_ARM_AT91         1
76                 #define CPU_ARM_AT91SAM7X128 1
77         #else
78                 #define CPU_ARM_AT91SAM7X128 0
79         #endif
80
81         #if defined(__ARM_AT91SAM7X256__)
82                 #define CPU_ARM_AT91         1
83                 #define CPU_ARM_AT91SAM7X256 1
84         #else
85                 #define CPU_ARM_AT91SAM7X256 0
86         #endif
87
88
89         #if defined(CPU_ARM_AT91)
90                 #if CPU_ARM_AT91SAM7S32 + CPU_ARM_AT91SAM7S64 \
91                 + CPU_ARM_AT91SAM7S128 + CPU_ARM_AT91SAM7S256 \
92                 + CPU_ARM_AT91SAM7X128 + CPU_ARM_AT91SAM7X256 != 1
93                         #error ARM CPU configuration error
94                 #endif
95
96         /* #elif Add other ARM families here */
97         #elif defined (__ARM_LM3S1968__)
98                 #define CPU_ARM_LM3S            1
99                 #define CPU_ARM_LM3S1968        1
100
101
102         #else
103                 #define CPU_ARM_AT91         0
104         #endif
105
106
107         #if CPU_ARM_AT91 + CPU_ARM_LM3S + 0 /* Add other ARM families here */ != 1
108                 #error ARM CPU configuration error
109         #endif
110 #else
111         #define CPU_ARM                 0
112
113         /* ARM Families */
114         #define CPU_ARM_AT91            0
115
116         /* ARM CPUs */
117         #define CPU_ARM_AT91SAM7S32     0
118         #define CPU_ARM_AT91SAM7S64     0
119         #define CPU_ARM_AT91SAM7S128    0
120         #define CPU_ARM_AT91SAM7S256    0
121         #define CPU_ARM_AT91SAM7X128    0
122         #define CPU_ARM_AT91SAM7X256    0
123 #endif
124
125 #if (defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC)) \
126         && !defined(__ARM4TM__) /* IAR: if not ARM assume I196 */
127         #warning Assuming CPU is I196
128         #define CPU_I196                1
129         #define CPU_ID                  i196
130 #else
131         #define CPU_I196                0
132 #endif
133
134 #if defined(__i386__) /* GCC */ \
135         || (defined(_M_IX86) && !defined(_WIN64)) /* MSVC */
136         #define CPU_X86                 1
137         #define CPU_X86_32              1
138         #define CPU_X86_64              0
139         #define CPU_ID                  x86
140 #elif defined(__x86_64__) /* GCC */ \
141         || (defined(_M_IX86) && defined(_WIN64)) /* MSVC */
142         #define CPU_X86                 1
143         #define CPU_X86_32              0
144         #define CPU_X86_64              1
145         #define CPU_ID                  x86
146 #else
147         #define CPU_X86                 0
148         #define CPU_I386                0
149         #define CPU_X86_64              0
150 #endif
151
152 #if defined (_ARCH_PPC) || defined(_ARCH_PPC64)
153         #define CPU_PPC                 1
154         #define CPU_ID                  ppc
155         #if defined(_ARCH_PPC)
156                 #define CPU_PPC32       1
157         #else
158                 #define CPU_PPC32       0
159         #endif
160         #if defined(_ARCH_PPC64)
161                 #define CPU_PPC64       1
162         #else
163                 #define CPU_PPC64       0
164         #endif
165 #else
166         #define CPU_PPC                 0
167         #define CPU_PPC32               0
168         #define CPU_PPC64               0
169 #endif
170
171 #if defined(__m56800E__) || defined(__m56800__)
172         #define CPU_DSP56K              1
173         #define CPU_ID                  dsp56k
174 #else
175         #define CPU_DSP56K              0
176 #endif
177
178 #if defined (__AVR__)
179         #define CPU_AVR                 1
180         #define CPU_ID                  avr
181
182         #if defined(__AVR_ATmega32__)
183                 #define CPU_AVR_ATMEGA32    1
184         #else
185                 #define CPU_AVR_ATMEGA32    0
186         #endif
187
188         #if defined(__AVR_ATmega64__)
189                 #define CPU_AVR_ATMEGA64    1
190         #else
191                 #define CPU_AVR_ATMEGA64    0
192         #endif
193
194         #if defined(__AVR_ATmega103__)
195                 #define CPU_AVR_ATMEGA103   1
196         #else
197                 #define CPU_AVR_ATMEGA103   0
198         #endif
199
200         #if defined(__AVR_ATmega128__)
201                 #define CPU_AVR_ATMEGA128   1
202         #else
203                 #define CPU_AVR_ATMEGA128   0
204         #endif
205
206         #if defined(__AVR_ATmega8__)
207                 #define CPU_AVR_ATMEGA8     1
208         #else
209                 #define CPU_AVR_ATMEGA8     0
210         #endif
211
212         #if defined(__AVR_ATmega168__)
213                 #define CPU_AVR_ATMEGA168   1
214         #else
215                 #define CPU_AVR_ATMEGA168   0
216         #endif
217
218         #if defined(__AVR_ATmega1281__)
219                 #define CPU_AVR_ATMEGA1281  1
220         #else
221                 #define CPU_AVR_ATMEGA1281  0
222         #endif
223
224         #if CPU_AVR_ATMEGA32 + CPU_AVR_ATMEGA64 + CPU_AVR_ATMEGA103 + CPU_AVR_ATMEGA128 \
225           + CPU_AVR_ATMEGA8 + CPU_AVR_ATMEGA168 + CPU_AVR_ATMEGA1281 != 1
226                 #error AVR CPU configuration error
227         #endif
228 #else
229         #define CPU_AVR                 0
230         #define CPU_AVR_ATMEGA8         0
231         #define CPU_AVR_ATMEGA168       0
232         #define CPU_AVR_ATMEGA32        0
233         #define CPU_AVR_ATMEGA64        0
234         #define CPU_AVR_ATMEGA103       0
235         #define CPU_AVR_ATMEGA128       0
236         #define CPU_AVR_ATMEGA1281      0
237 #endif
238
239
240 /* Self-check for the detection: only one CPU must be detected */
241 #if CPU_ARM + CPU_I196 + CPU_X86 + CPU_PPC + CPU_DSP56K + CPU_AVR == 0
242         #error Unknown CPU
243 #elif !defined(CPU_ID)
244         #error CPU_ID not defined
245 #elif CPU_ARM + CPU_I196 + CPU_X86 + CPU_PPC + CPU_DSP56K + CPU_AVR != 1
246         #error Internal CPU configuration error
247 #endif
248
249
250 #endif /* CPU_DETECT_H */