bertos/cpu/detect.h

   1 /**
   2  * \file
   3  * <!--
   4  * This file is part of BeRTOS.
   5  *
   6  * Bertos is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  19  *
  20  * As a special exception, you may use this file as part of a free software
  21  * library without restriction.  Specifically, if other files instantiate
  22  * templates or use macros or inline functions from this file, or you compile
  23  * this file and link it with other files to produce an executable, this
  24  * file does not by itself cause the resulting executable to be covered by
  25  * the GNU General Public License.  This exception does not however
  26  * invalidate any other reasons why the executable file might be covered by
  27  * the GNU General Public License.
  28  *
  29  * Copyright 2004, 2005, 2006, 2007 Develer S.r.l. (http://www.develer.com/)
  30  * Copyright 2004 Giovanni Bajo
  31  *
  32  * -->
  33  *
  34  * \brief CPU detection through special preprocessor macros
  35  */
  36 #ifndef CPU_DETECT_H
  37 #define CPU_DETECT_H
  38
  39 #if defined(__ARM_ARCH_4T__) /* GCC */ \
  40         || defined(__ARM4TM__) /* IAR: defined for all cores >= 4tm */
  41         #define CPU_ARM 1
  42         #define CPU_ID  arm
  43         #define CPU_CORE_NAME            "ARM7TDMI"
  44
  45         // AT91SAM7S core family
  46         #if defined(__ARM_AT91SAM7S32__)
  47                 #define CPU_ARM_AT91         1
  48                 #define CPU_ARM_AT91SAM7S32  1
  49                 #define CPU_NAME             "AT91SAM7S32"
  50         #else
  51                 #define CPU_ARM_AT91SAM7S32  0
  52         #endif
  53
  54         #if defined(__ARM_AT91SAM7S64__)
  55                 #define CPU_ARM_AT91         1
  56                 #define CPU_ARM_SAM7S_LARGE  1
  57                 #define CPU_ARM_AT91SAM7S64  1
  58                 #define CPU_NAME             "AT91SAM7S64"
  59         #else
  60                 #define CPU_ARM_AT91SAM7S64  0
  61         #endif
  62
  63         #if defined(__ARM_AT91SAM7S128__)
  64                 #define CPU_ARM_AT91         1
  65                 #define CPU_ARM_SAM7S_LARGE  1
  66                 #define CPU_ARM_AT91SAM7S128 1
  67                 #define CPU_NAME             "AT91SAM7S128"
  68         #else
  69                 #define CPU_ARM_AT91SAM7S128 0
  70         #endif
  71
  72         #if defined(__ARM_AT91SAM7S256__)
  73                 #define CPU_ARM_AT91         1
  74                 #define CPU_ARM_SAM7S_LARGE  1
  75                 #define CPU_ARM_AT91SAM7S256 1
  76                 #define CPU_NAME             "AT91SAM7S256"
  77         #else
  78                 #define CPU_ARM_AT91SAM7S256 0
  79         #endif
  80
  81         #if defined(__ARM_AT91SAM7S512__)
  82                 #define CPU_ARM_AT91         1
  83                 #define CPU_ARM_SAM7S_LARGE  1
  84                 #define CPU_ARM_AT91SAM7S512 1
  85                 #define CPU_NAME             "AT91SAM7S512"
  86         #else
  87                 #define CPU_ARM_AT91SAM7S512 0
  88         #endif
  89
  90         // AT91SAM7X core family
  91         #if defined(__ARM_AT91SAM7X128__)
  92                 #define CPU_ARM_AT91         1
  93                 #define CPU_ARM_SAM7X        1
  94                 #define CPU_ARM_AT91SAM7X128 1
  95                 #define CPU_NAME             "AT91SAM7X128"
  96         #else
  97                 #define CPU_ARM_AT91SAM7X128 0
  98         #endif
  99
 100         #if defined(__ARM_AT91SAM7X256__)
 101                 #define CPU_ARM_AT91         1
 102                 #define CPU_ARM_SAM7X        1
 103                 #define CPU_ARM_AT91SAM7X256 1
 104                 #define CPU_NAME             "AT91SAM7X256"
 105         #else
 106                 #define CPU_ARM_AT91SAM7X256 0
 107         #endif
 108
 109
 110         #if defined(__ARM_AT91SAM7X512__)
 111                 #define CPU_ARM_AT91         1
 112                 #define CPU_ARM_SAM7X        1
 113                 #define CPU_ARM_AT91SAM7X512 1
 114                 #define CPU_NAME             "AT91SAM7X512"
 115         #else
 116                 #define CPU_ARM_AT91SAM7X512 0
 117         #endif
 118
 119         #if defined(__ARM_LPC2378__)
 120                 #define CPU_ARM_LPC2        1
 121                 #define CPU_ARM_LPC2378     1
 122                 #define CPU_NAME             "LPC2378"
 123         #else
 124                 #define CPU_ARM_LPC2378     0
 125         #endif
 126
 127         #if !defined(CPU_ARM_SAM7S_LARGE)
 128                 #define CPU_ARM_SAM7S_LARGE 0
 129         #endif
 130
 131         #if !defined(CPU_ARM_SAM7X)
 132                 #define CPU_ARM_SAM7X 0
 133         #endif
 134
 135
 136         #if defined(CPU_ARM_AT91)
 137                 #if CPU_ARM_AT91SAM7S32 + CPU_ARM_AT91SAM7S64 \
 138                 + CPU_ARM_AT91SAM7S128 + CPU_ARM_AT91SAM7S256 \
 139                 + CPU_ARM_AT91SAM7S512 \
 140                 + CPU_ARM_AT91SAM7X128 + CPU_ARM_AT91SAM7X256 \
 141                 + CPU_ARM_AT91SAM7X512 != 1
 142                         #error ARM CPU configuration error
 143                 #endif
 144                 #define CPU_ARM_LPC2        0
 145
 146         #elif defined (CPU_ARM_LPC2)
 147
 148                 #if CPU_ARM_LPC2378 + 0 != 1
 149                         #error NXP LPC2xxx ARM CPU configuration error
 150                 #endif
 151                 #define CPU_ARM_AT91        0
 152         /* #elif Add other ARM families here */
 153         #else
 154                 #define CPU_ARM_AT91        0
 155                 #define CPU_ARM_LPC2        0
 156         #endif
 157
 158
 159         #if CPU_ARM_AT91 + CPU_ARM_LPC2 + 0 /* Add other ARM families here */ != 1
 160                 #error ARM CPU configuration error
 161         #endif
 162 #else
 163         #define CPU_ARM                 0
 164
 165         /* ARM Families */
 166         #define CPU_ARM_AT91            0
 167         #define CPU_ARM_LPC2            0
 168
 169         /* SAM7 sub-families */
 170         #define CPU_ARM_SAM7S_LARGE     0
 171         #define CPU_ARM_SAM7X           0
 172
 173         /* ARM CPUs */
 174         #define CPU_ARM_AT91SAM7S32     0
 175         #define CPU_ARM_AT91SAM7S64     0
 176         #define CPU_ARM_AT91SAM7S128    0
 177         #define CPU_ARM_AT91SAM7S256    0
 178         #define CPU_ARM_AT91SAM7S512    0
 179         #define CPU_ARM_AT91SAM7X128    0
 180         #define CPU_ARM_AT91SAM7X256    0
 181         #define CPU_ARM_AT91SAM7X512    0
 182
 183         #define CPU_ARM_LPC2378         0
 184 #endif
 185
 186 #if defined(__ARM_ARCH_7M__)
 187         /* Cortex-M3 */
 188         #define CPU_CM3 1
 189         #define CPU_ID  cm3
 190         #define CPU_CORE_NAME "Cortex-M3"
 191
 192         #if defined (__ARM_LM3S1968__)
 193                 #define CPU_CM3_LM3S        1
 194                 #define CPU_CM3_LM3S1968    1
 195                 #define CPU_NAME            "LM3S1968"
 196         #else
 197                 #define CPU_CM3_LM3S1968    0
 198         #endif
 199
 200         #if defined (__ARM_LM3S8962__)
 201                 #define CPU_CM3_LM3S        1
 202                 #define CPU_CM3_LM3S8962    1
 203                 #define CPU_NAME            "LM3S8962"
 204         #else
 205                 #define CPU_CM3_LM3S8962    0
 206         #endif
 207
 208         #if defined (__ARM_STM32F101C4__)
 209                 #define CPU_CM3_STM32       1
 210                 #define CPU_CM3_STM32F101C4 1
 211                 #define CPU_NAME            "STM32F101C4"
 212         #else
 213                 #define CPU_CM3_STM32F101C4 0
 214         #endif
 215
 216         #if defined (__ARM_STM32F103RB__)
 217                 #define CPU_CM3_STM32       1
 218                 #define CPU_CM3_STM32F103RB 1
 219                 #define CPU_NAME            "STM32F103RB"
 220         #else
 221                 #define CPU_CM3_STM32F103RB 0
 222         #endif
 223
 224         #if defined (__ARM_STM32F103RE__)
 225                 #define CPU_CM3_STM32       1
 226                 #define CPU_CM3_STM32F103RE 1
 227                 #define CPU_NAME            "STM32F103RE"
 228         #else
 229                 #define CPU_CM3_STM32F103RE 0
 230         #endif
 231
 232
 233         #if defined (__ARM_SAM3N4__)
 234                 #define CPU_CM3_SAM3    1
 235                 #define CPU_CM3_SAM3N   1
 236                 #define CPU_CM3_SAM3N4  1
 237                 #define CPU_NAME        "SAM3N4"
 238
 239                 #define CPU_CM3_SAM3S   0
 240                 #define CPU_CM3_SAM3U   0
 241                 #define CPU_CM3_SAM3N2  0
 242                 #define CPU_CM3_SAM3N1  0
 243                 #define CPU_CM3_SAM3X   0
 244         #else
 245                 #define CPU_CM3_SAM3N4  0
 246         #endif
 247
 248         #if defined (__ARM_SAM3S4__)
 249                 #define CPU_CM3_SAM3    1
 250                 #define CPU_CM3_SAM3S   1
 251                 #define CPU_CM3_SAM3S4  1
 252                 #define CPU_NAME        "SAM3S4"
 253
 254                 #define CPU_CM3_SAM3N   0
 255                 #define CPU_CM3_SAM3U   0
 256                 #define CPU_CM3_SAM3X   0
 257         #else
 258                 #define CPU_CM3_SAM3S4  0
 259         #endif
 260
 261         #if defined (__ARM_SAM3U4__)
 262                 #define CPU_CM3_SAM3    1
 263                 #define CPU_CM3_SAM3U   1
 264                 #define CPU_CM3_SAM3U4  1
 265                 #define CPU_NAME        "SAM3U4"
 266
 267                 #define CPU_CM3_SAM3N   0
 268                 #define CPU_CM3_SAM3S   0
 269                 #define CPU_CM3_SAM3X   0
 270         #else
 271                 #define CPU_CM3_SAM3U4  0
 272         #endif
 273
 274         #if defined (__ARM_SAM3X8__)
 275                 #define CPU_CM3_SAM3    1
 276                 #define CPU_CM3_SAM3X   1
 277                 #define CPU_CM3_SAM3X8  1
 278                 #define CPU_NAME        "SAM3X8"
 279
 280                 #define CPU_CM3_SAM3N   0
 281                 #define CPU_CM3_SAM3S   0
 282                 #define CPU_CM3_SAM3U   0
 283         #else
 284                 #define CPU_CM3_SAM3X8  0
 285         #endif
 286
 287         #if defined (CPU_CM3_LM3S)
 288                 #if CPU_CM3_LM3S1968 + CPU_CM3_LM3S8962 + 0 != 1
 289                         #error Luminary Cortex-M3 CPU configuration error
 290                 #endif
 291                 #define CPU_CM3_STM32       0
 292                 #define CPU_CM3_SAM3        0
 293         #elif defined (CPU_CM3_STM32)
 294                 #if CPU_CM3_STM32F101C4 + CPU_CM3_STM32F103RB + CPU_CM3_STM32F103RE + 0 != 1
 295                         #error STM32 Cortex-M3 CPU configuration error
 296                 #endif
 297                 #define CPU_CM3_LM3S        0
 298                 #define CPU_CM3_SAM3        0
 299         #elif defined (CPU_CM3_SAM3)
 300                 #if CPU_CM3_SAM3N + CPU_CM3_SAM3U + CPU_CM3_SAM3S + CPU_CM3_SAM3X + 0 != 1
 301                         #error SAM3 Cortex-M3 CPU configuration error
 302                 #endif
 303                 #if CPU_CM3_SAM3N4 + CPU_CM3_SAM3S4 + CPU_CM3_SAM3U4 + CPU_CM3_SAM3X8 + 0 != 1
 304                         #error SAM3 Cortex-M3 CPU configuration error
 305                 #endif
 306                 #define CPU_CM3_LM3S        0
 307                 #define CPU_CM3_STM32       0
 308         /* #elif Add other Cortex-M3 families here */
 309         #else
 310                 #define CPU_CM3_LM3S        0
 311                 #define CPU_CM3_STM32       0
 312                 #define CPU_CM3_SAM3        0
 313         #endif
 314
 315
 316         #if CPU_CM3_LM3S + CPU_CM3_STM32 + CPU_CM3_SAM3 + 0 /* Add other Cortex-M3 families here */ != 1
 317                 #error Cortex-M3 CPU configuration error
 318         #endif
 319
 320 #else
 321         #define CPU_CM3 0
 322         #define CPU_CM3_LM3S 0
 323         #define CPU_CM3_LM3S1968 0
 324         #define CPU_CM3_LM3S8962 0
 325
 326         #define CPU_CM3_STM32 0
 327         #define CPU_CM3_STM32F103RB 0
 328         #define CPU_CM3_STM32F101C4 0
 329         #define CPU_CM3_STM32F103RE 0
 330
 331         #define CPU_CM3_SAM3 0
 332         #define CPU_CM3_SAM3N 0
 333         #define CPU_CM3_SAM3N4 0
 334         #define CPU_CM3_SAM3X 0
 335         #define CPU_CM3_SAM3X8 0
 336 #endif
 337
 338 #if (defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC)) \
 339         && !defined(__ARM4TM__) /* IAR: if not ARM assume I196 */
 340         #warning Assuming CPU is I196
 341         #define CPU_I196                1
 342         #define CPU_ID                  i196
 343 #else
 344         #define CPU_I196                0
 345 #endif
 346
 347 #if defined(__i386__) /* GCC */ \
 348         || (defined(_M_IX86) && !defined(_WIN64)) /* MSVC */
 349         #define CPU_X86                 1
 350         #define CPU_X86_32              1
 351         #define CPU_X86_64              0
 352         #define CPU_ID                  x86
 353         #define CPU_CORE_NAME           "x86"
 354         #define CPU_NAME                "generic"
 355 #elif defined(__x86_64__) /* GCC */ \
 356         || (defined(_M_IX86) && defined(_WIN64)) /* MSVC */
 357         #define CPU_X86                 1
 358         #define CPU_X86_32              0
 359         #define CPU_X86_64              1
 360         #define CPU_ID                  x86
 361         #define CPU_CORE_NAME           "x86_64"
 362         #define CPU_NAME                "generic"
 363 #else
 364         #define CPU_X86                 0
 365         #define CPU_I386                0
 366         #define CPU_X86_64              0
 367 #endif
 368
 369 #if defined (_ARCH_PPC) || defined(_ARCH_PPC64)
 370         #define CPU_PPC                 1
 371         #define CPU_ID                  ppc
 372         #if defined(_ARCH_PPC)
 373                 #define CPU_PPC32       1
 374         #else
 375                 #define CPU_PPC32       0
 376         #endif
 377         #if defined(_ARCH_PPC64)
 378                 #define CPU_PPC64       1
 379         #else
 380                 #define CPU_PPC64       0
 381         #endif
 382 #else
 383         #define CPU_PPC                 0
 384         #define CPU_PPC32               0
 385         #define CPU_PPC64               0
 386 #endif
 387
 388 #if defined(__m56800E__) || defined(__m56800__)
 389         #define CPU_DSP56K              1
 390         #define CPU_ID                  dsp56k
 391 #else
 392         #define CPU_DSP56K              0
 393 #endif
 394
 395 #if defined (__AVR__)
 396         #define CPU_AVR                 1
 397         #define CPU_ID                  avr
 398         #define CPU_CORE_NAME           "AVR"
 399
 400         #if defined(__AVR_ATmega32__)
 401                 #define CPU_AVR_ATMEGA32    1
 402                 #define CPU_NAME            "ATmega32"
 403         #else
 404                 #define CPU_AVR_ATMEGA32    0
 405         #endif
 406
 407         #if defined(__AVR_ATmega64__)
 408                 #define CPU_AVR_ATMEGA64    1
 409                 #define CPU_NAME            "ATmega64"
 410         #else
 411                 #define CPU_AVR_ATMEGA64    0
 412         #endif
 413
 414         #if defined(__AVR_ATmega103__)
 415                 #define CPU_AVR_ATMEGA103   1
 416                 #define CPU_NAME            "ATmega103"
 417         #else
 418                 #define CPU_AVR_ATMEGA103   0
 419         #endif
 420
 421         #if defined(__AVR_ATmega128__)
 422                 #define CPU_AVR_ATMEGA128   1
 423                 #define CPU_NAME            "ATmega128"
 424         #else
 425                 #define CPU_AVR_ATMEGA128   0
 426         #endif
 427
 428         #if defined(__AVR_ATmega8__)
 429                 #define CPU_AVR_ATMEGA8     1
 430                 #define CPU_NAME            "ATmega8"
 431         #else
 432                 #define CPU_AVR_ATMEGA8     0
 433         #endif
 434
 435         #if defined(__AVR_ATmega168__)
 436                 #define CPU_AVR_ATMEGA168   1
 437                 #define CPU_NAME            "ATmega168"
 438         #else
 439                 #define CPU_AVR_ATMEGA168   0
 440         #endif
 441
 442         #if defined(__AVR_ATmega328P__)
 443                 #define CPU_AVR_ATMEGA328P   1
 444                 #define CPU_NAME            "ATmega328P"
 445         #else
 446                 #define CPU_AVR_ATMEGA328P   0
 447         #endif
 448
 449         #if defined(__AVR_ATmega1281__)
 450                 #define CPU_AVR_ATMEGA1281  1
 451                 #define CPU_NAME            "ATmega1281"
 452         #else
 453                 #define CPU_AVR_ATMEGA1281  0
 454         #endif
 455
 456         #if defined(__AVR_ATmega1280__)
 457                 #define CPU_AVR_ATMEGA1280  1
 458                 #define CPU_NAME            "ATmega1280"
 459         #else
 460                 #define CPU_AVR_ATMEGA1280  0
 461         #endif
 462
 463         #if defined(__AVR_ATmega2560__)
 464                 #define CPU_AVR_ATMEGA2560  1
 465                 #define CPU_NAME            "ATmega2560"
 466         #else
 467                 #define CPU_AVR_ATMEGA2560  0
 468         #endif
 469
 470         #if CPU_AVR_ATMEGA32 + CPU_AVR_ATMEGA64 + CPU_AVR_ATMEGA103 + CPU_AVR_ATMEGA128 \
 471           + CPU_AVR_ATMEGA8 + CPU_AVR_ATMEGA168 + CPU_AVR_ATMEGA328P + CPU_AVR_ATMEGA1281 \
 472           + CPU_AVR_ATMEGA1280 + CPU_AVR_ATMEGA2560 != 1
 473                 #error AVR CPU configuration error
 474         #endif
 475 #else
 476         #define CPU_AVR                 0
 477         #define CPU_AVR_ATMEGA8         0
 478         #define CPU_AVR_ATMEGA168       0
 479         #define CPU_AVR_ATMEGA328P      0
 480         #define CPU_AVR_ATMEGA32        0
 481         #define CPU_AVR_ATMEGA64        0
 482         #define CPU_AVR_ATMEGA103       0
 483         #define CPU_AVR_ATMEGA128       0
 484         #define CPU_AVR_ATMEGA1281      0
 485         #define CPU_AVR_ATMEGA1280      0
 486         #define CPU_AVR_ATMEGA2560      0
 487 #endif
 488
 489 #if defined (__MSP430__)
 490         #define CPU_MSP430              1
 491         #define CPU_ID                  msp430
 492         #define CPU_CORE_NAME           "MSP430"
 493
 494         #if defined(__MSP430F2274__)
 495                 #define CPU_MSP430F2274     1
 496                 #define CPU_NAME            "MSP430F2274"
 497         #else
 498                 #define CPU_MSP430F2274     0
 499         #endif
 500
 501         #if defined(__MSP430G2231__)
 502                 #define CPU_MSP430G2231     1
 503                 #define CPU_NAME            "MSP430G2231"
 504         #else
 505                 #define CPU_MSP430G2231     0
 506         #endif
 507
 508         #if CPU_MSP430F2274 + CPU_MSP430G2231 != 1
 509                 #error MSP430 CPU configuration error
 510         #endif
 511 #else
 512         #define CPU_MSP430                  0
 513         #define CPU_MSP430F2274             0
 514         #define CPU_MSP430G2231             0
 515 #endif
 516
 517
 518 /* Self-check for the detection: only one CPU must be detected */
 519 #if CPU_ARM + CPU_CM3 + CPU_I196 + CPU_X86 + CPU_PPC + CPU_DSP56K + CPU_AVR + CPU_MSP430 == 0
 520         #error Unknown CPU
 521 #elif !defined(CPU_ID)
 522         #error CPU_ID not defined
 523 #elif CPU_ARM + CPU_CM3 + CPU_I196 + CPU_X86 + CPU_PPC + CPU_DSP56K + CPU_AVR + CPU_MSP430 != 1
 524         #error Internal CPU configuration error
 525 #endif
 526
 527
 528 #endif /* CPU_DETECT_H */