First support for MSP430 CPU
[bertos.git] / bertos / cpu / detect.h
1 /**
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13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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21  * library without restriction.  Specifically, if other files instantiate
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23  * this file and link it with other files to produce an executable, this
24  * file does not by itself cause the resulting executable to be covered by
25  * the GNU General Public License.  This exception does not however
26  * invalidate any other reasons why the executable file might be covered by
27  * the GNU General Public License.
28  *
29  * Copyright 2004, 2005, 2006, 2007 Develer S.r.l. (http://www.develer.com/)
30  * Copyright 2004 Giovanni Bajo
31  *
32  * -->
33  *
34  * \brief CPU detection through special preprocessor macros
35  */
36 #ifndef CPU_DETECT_H
37 #define CPU_DETECT_H
38
39 #if defined(__ARM_ARCH_4T__) /* GCC */ \
40         || defined(__ARM4TM__) /* IAR: defined for all cores >= 4tm */
41         #define CPU_ARM 1
42         #define CPU_ID  arm
43
44         // AT91SAM7S core family
45         #if defined(__ARM_AT91SAM7S32__)
46                 #define CPU_ARM_AT91         1
47                 #define CPU_ARM_AT91SAM7S32  1
48         #else
49                 #define CPU_ARM_AT91SAM7S32  0
50         #endif
51
52         #if defined(__ARM_AT91SAM7S64__)
53                 #define CPU_ARM_AT91         1
54                 #define CPU_ARM_SAM7S_LARGE  1
55                 #define CPU_ARM_AT91SAM7S64  1
56         #else
57                 #define CPU_ARM_AT91SAM7S64  0
58         #endif
59
60         #if defined(__ARM_AT91SAM7S128__)
61                 #define CPU_ARM_AT91         1
62                 #define CPU_ARM_SAM7S_LARGE  1
63                 #define CPU_ARM_AT91SAM7S128 1
64         #else
65                 #define CPU_ARM_AT91SAM7S128 0
66         #endif
67
68         #if defined(__ARM_AT91SAM7S256__)
69                 #define CPU_ARM_AT91         1
70                 #define CPU_ARM_SAM7S_LARGE  1
71                 #define CPU_ARM_AT91SAM7S256 1
72         #else
73                 #define CPU_ARM_AT91SAM7S256 0
74         #endif
75
76         #if defined(__ARM_AT91SAM7S512__)
77                 #define CPU_ARM_AT91         1
78                 #define CPU_ARM_SAM7S_LARGE  1
79                 #define CPU_ARM_AT91SAM7S512 1
80         #else
81                 #define CPU_ARM_AT91SAM7S512 0
82         #endif
83
84         // AT91SAM7X core family
85         #if defined(__ARM_AT91SAM7X128__)
86                 #define CPU_ARM_AT91         1
87                 #define CPU_ARM_SAM7X        1
88                 #define CPU_ARM_AT91SAM7X128 1
89         #else
90                 #define CPU_ARM_AT91SAM7X128 0
91         #endif
92
93         #if defined(__ARM_AT91SAM7X256__)
94                 #define CPU_ARM_AT91         1
95                 #define CPU_ARM_SAM7X        1
96                 #define CPU_ARM_AT91SAM7X256 1
97         #else
98                 #define CPU_ARM_AT91SAM7X256 0
99         #endif
100
101
102         #if defined(__ARM_AT91SAM7X512__)
103                 #define CPU_ARM_AT91         1
104                 #define CPU_ARM_SAM7X        1
105                 #define CPU_ARM_AT91SAM7X512 1
106         #else
107                 #define CPU_ARM_AT91SAM7X512 0
108         #endif
109
110         #if defined(__ARM_LPC2378__)
111                 #define CPU_ARM_LPC2        1
112                 #define CPU_ARM_LPC2378     1
113         #else
114                 #define CPU_ARM_LPC2378     0
115         #endif
116
117         #if !defined(CPU_ARM_SAM7S_LARGE)
118                 #define CPU_ARM_SAM7S_LARGE 0
119         #endif
120
121         #if !defined(CPU_ARM_SAM7X)
122                 #define CPU_ARM_SAM7X 0
123         #endif
124
125
126         #if defined(CPU_ARM_AT91)
127                 #if CPU_ARM_AT91SAM7S32 + CPU_ARM_AT91SAM7S64 \
128                 + CPU_ARM_AT91SAM7S128 + CPU_ARM_AT91SAM7S256 \
129                 + CPU_ARM_AT91SAM7S512 \
130                 + CPU_ARM_AT91SAM7X128 + CPU_ARM_AT91SAM7X256 \
131                 + CPU_ARM_AT91SAM7X512 != 1
132                         #error ARM CPU configuration error
133                 #endif
134                 #define CPU_ARM_LPC2        0
135
136         #elif defined (CPU_ARM_LPC2)
137
138                 #if CPU_ARM_LPC2378 + 0 != 1
139                         #error NXP LPC2xxx ARM CPU configuration error
140                 #endif
141                 #define CPU_ARM_AT91        0
142         /* #elif Add other ARM families here */
143         #else
144                 #define CPU_ARM_AT91        0
145                 #define CPU_ARM_LPC2        0
146         #endif
147
148
149         #if CPU_ARM_AT91 + CPU_ARM_LPC2 + 0 /* Add other ARM families here */ != 1
150                 #error ARM CPU configuration error
151         #endif
152 #else
153         #define CPU_ARM                 0
154
155         /* ARM Families */
156         #define CPU_ARM_AT91            0
157         #define CPU_ARM_LPC2            0
158
159         /* SAM7 sub-families */
160         #define CPU_ARM_SAM7S_LARGE     0
161         #define CPU_ARM_SAM7X           0
162
163         /* ARM CPUs */
164         #define CPU_ARM_AT91SAM7S32     0
165         #define CPU_ARM_AT91SAM7S64     0
166         #define CPU_ARM_AT91SAM7S128    0
167         #define CPU_ARM_AT91SAM7S256    0
168         #define CPU_ARM_AT91SAM7S512    0
169         #define CPU_ARM_AT91SAM7X128    0
170         #define CPU_ARM_AT91SAM7X256    0
171         #define CPU_ARM_AT91SAM7X512    0
172
173         #define CPU_ARM_LPC2378         0
174 #endif
175
176 #if defined(__ARM_ARCH_7M__)
177         /* Cortex-M3 */
178         #define CPU_CM3 1
179         #define CPU_ID  cm3
180
181         #if defined (__ARM_LM3S1968__)
182                 #define CPU_CM3_LM3S        1
183                 #define CPU_CM3_LM3S1968    1
184         #else
185                 #define CPU_CM3_LM3S1968    0
186         #endif
187
188         #if defined (__ARM_LM3S8962__)
189                 #define CPU_CM3_LM3S        1
190                 #define CPU_CM3_LM3S8962    1
191         #else
192                 #define CPU_CM3_LM3S8962    0
193         #endif
194
195         #if defined (__ARM_STM32F103RB__)
196                 #define CPU_CM3_STM32       1
197                 #define CPU_CM3_STM32F103RB 1
198         #else
199                 #define CPU_CM3_STM32F103RB 0
200         #endif
201
202         #if defined (CPU_CM3_LM3S)
203                 #if CPU_CM3_LM3S1968 + CPU_CM3_LM3S8962 + 0 != 1
204                         #error Luminary Cortex-M3 CPU configuration error
205                 #endif
206                 #define CPU_CM3_STM32       0
207         #elif defined (CPU_CM3_STM32)
208                 #if CPU_CM3_STM32F103RB + 0 != 1
209                         #error STM32 Cortex-M3 CPU configuration error
210                 #endif
211                 #define CPU_CM3_LM3S        0
212         /* #elif Add other Cortex-M3 families here */
213         #else
214                 #define CPU_CM3_LM3S        0
215                 #define CPU_CM3_STM32       0
216         #endif
217
218
219         #if CPU_CM3_LM3S + CPU_CM3_STM32 + 0 /* Add other Cortex-M3 families here */ != 1
220                 #error Cortex-M3 CPU configuration error
221         #endif
222
223 #else
224         #define CPU_CM3 0
225
226         #define CPU_CM3_LM3S 0
227
228         #define CPU_CM3_LM3S1968 0
229
230         #define CPU_CM3_LM3S8968 0
231
232         #define CPU_CM3_STM32 0
233
234         #define CPU_CM3_STM32F103RB 0
235 #endif
236
237 #if (defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC)) \
238         && !defined(__ARM4TM__) /* IAR: if not ARM assume I196 */
239         #warning Assuming CPU is I196
240         #define CPU_I196                1
241         #define CPU_ID                  i196
242 #else
243         #define CPU_I196                0
244 #endif
245
246 #if defined(__i386__) /* GCC */ \
247         || (defined(_M_IX86) && !defined(_WIN64)) /* MSVC */
248         #define CPU_X86                 1
249         #define CPU_X86_32              1
250         #define CPU_X86_64              0
251         #define CPU_ID                  x86
252 #elif defined(__x86_64__) /* GCC */ \
253         || (defined(_M_IX86) && defined(_WIN64)) /* MSVC */
254         #define CPU_X86                 1
255         #define CPU_X86_32              0
256         #define CPU_X86_64              1
257         #define CPU_ID                  x86
258 #else
259         #define CPU_X86                 0
260         #define CPU_I386                0
261         #define CPU_X86_64              0
262 #endif
263
264 #if defined (_ARCH_PPC) || defined(_ARCH_PPC64)
265         #define CPU_PPC                 1
266         #define CPU_ID                  ppc
267         #if defined(_ARCH_PPC)
268                 #define CPU_PPC32       1
269         #else
270                 #define CPU_PPC32       0
271         #endif
272         #if defined(_ARCH_PPC64)
273                 #define CPU_PPC64       1
274         #else
275                 #define CPU_PPC64       0
276         #endif
277 #else
278         #define CPU_PPC                 0
279         #define CPU_PPC32               0
280         #define CPU_PPC64               0
281 #endif
282
283 #if defined(__m56800E__) || defined(__m56800__)
284         #define CPU_DSP56K              1
285         #define CPU_ID                  dsp56k
286 #else
287         #define CPU_DSP56K              0
288 #endif
289
290 #if defined (__AVR__)
291         #define CPU_AVR                 1
292         #define CPU_ID                  avr
293
294         #if defined(__AVR_ATmega32__)
295                 #define CPU_AVR_ATMEGA32    1
296         #else
297                 #define CPU_AVR_ATMEGA32    0
298         #endif
299
300         #if defined(__AVR_ATmega64__)
301                 #define CPU_AVR_ATMEGA64    1
302         #else
303                 #define CPU_AVR_ATMEGA64    0
304         #endif
305
306         #if defined(__AVR_ATmega103__)
307                 #define CPU_AVR_ATMEGA103   1
308         #else
309                 #define CPU_AVR_ATMEGA103   0
310         #endif
311
312         #if defined(__AVR_ATmega128__)
313                 #define CPU_AVR_ATMEGA128   1
314         #else
315                 #define CPU_AVR_ATMEGA128   0
316         #endif
317
318         #if defined(__AVR_ATmega8__)
319                 #define CPU_AVR_ATMEGA8     1
320         #else
321                 #define CPU_AVR_ATMEGA8     0
322         #endif
323
324         #if defined(__AVR_ATmega168__)
325                 #define CPU_AVR_ATMEGA168   1
326         #else
327                 #define CPU_AVR_ATMEGA168   0
328         #endif
329
330         #if defined(__AVR_ATmega328P__)
331                 #define CPU_AVR_ATMEGA328P   1
332         #else
333                 #define CPU_AVR_ATMEGA328P   0
334         #endif
335
336         #if defined(__AVR_ATmega1281__)
337                 #define CPU_AVR_ATMEGA1281  1
338         #else
339                 #define CPU_AVR_ATMEGA1281  0
340         #endif
341
342         #if defined(__AVR_ATmega1280__)
343                 #define CPU_AVR_ATMEGA1280  1
344         #else
345                 #define CPU_AVR_ATMEGA1280  0
346         #endif
347
348         #if CPU_AVR_ATMEGA32 + CPU_AVR_ATMEGA64 + CPU_AVR_ATMEGA103 + CPU_AVR_ATMEGA128 \
349           + CPU_AVR_ATMEGA8 + CPU_AVR_ATMEGA168 + CPU_AVR_ATMEGA328P + CPU_AVR_ATMEGA1281 \
350           + CPU_AVR_ATMEGA1280 != 1
351                 #error AVR CPU configuration error
352         #endif
353 #else
354         #define CPU_AVR                 0
355         #define CPU_AVR_ATMEGA8         0
356         #define CPU_AVR_ATMEGA168       0
357         #define CPU_AVR_ATMEGA328P      0
358         #define CPU_AVR_ATMEGA32        0
359         #define CPU_AVR_ATMEGA64        0
360         #define CPU_AVR_ATMEGA103       0
361         #define CPU_AVR_ATMEGA128       0
362         #define CPU_AVR_ATMEGA1281      0
363         #define CPU_AVR_ATMEGA1280      0
364 #endif
365
366 #if defined (__MSP430__)
367         #define CPU_MSP430              1
368         #define CPU_ID                  msp430
369
370         #if defined(__MSP430_2274__)
371                 #define CPU_MSP430_2274     1
372         #else
373                 #define CPU_MSP430_2274     0
374         #endif
375 #else
376         #define CPU_MSP430              0
377 #endif
378
379
380 /* Self-check for the detection: only one CPU must be detected */
381 #if CPU_ARM + CPU_CM3 + CPU_I196 + CPU_X86 + CPU_PPC + CPU_DSP56K + CPU_AVR + CPU_MSP430 == 0
382         #error Unknown CPU
383 #elif !defined(CPU_ID)
384         #error CPU_ID not defined
385 #elif CPU_ARM + CPU_CM3 + CPU_I196 + CPU_X86 + CPU_PPC + CPU_DSP56K + CPU_AVR + CPU_MSP430 != 1
386         #error Internal CPU configuration error
387 #endif
388
389
390 #endif /* CPU_DETECT_H */