Fix msp430 cpu core name. Add new msp430 core detect.
[bertos.git] / bertos / cpu / detect.h
1 /**
2  * \file
3  * <!--
4  * This file is part of BeRTOS.
5  *
6  * Bertos is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
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17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
19  *
20  * As a special exception, you may use this file as part of a free software
21  * library without restriction.  Specifically, if other files instantiate
22  * templates or use macros or inline functions from this file, or you compile
23  * this file and link it with other files to produce an executable, this
24  * file does not by itself cause the resulting executable to be covered by
25  * the GNU General Public License.  This exception does not however
26  * invalidate any other reasons why the executable file might be covered by
27  * the GNU General Public License.
28  *
29  * Copyright 2004, 2005, 2006, 2007 Develer S.r.l. (http://www.develer.com/)
30  * Copyright 2004 Giovanni Bajo
31  *
32  * -->
33  *
34  * \brief CPU detection through special preprocessor macros
35  */
36 #ifndef CPU_DETECT_H
37 #define CPU_DETECT_H
38
39 #if defined(__ARM_ARCH_4T__) /* GCC */ \
40         || defined(__ARM4TM__) /* IAR: defined for all cores >= 4tm */
41         #define CPU_ARM 1
42         #define CPU_ID  arm
43         #define CPU_CORE_NAME            "ARM7TDMI"
44
45         // AT91SAM7S core family
46         #if defined(__ARM_AT91SAM7S32__)
47                 #define CPU_ARM_AT91         1
48                 #define CPU_ARM_AT91SAM7S32  1
49                 #define CPU_NAME             "AT91SAM7S32"
50         #else
51                 #define CPU_ARM_AT91SAM7S32  0
52         #endif
53
54         #if defined(__ARM_AT91SAM7S64__)
55                 #define CPU_ARM_AT91         1
56                 #define CPU_ARM_SAM7S_LARGE  1
57                 #define CPU_ARM_AT91SAM7S64  1
58                 #define CPU_NAME             "AT91SAM7S64"
59         #else
60                 #define CPU_ARM_AT91SAM7S64  0
61         #endif
62
63         #if defined(__ARM_AT91SAM7S128__)
64                 #define CPU_ARM_AT91         1
65                 #define CPU_ARM_SAM7S_LARGE  1
66                 #define CPU_ARM_AT91SAM7S128 1
67                 #define CPU_NAME             "AT91SAM7S128"
68         #else
69                 #define CPU_ARM_AT91SAM7S128 0
70         #endif
71
72         #if defined(__ARM_AT91SAM7S256__)
73                 #define CPU_ARM_AT91         1
74                 #define CPU_ARM_SAM7S_LARGE  1
75                 #define CPU_ARM_AT91SAM7S256 1
76                 #define CPU_NAME             "AT91SAM7S256"
77         #else
78                 #define CPU_ARM_AT91SAM7S256 0
79         #endif
80
81         #if defined(__ARM_AT91SAM7S512__)
82                 #define CPU_ARM_AT91         1
83                 #define CPU_ARM_SAM7S_LARGE  1
84                 #define CPU_ARM_AT91SAM7S512 1
85                 #define CPU_NAME             "AT91SAM7S512"
86         #else
87                 #define CPU_ARM_AT91SAM7S512 0
88         #endif
89
90         // AT91SAM7X core family
91         #if defined(__ARM_AT91SAM7X128__)
92                 #define CPU_ARM_AT91         1
93                 #define CPU_ARM_SAM7X        1
94                 #define CPU_ARM_AT91SAM7X128 1
95                 #define CPU_NAME             "AT91SAM7X128"
96         #else
97                 #define CPU_ARM_AT91SAM7X128 0
98         #endif
99
100         #if defined(__ARM_AT91SAM7X256__)
101                 #define CPU_ARM_AT91         1
102                 #define CPU_ARM_SAM7X        1
103                 #define CPU_ARM_AT91SAM7X256 1
104                 #define CPU_NAME             "AT91SAM7X256"
105         #else
106                 #define CPU_ARM_AT91SAM7X256 0
107         #endif
108
109
110         #if defined(__ARM_AT91SAM7X512__)
111                 #define CPU_ARM_AT91         1
112                 #define CPU_ARM_SAM7X        1
113                 #define CPU_ARM_AT91SAM7X512 1
114                 #define CPU_NAME             "AT91SAM7X512"
115         #else
116                 #define CPU_ARM_AT91SAM7X512 0
117         #endif
118
119         #if defined(__ARM_LPC2378__)
120                 #define CPU_ARM_LPC2        1
121                 #define CPU_ARM_LPC2378     1
122                 #define CPU_NAME             "LPC2378"
123         #else
124                 #define CPU_ARM_LPC2378     0
125         #endif
126
127         #if !defined(CPU_ARM_SAM7S_LARGE)
128                 #define CPU_ARM_SAM7S_LARGE 0
129         #endif
130
131         #if !defined(CPU_ARM_SAM7X)
132                 #define CPU_ARM_SAM7X 0
133         #endif
134
135
136         #if defined(CPU_ARM_AT91)
137                 #if CPU_ARM_AT91SAM7S32 + CPU_ARM_AT91SAM7S64 \
138                 + CPU_ARM_AT91SAM7S128 + CPU_ARM_AT91SAM7S256 \
139                 + CPU_ARM_AT91SAM7S512 \
140                 + CPU_ARM_AT91SAM7X128 + CPU_ARM_AT91SAM7X256 \
141                 + CPU_ARM_AT91SAM7X512 != 1
142                         #error ARM CPU configuration error
143                 #endif
144                 #define CPU_ARM_LPC2        0
145
146         #elif defined (CPU_ARM_LPC2)
147
148                 #if CPU_ARM_LPC2378 + 0 != 1
149                         #error NXP LPC2xxx ARM CPU configuration error
150                 #endif
151                 #define CPU_ARM_AT91        0
152         /* #elif Add other ARM families here */
153         #else
154                 #define CPU_ARM_AT91        0
155                 #define CPU_ARM_LPC2        0
156         #endif
157
158
159         #if CPU_ARM_AT91 + CPU_ARM_LPC2 + 0 /* Add other ARM families here */ != 1
160                 #error ARM CPU configuration error
161         #endif
162 #else
163         #define CPU_ARM                 0
164
165         /* ARM Families */
166         #define CPU_ARM_AT91            0
167         #define CPU_ARM_LPC2            0
168
169         /* SAM7 sub-families */
170         #define CPU_ARM_SAM7S_LARGE     0
171         #define CPU_ARM_SAM7X           0
172
173         /* ARM CPUs */
174         #define CPU_ARM_AT91SAM7S32     0
175         #define CPU_ARM_AT91SAM7S64     0
176         #define CPU_ARM_AT91SAM7S128    0
177         #define CPU_ARM_AT91SAM7S256    0
178         #define CPU_ARM_AT91SAM7S512    0
179         #define CPU_ARM_AT91SAM7X128    0
180         #define CPU_ARM_AT91SAM7X256    0
181         #define CPU_ARM_AT91SAM7X512    0
182
183         #define CPU_ARM_LPC2378         0
184 #endif
185
186 #if defined(__ARM_ARCH_7M__)
187         /* Cortex-M3 */
188         #define CPU_CM3 1
189         #define CPU_ID  cm3
190         #define CPU_CORE_NAME "Cortex-M3"
191
192         #if defined (__ARM_LM3S1968__)
193                 #define CPU_CM3_LM3S        1
194                 #define CPU_CM3_LM3S1968    1
195                 #define CPU_NAME            "LM3S1968"
196         #else
197                 #define CPU_CM3_LM3S1968    0
198         #endif
199
200         #if defined (__ARM_LM3S8962__)
201                 #define CPU_CM3_LM3S        1
202                 #define CPU_CM3_LM3S8962    1
203                 #define CPU_NAME            "LM3S8962"
204         #else
205                 #define CPU_CM3_LM3S8962    0
206         #endif
207
208         #if defined (__ARM_STM32F103RB__)
209                 #define CPU_CM3_STM32       1
210                 #define CPU_CM3_STM32F103RB 1
211                 #define CPU_NAME            "STM32F103RB"
212         #else
213                 #define CPU_CM3_STM32F103RB 0
214         #endif
215
216         #if defined (__ARM_AT91SAM3N4__)
217                 #define CPU_CM3_AT91SAM3    1
218                 #define CPU_CM3_AT91SAM3N   1
219                 #define CPU_CM3_AT91SAM3N4  1
220                 #define CPU_NAME            "AT91SAM3N4"
221
222                 #define CPU_CM3_AT91SAM3S   0
223                 #define CPU_CM3_AT91SAM3U   0
224                 #define CPU_CM3_AT91SAM3N2  0
225                 #define CPU_CM3_AT91SAM3N1  0
226         #else
227                 #define CPU_CM3_AT91SAM3N4  0
228         #endif
229
230         #if defined (__ARM_AT91SAM3S4__)
231                 #define CPU_CM3_AT91SAM3    1
232                 #define CPU_CM3_AT91SAM3S   1
233                 #define CPU_CM3_AT91SAM3S4  1
234                 #define CPU_NAME            "AT91SAM3S4"
235
236                 #define CPU_CM3_AT91SAM3N   0
237                 #define CPU_CM3_AT91SAM3U   0
238         #else
239                 #define CPU_CM3_AT91SAM3S4  0
240         #endif
241
242         #if defined (__ARM_AT91SAM3U4__)
243                 #define CPU_CM3_AT91SAM3    1
244                 #define CPU_CM3_AT91SAM3U   1
245                 #define CPU_CM3_AT91SAM3U4  1
246                 #define CPU_NAME            "AT91SAM3U4"
247
248                 #define CPU_CM3_AT91SAM3N   0
249                 #define CPU_CM3_AT91SAM3S   0
250         #else
251                 #define CPU_CM3_AT91SAM3U4  0
252         #endif
253
254         #if defined (CPU_CM3_LM3S)
255                 #if CPU_CM3_LM3S1968 + CPU_CM3_LM3S8962 + 0 != 1
256                         #error Luminary Cortex-M3 CPU configuration error
257                 #endif
258                 #define CPU_CM3_STM32       0
259                 #define CPU_CM3_AT91SAM3    0
260         #elif defined (CPU_CM3_STM32)
261                 #if CPU_CM3_STM32F103RB + 0 != 1
262                         #error STM32 Cortex-M3 CPU configuration error
263                 #endif
264                 #define CPU_CM3_LM3S        0
265                 #define CPU_CM3_AT91SAM3    0
266         #elif defined (CPU_CM3_AT91SAM3)
267                 #if CPU_CM3_AT91SAM3N + 0 != 1
268                         #error AT91SAM3 Cortex-M3 CPU configuration error
269                 #endif
270                 #if CPU_CM3_AT91SAM3N4 + CPU_CM3_AT91SAM3S4 + CPU_CM3_AT91SAM3U4 + 0 != 1
271                         #error AT91SAM3 Cortex-M3 CPU configuration error
272                 #endif
273                 #define CPU_CM3_LM3S        0
274                 #define CPU_CM3_STM32       0
275         /* #elif Add other Cortex-M3 families here */
276         #else
277                 #define CPU_CM3_LM3S        0
278                 #define CPU_CM3_STM32       0
279                 #define CPU_CM3_AT91SAM3    0
280         #endif
281
282
283         #if CPU_CM3_LM3S + CPU_CM3_STM32 + CPU_CM3_AT91SAM3 + 0 /* Add other Cortex-M3 families here */ != 1
284                 #error Cortex-M3 CPU configuration error
285         #endif
286
287 #else
288         #define CPU_CM3 0
289         #define CPU_CM3_LM3S 0
290         #define CPU_CM3_LM3S1968 0
291         #define CPU_CM3_LM3S8962 0
292
293         #define CPU_CM3_STM32 0
294         #define CPU_CM3_STM32F103RB 0
295
296         #define CPU_CM3_AT91SAM3 0
297         #define CPU_CM3_AT91SAM3N 0
298         #define CPU_CM3_AT91SAM3N4 0
299 #endif
300
301 #if (defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC)) \
302         && !defined(__ARM4TM__) /* IAR: if not ARM assume I196 */
303         #warning Assuming CPU is I196
304         #define CPU_I196                1
305         #define CPU_ID                  i196
306 #else
307         #define CPU_I196                0
308 #endif
309
310 #if defined(__i386__) /* GCC */ \
311         || (defined(_M_IX86) && !defined(_WIN64)) /* MSVC */
312         #define CPU_X86                 1
313         #define CPU_X86_32              1
314         #define CPU_X86_64              0
315         #define CPU_ID                  x86
316         #define CPU_CORE_NAME           "x86"
317         #define CPU_NAME                "generic"
318 #elif defined(__x86_64__) /* GCC */ \
319         || (defined(_M_IX86) && defined(_WIN64)) /* MSVC */
320         #define CPU_X86                 1
321         #define CPU_X86_32              0
322         #define CPU_X86_64              1
323         #define CPU_ID                  x86
324         #define CPU_CORE_NAME           "x86_64"
325         #define CPU_NAME                "generic"
326 #else
327         #define CPU_X86                 0
328         #define CPU_I386                0
329         #define CPU_X86_64              0
330 #endif
331
332 #if defined (_ARCH_PPC) || defined(_ARCH_PPC64)
333         #define CPU_PPC                 1
334         #define CPU_ID                  ppc
335         #if defined(_ARCH_PPC)
336                 #define CPU_PPC32       1
337         #else
338                 #define CPU_PPC32       0
339         #endif
340         #if defined(_ARCH_PPC64)
341                 #define CPU_PPC64       1
342         #else
343                 #define CPU_PPC64       0
344         #endif
345 #else
346         #define CPU_PPC                 0
347         #define CPU_PPC32               0
348         #define CPU_PPC64               0
349 #endif
350
351 #if defined(__m56800E__) || defined(__m56800__)
352         #define CPU_DSP56K              1
353         #define CPU_ID                  dsp56k
354 #else
355         #define CPU_DSP56K              0
356 #endif
357
358 #if defined (__AVR__)
359         #define CPU_AVR                 1
360         #define CPU_ID                  avr
361         #define CPU_CORE_NAME           "AVR"
362
363         #if defined(__AVR_ATmega32__)
364                 #define CPU_AVR_ATMEGA32    1
365                 #define CPU_NAME            "ATmega32"
366         #else
367                 #define CPU_AVR_ATMEGA32    0
368         #endif
369
370         #if defined(__AVR_ATmega64__)
371                 #define CPU_AVR_ATMEGA64    1
372                 #define CPU_NAME            "ATmega64"
373         #else
374                 #define CPU_AVR_ATMEGA64    0
375         #endif
376
377         #if defined(__AVR_ATmega103__)
378                 #define CPU_AVR_ATMEGA103   1
379                 #define CPU_NAME            "ATmega103"
380         #else
381                 #define CPU_AVR_ATMEGA103   0
382         #endif
383
384         #if defined(__AVR_ATmega128__)
385                 #define CPU_AVR_ATMEGA128   1
386                 #define CPU_NAME            "ATmega128"
387         #else
388                 #define CPU_AVR_ATMEGA128   0
389         #endif
390
391         #if defined(__AVR_ATmega8__)
392                 #define CPU_AVR_ATMEGA8     1
393                 #define CPU_NAME            "ATmega8"
394         #else
395                 #define CPU_AVR_ATMEGA8     0
396         #endif
397
398         #if defined(__AVR_ATmega168__)
399                 #define CPU_AVR_ATMEGA168   1
400                 #define CPU_NAME            "ATmega168"
401         #else
402                 #define CPU_AVR_ATMEGA168   0
403         #endif
404
405         #if defined(__AVR_ATmega328P__)
406                 #define CPU_AVR_ATMEGA328P   1
407                 #define CPU_NAME            "ATmega328P"
408         #else
409                 #define CPU_AVR_ATMEGA328P   0
410         #endif
411
412         #if defined(__AVR_ATmega1281__)
413                 #define CPU_AVR_ATMEGA1281  1
414                 #define CPU_NAME            "ATmega1281"
415         #else
416                 #define CPU_AVR_ATMEGA1281  0
417         #endif
418
419         #if defined(__AVR_ATmega1280__)
420                 #define CPU_AVR_ATMEGA1280  1
421                 #define CPU_NAME            "ATmega1280"
422         #else
423                 #define CPU_AVR_ATMEGA1280  0
424         #endif
425
426         #if CPU_AVR_ATMEGA32 + CPU_AVR_ATMEGA64 + CPU_AVR_ATMEGA103 + CPU_AVR_ATMEGA128 \
427           + CPU_AVR_ATMEGA8 + CPU_AVR_ATMEGA168 + CPU_AVR_ATMEGA328P + CPU_AVR_ATMEGA1281 \
428           + CPU_AVR_ATMEGA1280 != 1
429                 #error AVR CPU configuration error
430         #endif
431 #else
432         #define CPU_AVR                 0
433         #define CPU_AVR_ATMEGA8         0
434         #define CPU_AVR_ATMEGA168       0
435         #define CPU_AVR_ATMEGA328P      0
436         #define CPU_AVR_ATMEGA32        0
437         #define CPU_AVR_ATMEGA64        0
438         #define CPU_AVR_ATMEGA103       0
439         #define CPU_AVR_ATMEGA128       0
440         #define CPU_AVR_ATMEGA1281      0
441         #define CPU_AVR_ATMEGA1280      0
442 #endif
443
444 #if defined (__MSP430__)
445         #define CPU_MSP430              1
446         #define CPU_ID                  msp430
447         #define CPU_CORE_NAME           "MSP430"
448
449         #if defined(__MSP430F2274__)
450                 #define CPU_MSP430F2274     1
451                 #define CPU_NAME            "MSP430F2274"
452         #else
453                 #define CPU_MSP430F2274     0
454         #endif
455
456         #if defined(__MSP430G2231__)
457                 #define CPU_MSP430G2231     1
458                 #define CPU_NAME            "MSP430G2231"
459         #else
460                 #define CPU_MSP430G2231     0
461         #endif
462
463         #if CPU_MSP430F2274 + CPU_MSP430G2231 != 1
464                 #error MSP430 CPU configuration error
465         #endif
466 #else
467         #define CPU_MSP430                  0
468         #define CPU_MSP430F2274             0
469         #define CPU_MSP430G2231             0
470 #endif
471
472
473 /* Self-check for the detection: only one CPU must be detected */
474 #if CPU_ARM + CPU_CM3 + CPU_I196 + CPU_X86 + CPU_PPC + CPU_DSP56K + CPU_AVR + CPU_MSP430 == 0
475         #error Unknown CPU
476 #elif !defined(CPU_ID)
477         #error CPU_ID not defined
478 #elif CPU_ARM + CPU_CM3 + CPU_I196 + CPU_X86 + CPU_PPC + CPU_DSP56K + CPU_AVR + CPU_MSP430 != 1
479         #error Internal CPU configuration error
480 #endif
481
482
483 #endif /* CPU_DETECT_H */