4 * This file is part of BeRTOS.
6 * Bertos is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 * As a special exception, you may use this file as part of a free software
21 * library without restriction. Specifically, if other files instantiate
22 * templates or use macros or inline functions from this file, or you compile
23 * this file and link it with other files to produce an executable, this
24 * file does not by itself cause the resulting executable to be covered by
25 * the GNU General Public License. This exception does not however
26 * invalidate any other reasons why the executable file might be covered by
27 * the GNU General Public License.
29 * Copyright 2008 Bernie Innocenti <bernie@codewiz.org>
30 * Copyright 2004, 2005, 2006, 2007, 2008 Develer S.r.l. (http://www.develer.com/)
31 * Copyright 2004 Giovanni Bajo
35 * \brief CPU-specific stack frame handling macros.
37 * These are mainly used by the portable part of the scheduler
38 * to work with the process stack frames.
40 * \author Giovanni Bajo <rasky@develer.com>
41 * \author Bernie Innocenti <bernie@codewiz.org>
42 * \author Stefano Fedrigo <aleph@develer.com>
43 * \author Francesco Sacchi <batt@develer.com>
48 #include <cpu/detect.h>
50 #include "cfg/cfg_arch.h" /* ARCH_EMUL */
51 #include <cfg/compiler.h> /* for uintXX_t */
55 #define CPU_SAVED_REGS_CNT 2
57 #define CPU_SAVED_REGS_CNT 8
61 #define CPU_STACK_GROWS_UPWARD 0
62 #define CPU_SP_ON_EMPTY_SLOT 0
66 #define CPU_SAVED_REGS_CNT 8
67 #define CPU_STACK_GROWS_UPWARD 0
68 #define CPU_SP_ON_EMPTY_SLOT 0
72 #define CPU_SAVED_REGS_CNT 8
73 #define CPU_STACK_GROWS_UPWARD 0
74 #define CPU_SP_ON_EMPTY_SLOT 0
78 #define CPU_SAVED_REGS_CNT 1
79 #define CPU_STACK_GROWS_UPWARD 0
80 #define CPU_SP_ON_EMPTY_SLOT 1
84 #define CPU_SAVED_REGS_CNT 8
85 #define CPU_STACK_GROWS_UPWARD 1
86 #define CPU_SP_ON_EMPTY_SLOT 0
90 #define CPU_SAVED_REGS_CNT 18
91 #define CPU_STACK_GROWS_UPWARD 0
92 #define CPU_SP_ON_EMPTY_SLOT 1
95 #error No CPU_... defined.
98 #ifndef CPU_STACK_GROWS_UPWARD
99 #error CPU_STACK_GROWS_UPWARD should have been defined to either 0 or 1
102 #ifndef CPU_SP_ON_EMPTY_SLOT
103 #error CPU_SP_ON_EMPTY_SLOT should have been defined to either 0 or 1
106 /// Default for macro not defined in the right arch section
107 #ifndef CPU_REG_INIT_VALUE
108 #define CPU_REG_INIT_VALUE(reg) (reg)
112 * Support stack handling peculiarities of a few CPUs.
114 * Most processors let their stack grow downward and
115 * keep SP pointing at the last pushed value.
117 #if !CPU_STACK_GROWS_UPWARD
118 #if !CPU_SP_ON_EMPTY_SLOT
119 /* Most microprocessors (x86, m68k...) */
120 #define CPU_PUSH_WORD(sp, data) \
121 do { *--(sp) = (data); } while (0)
122 #define CPU_POP_WORD(sp) \
126 #define CPU_PUSH_WORD(sp, data) \
127 do { *(sp)-- = (data); } while (0)
128 #define CPU_POP_WORD(sp) \
132 #else /* CPU_STACK_GROWS_UPWARD */
134 #if !CPU_SP_ON_EMPTY_SLOT
135 /* DSP56K and other weirdos */
136 #define CPU_PUSH_WORD(sp, data) \
137 do { *++(sp) = (cpu_stack_t)(data); } while (0)
138 #define CPU_POP_WORD(sp) \
141 #error I bet you cannot find a CPU like this
148 * DSP56k pushes both PC and SR to the stack in the JSR instruction, but
149 * RTS discards SR while returning (it does not restore it). So we push
150 * 0 to fake the same context.
152 #define CPU_PUSH_CALL_FRAME(sp, func) \
154 CPU_PUSH_WORD((sp), (func)); \
155 CPU_PUSH_WORD((sp), 0x100); \
160 #if CONFIG_KERN_PREEMPT
161 INLINE void asm_switch_context(cpu_stack_t **new_sp, cpu_stack_t **old_sp)
163 register cpu_stack_t **__new_sp asm ("r0") = new_sp;
164 register cpu_stack_t **__old_sp asm ("r1") = old_sp;
166 asm volatile ("svc #0"
167 : : "r"(__new_sp), "r"(__old_sp) : "memory", "cc");
169 #define asm_switch_context asm_switch_context
171 #define CPU_PUSH_CALL_FRAME(sp, func) \
173 CPU_PUSH_WORD((sp), 0x01000000); /* xPSR */ \
174 CPU_PUSH_WORD((sp), (cpu_stack_t)(func)); /* pc */ \
175 CPU_PUSH_WORD((sp), 0); /* lr */ \
176 CPU_PUSH_WORD((sp), 0); /* ip */ \
177 CPU_PUSH_WORD((sp), 0); /* r3 */ \
178 CPU_PUSH_WORD((sp), 0); /* r2 */ \
179 CPU_PUSH_WORD((sp), 0); /* r1 */ \
180 CPU_PUSH_WORD((sp), 0); /* r0 */ \
181 CPU_PUSH_WORD((sp), 0xfffffffd); /* lr_exc */ \
184 #define CPU_CREATE_NEW_STACK(stack) \
187 /* Initialize process stack frame */ \
188 CPU_PUSH_CALL_FRAME(stack, proc_entry); \
189 /* Push a clean set of CPU registers for asm_switch_context() */ \
190 for (i = 0; i < CPU_SAVED_REGS_CNT; i++) \
191 CPU_PUSH_WORD(stack, CPU_REG_INIT_VALUE(i)); \
192 CPU_PUSH_WORD(stack, IRQ_PRIO_DISABLED); \
195 #else /* !CONFIG_KERN_PREEMPT */
196 #define CPU_PUSH_CALL_FRAME(sp, func) \
198 CPU_PUSH_WORD((sp), 0x01000000); /* xPSR */ \
199 CPU_PUSH_WORD((sp), (cpu_stack_t)(func)); /* pc */ \
201 #endif /* CONFIG_KERN_PREEMPT */
205 * On AVR, addresses are pushed into the stack as little-endian, while
206 * memory accesses are big-endian (actually, it's a 8-bit CPU, so there is
207 * no natural endianess).
209 #define CPU_PUSH_CALL_FRAME(sp, func) \
211 uint16_t funcaddr = (uint16_t)(func); \
212 CPU_PUSH_WORD((sp), funcaddr); \
213 CPU_PUSH_WORD((sp), funcaddr>>8); \
217 * If the kernel is in idle-spinning, the processor executes:
223 * IRQ_ENABLE is translated in asm as "sei" and IRQ_DISABLE as "cli".
224 * We could define CPU_IDLE to expand to none, so the resulting
230 * But Atmel datasheet states:
231 * "When using the SEI instruction to enable interrupts,
232 * the instruction following SEI will be executed *before*
233 * any pending interrupts", so "cli" is executed before any
234 * pending interrupt with the result that IRQs will *NOT*
236 * To ensure that IRQ will run a NOP is required.
242 #define CPU_PUSH_CALL_FRAME(sp, func) \
244 CPU_PUSH_WORD((sp), (cpu_stack_t)(func)); /* LR -> 8(SP) */ \
245 CPU_PUSH_WORD((sp), 0); /* CR -> 4(SP) */ \
249 #define CPU_PUSH_CALL_FRAME(sp, func) \
250 CPU_PUSH_WORD((sp), (cpu_stack_t)(func))
256 * \brief Invoked by the scheduler to stop the CPU when idle.
258 * This hook can be redefined to put the CPU in low-power mode, or to
259 * profile system load with an external strobe, or to save CPU cycles
260 * in hosted environments such as emulators.
263 #define CPU_IDLE PAUSE
264 #endif /* !CPU_IDLE */
267 * Default macro for creating a new Process stack
269 #ifndef CPU_CREATE_NEW_STACK
271 #define CPU_CREATE_NEW_STACK(stack) \
274 /* Initialize process stack frame */ \
275 CPU_PUSH_CALL_FRAME(stack, proc_entry); \
276 /* Push a clean set of CPU registers for asm_switch_context() */ \
277 for (i = 0; i < CPU_SAVED_REGS_CNT; i++) \
278 CPU_PUSH_WORD(stack, CPU_REG_INIT_VALUE(i)); \
282 #endif /* CPU_ATTR_H */