bertos/cpu/frame.h

   1 /**
   2  * \file
   3  * <!--
   4  * This file is part of BeRTOS.
   5  *
   6  * Bertos is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  19  *
  20  * As a special exception, you may use this file as part of a free software
  21  * library without restriction.  Specifically, if other files instantiate
  22  * templates or use macros or inline functions from this file, or you compile
  23  * this file and link it with other files to produce an executable, this
  24  * file does not by itself cause the resulting executable to be covered by
  25  * the GNU General Public License.  This exception does not however
  26  * invalidate any other reasons why the executable file might be covered by
  27  * the GNU General Public License.
  28  *
  29  * Copyright 2008 Bernie Innocenti <bernie@codewiz.org>
  30  * Copyright 2004, 2005, 2006, 2007, 2008 Develer S.r.l. (http://www.develer.com/)
  31  * Copyright 2004 Giovanni Bajo
  32  *
  33  * -->
  34  *
  35  * \brief CPU-specific stack frame handling macros.
  36  *
  37  * These are mainly used by the portable part of the scheduler
  38  * to work with the process stack frames.
  39  *
  40  * \author Giovanni Bajo <rasky@develer.com>
  41  * \author Bernie Innocenti <bernie@codewiz.org>
  42  * \author Stefano Fedrigo <aleph@develer.com>
  43  * \author Francesco Sacchi <batt@develer.com>
  44  */
  45 #ifndef CPU_FRAME_H
  46 #define CPU_FRAME_H
  47
  48 #include <cpu/detect.h>
  49
  50 #include "cfg/cfg_arch.h"      /* ARCH_EMUL */
  51 #include <cfg/compiler.h>      /* for uintXX_t */
  52
  53 #if CPU_X86
  54         #if CPU_X86_32
  55                 #define CPU_SAVED_REGS_CNT      2
  56         #elif CPU_X86_64
  57                 #define CPU_SAVED_REGS_CNT      8
  58         #else
  59                 #error "unknown CPU"
  60         #endif
  61         #define CPU_STACK_GROWS_UPWARD  0
  62         #define CPU_SP_ON_EMPTY_SLOT    0
  63
  64 #elif CPU_ARM
  65
  66         #define CPU_SAVED_REGS_CNT     8
  67         #define CPU_STACK_GROWS_UPWARD 0
  68         #define CPU_SP_ON_EMPTY_SLOT   0
  69
  70 #elif CPU_CM3
  71
  72         #define CPU_SAVED_REGS_CNT     8
  73         #define CPU_STACK_GROWS_UPWARD 0
  74         #define CPU_SP_ON_EMPTY_SLOT   0
  75
  76 #elif CPU_PPC
  77
  78         #define CPU_SAVED_REGS_CNT     1
  79         #define CPU_STACK_GROWS_UPWARD 0
  80         #define CPU_SP_ON_EMPTY_SLOT   1
  81
  82 #elif CPU_DSP56K
  83
  84         #define CPU_SAVED_REGS_CNT      8
  85         #define CPU_STACK_GROWS_UPWARD  1
  86         #define CPU_SP_ON_EMPTY_SLOT    0
  87
  88 #elif CPU_AVR
  89
  90         #define CPU_SAVED_REGS_CNT     18
  91         #define CPU_STACK_GROWS_UPWARD  0
  92         #define CPU_SP_ON_EMPTY_SLOT    1
  93
  94 #elif CPU_MSP430
  95
  96         #define CPU_SAVED_REGS_CNT     16
  97         #define CPU_STACK_GROWS_UPWARD  1
  98         #define CPU_SP_ON_EMPTY_SLOT    0
  99
 100 #else
 101         #error No CPU_... defined.
 102 #endif
 103
 104 #ifndef CPU_STACK_GROWS_UPWARD
 105         #error CPU_STACK_GROWS_UPWARD should have been defined to either 0 or 1
 106 #endif
 107
 108 #ifndef CPU_SP_ON_EMPTY_SLOT
 109         #error CPU_SP_ON_EMPTY_SLOT should have been defined to either 0 or 1
 110 #endif
 111
 112 /// Default for macro not defined in the right arch section
 113 #ifndef CPU_REG_INIT_VALUE
 114         #define CPU_REG_INIT_VALUE(reg)     (reg)
 115 #endif
 116
 117 /*
 118  * Support stack handling peculiarities of a few CPUs.
 119  *
 120  * Most processors let their stack grow downward and
 121  * keep SP pointing at the last pushed value.
 122  */
 123 #if !CPU_STACK_GROWS_UPWARD
 124         #if !CPU_SP_ON_EMPTY_SLOT
 125                 /* Most microprocessors (x86, m68k...) */
 126                 #define CPU_PUSH_WORD(sp, data) \
 127                         do { *--(sp) = (data); } while (0)
 128                 #define CPU_POP_WORD(sp) \
 129                         (*(sp)++)
 130         #else
 131                 /* AVR insanity */
 132                 #define CPU_PUSH_WORD(sp, data) \
 133                         do { *(sp)-- = (data); } while (0)
 134                 #define CPU_POP_WORD(sp) \
 135                         (*++(sp))
 136         #endif
 137
 138 #else /* CPU_STACK_GROWS_UPWARD */
 139
 140         #if !CPU_SP_ON_EMPTY_SLOT
 141                 /* DSP56K and other weirdos */
 142                 #define CPU_PUSH_WORD(sp, data) \
 143                         do { *++(sp) = (cpu_stack_t)(data); } while (0)
 144                 #define CPU_POP_WORD(sp) \
 145                         (*(sp)--)
 146         #else
 147                 #error I bet you cannot find a CPU like this
 148         #endif
 149 #endif
 150
 151
 152 #if CPU_DSP56K
 153         /*
 154          * DSP56k pushes both PC and SR to the stack in the JSR instruction, but
 155          * RTS discards SR while returning (it does not restore it). So we push
 156          * 0 to fake the same context.
 157          */
 158         #define CPU_PUSH_CALL_FRAME(sp, func) \
 159                 do { \
 160                         CPU_PUSH_WORD((sp), (func)); \
 161                         CPU_PUSH_WORD((sp), 0x100); \
 162                 } while (0);
 163
 164 #elif CPU_CM3
 165
 166         #if CONFIG_KERN_PREEMPT
 167                 INLINE void asm_switch_context(cpu_stack_t **new_sp, cpu_stack_t **old_sp)
 168                 {
 169                         register cpu_stack_t **__new_sp asm ("r0") = new_sp;
 170                         register cpu_stack_t **__old_sp asm ("r1") = old_sp;
 171
 172                         asm volatile ("svc #0"
 173                                 : : "r"(__new_sp), "r"(__old_sp) : "memory", "cc");
 174                 }
 175                 #define asm_switch_context asm_switch_context
 176
 177                 #define CPU_PUSH_CALL_FRAME(sp, func) \
 178                         do { \
 179                                 CPU_PUSH_WORD((sp), 0x01000000);                /* xPSR    */   \
 180                                 CPU_PUSH_WORD((sp), (cpu_stack_t)(func));       /* pc      */   \
 181                                 CPU_PUSH_WORD((sp), 0);                         /* lr      */   \
 182                                 CPU_PUSH_WORD((sp), 0);                         /* ip      */   \
 183                                 CPU_PUSH_WORD((sp), 0);                         /* r3      */   \
 184                                 CPU_PUSH_WORD((sp), 0);                         /* r2      */   \
 185                                 CPU_PUSH_WORD((sp), 0);                         /* r1      */   \
 186                                 CPU_PUSH_WORD((sp), 0);                         /* r0      */   \
 187                                 CPU_PUSH_WORD((sp), 0xfffffffd);                /* lr_exc  */   \
 188                         } while (0);
 189
 190                 #define CPU_CREATE_NEW_STACK(stack) \
 191                         do { \
 192                                 size_t i; \
 193                                 /* Initialize process stack frame */ \
 194                                 CPU_PUSH_CALL_FRAME(stack, proc_entry); \
 195                                 /* Push a clean set of CPU registers for asm_switch_context() */ \
 196                                 for (i = 0; i < CPU_SAVED_REGS_CNT; i++) \
 197                                         CPU_PUSH_WORD(stack, CPU_REG_INIT_VALUE(i)); \
 198                                 CPU_PUSH_WORD(stack, IRQ_PRIO_DISABLED); \
 199                         } while (0)
 200
 201         #else /* !CONFIG_KERN_PREEMPT */
 202                 #define CPU_PUSH_CALL_FRAME(sp, func) \
 203                         do { \
 204                                 CPU_PUSH_WORD((sp), 0x01000000);                /* xPSR    */   \
 205                                 CPU_PUSH_WORD((sp), (cpu_stack_t)(func));       /* pc      */   \
 206                         } while (0);
 207         #endif /* CONFIG_KERN_PREEMPT */
 208
 209 #elif CPU_AVR
 210         /*
 211          * On AVR, addresses are pushed into the stack as little-endian, while
 212          * memory accesses are big-endian (actually, it's a 8-bit CPU, so there is
 213          * no natural endianess).
 214          */
 215         #define CPU_PUSH_CALL_FRAME(sp, func) \
 216                 do { \
 217                         uint16_t funcaddr = (uint16_t)(func); \
 218                         CPU_PUSH_WORD((sp), funcaddr); \
 219                         CPU_PUSH_WORD((sp), funcaddr>>8); \
 220                 } while (0)
 221
 222         /*
 223          * If the kernel is in idle-spinning, the processor executes:
 224          *
 225          * IRQ_ENABLE;
 226          * CPU_IDLE;
 227          * IRQ_DISABLE;
 228          *
 229          * IRQ_ENABLE is translated in asm as "sei" and IRQ_DISABLE as "cli".
 230          * We could define CPU_IDLE to expand to none, so the resulting
 231          * asm code would be:
 232          *
 233          * sei;
 234          * cli;
 235          *
 236          * But Atmel datasheet states:
 237          * "When using the SEI instruction to enable interrupts,
 238          * the instruction following SEI will be executed *before*
 239          * any pending interrupts", so "cli" is executed before any
 240          * pending interrupt with the result that IRQs will *NOT*
 241          * be enabled!
 242          * To ensure that IRQ will run a NOP is required.
 243          */
 244         #define CPU_IDLE NOP
 245
 246 #elif CPU_PPC
 247
 248         #define CPU_PUSH_CALL_FRAME(sp, func) \
 249                 do { \
 250                         CPU_PUSH_WORD((sp), (cpu_stack_t)(func)); /* LR -> 8(SP) */ \
 251                         CPU_PUSH_WORD((sp), 0);                  /* CR -> 4(SP) */ \
 252                 } while (0)
 253
 254 #else
 255         #define CPU_PUSH_CALL_FRAME(sp, func) \
 256                 CPU_PUSH_WORD((sp), (cpu_stack_t)(func))
 257 #endif
 258
 259 /**
 260  * \def CPU_IDLE
 261  *
 262  * \brief Invoked by the scheduler to stop the CPU when idle.
 263  *
 264  * This hook can be redefined to put the CPU in low-power mode, or to
 265  * profile system load with an external strobe, or to save CPU cycles
 266  * in hosted environments such as emulators.
 267  */
 268 #ifndef CPU_IDLE
 269         #define CPU_IDLE PAUSE
 270 #endif /* !CPU_IDLE */
 271
 272 /**
 273  * Default macro for creating a new Process stack
 274  */
 275 #ifndef CPU_CREATE_NEW_STACK
 276
 277         #define CPU_CREATE_NEW_STACK(stack) \
 278                 do { \
 279                         size_t i; \
 280                         /* Initialize process stack frame */ \
 281                         CPU_PUSH_CALL_FRAME(stack, proc_entry); \
 282                         /* Push a clean set of CPU registers for asm_switch_context() */ \
 283                         for (i = 0; i < CPU_SAVED_REGS_CNT; i++) \
 284                                 CPU_PUSH_WORD(stack, CPU_REG_INIT_VALUE(i)); \
 285                 } while (0)
 286 #endif
 287
 288 #endif /* CPU_ATTR_H */