4 * This file is part of BeRTOS.
6 * Bertos is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
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11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 * As a special exception, you may use this file as part of a free software
21 * library without restriction. Specifically, if other files instantiate
22 * templates or use macros or inline functions from this file, or you compile
23 * this file and link it with other files to produce an executable, this
24 * file does not by itself cause the resulting executable to be covered by
25 * the GNU General Public License. This exception does not however
26 * invalidate any other reasons why the executable file might be covered by
27 * the GNU General Public License.
29 * Copyright 2004, 2005, 2006, 2007 Develer S.r.l. (http://www.develer.com/)
30 * Copyright 2004 Giovanni Bajo
34 * \brief CPU-specific IRQ definitions.
36 * \author Giovanni Bajo <rasky@develer.com>
37 * \author Bernie Innocenti <bernie@codewiz.org>
38 * \author Stefano Fedrigo <aleph@develer.com>
39 * \author Francesco Sacchi <batt@develer.com>
47 #include <kern/proc.h> /* proc_needPreempt() / proc_preempt() */
49 #include <cfg/compiler.h> /* for uintXX_t */
50 #include "cfg/cfg_proc.h" /* CONFIG_KERN_PREEMPT */
53 #define IRQ_DISABLE disable_interrupt()
54 #define IRQ_ENABLE enable_interrupt()
57 /* Get IRQ_* definitions from the hosting environment. */
60 #define IRQ_DISABLE FIXME
61 #define IRQ_ENABLE FIXME
62 #define IRQ_SAVE_DISABLE(x) FIXME
63 #define IRQ_RESTORE(x) FIXME
64 #endif /* OS_EMBEDDED */
69 #ifdef __IAR_SYSTEMS_ICC__
73 #if __CPU_MODE__ == 1 /* Thumb */
75 extern cpu_flags_t get_CPSR(void);
76 extern void set_CPSR(cpu_flags_t flags);
78 #define get_CPSR __get_CPSR
79 #define set_CPSR __set_CPSR
82 #define IRQ_DISABLE __disable_interrupt()
83 #define IRQ_ENABLE __enable_interrupt()
85 #define IRQ_SAVE_DISABLE(x) \
88 __disable_interrupt(); \
91 #define IRQ_RESTORE(x) \
96 #define IRQ_ENABLED() \
97 ((bool)(get_CPSR() & 0xb0))
99 #else /* !__IAR_SYSTEMS_ICC__ */
101 #define IRQ_DISABLE \
105 "orr r0, r0, #0xc0\n\t" \
115 "bic r0, r0, #0xc0\n\t" \
121 #define IRQ_SAVE_DISABLE(x) \
125 "orr r0, %0, #0xc0\n\t" \
133 #define IRQ_RESTORE(x) \
142 #define CPU_READ_FLAGS() \
153 #define IRQ_ENABLED() ((CPU_READ_FLAGS() & 0xc0) != 0xc0)
155 #if CONFIG_KERN_PREEMPT
156 EXTERN_C void asm_irq_switch_context(void);
159 * At the beginning of any ISR immediately ajust the
160 * return address and store all the caller-save
161 * registers (the ISR may change these registers that
162 * are shared with the user-context).
164 #define IRQ_ENTRY() asm volatile ( \
165 "sub lr, lr, #4\n\t" \
166 "stmfd sp!, {r0-r3, ip, lr}\n\t")
167 #define IRQ_EXIT() asm volatile ( \
168 "b asm_irq_switch_context\n\t")
170 * Function attribute to declare an interrupt service
173 * An ISR function must be declared as naked because we
174 * want to add our IRQ_ENTRY() prologue and IRQ_EXIT()
175 * epilogue code to handle the context switch and save
176 * all the registers (not only the callee-save).
179 #define ISR_FUNC __attribute__((naked))
182 * The compiler cannot establish which
183 * registers actually need to be saved, because
184 * the interrupt can happen at any time, so the
185 * "normal" prologue and epilogue used for a
186 * generic function call are not suitable for
189 * Using a naked function has the drawback that
190 * the stack is not automatically adjusted at
191 * this point, like a "normal" function call.
193 * So, an ISR can _only_ contain other function
194 * calls and they can't use the stack in any
197 * NOTE: we need to explicitly disable IRQs after
198 * IRQ_ENTRY(), because the IRQ status flag is not
199 * masked by the hardware and an IRQ ack inside the ISR
200 * may cause the triggering of another IRQ before
201 * exiting from the current ISR.
203 * The respective IRQ_ENABLE is not necessary, because
204 * IRQs will be automatically re-enabled when restoring
205 * the context of the user task.
207 #define DECLARE_ISR_CONTEXT_SWITCH(func) \
208 void ISR_FUNC func(void); \
209 static void __isr_##func(void); \
210 void ISR_FUNC func(void) \
217 static void __isr_##func(void)
219 * Interrupt service routine prototype: can be used for
220 * forward declarations.
222 #define ISR_PROTO_CONTEXT_SWITCH(func) \
223 void ISR_FUNC func(void)
225 * With task priorities enabled each ISR is used a point to
226 * check if we need to perform a context switch.
228 * Instead, without priorities a context switch can occur only
229 * when the running task expires its time quantum. In this last
230 * case, the context switch can only occur in the timer
231 * ISR, that must be always declared with the
232 * DECLARE_ISR_CONTEXT_SWITCH() macro.
235 #define DECLARE_ISR(func) \
236 DECLARE_ISR_CONTEXT_SWITCH(func)
238 #define ISR_PROTO(func) \
239 ISR_PROTO_CONTEXT_SWITCH(func)
240 #endif /* !CONFIG_KERN_PRI */
241 #endif /* CONFIG_KERN_PREEMPT */
244 #define DECLARE_ISR(func) \
245 void __attribute__((interrupt)) func(void)
247 #ifndef DECLARE_ISR_CONTEXT_SWITCH
248 #define DECLARE_ISR_CONTEXT_SWITCH(func) \
249 void __attribute__((interrupt)) func(void)
252 #define ISR_PROTO(func) \
253 void __attribute__((interrupt)) func(void)
255 #ifndef ISR_PROTO_CONTEXT_SWITCH
256 #define ISR_PROTO_CONTEXT_SWITCH(func) \
257 void __attribute__((interrupt)) func(void)
260 #endif /* !__IAR_SYSTEMS_ICC_ */
264 /* Get IRQ_* definitions from the hosting environment. */
267 #define IRQ_DISABLE FIXME
268 #define IRQ_ENABLE FIXME
269 #define IRQ_SAVE_DISABLE(x) FIXME
270 #define IRQ_RESTORE(x) FIXME
271 #define IRQ_ENABLED() FIXME
272 #endif /* OS_EMBEDDED */
276 #define IRQ_DISABLE do { asm(bfset #0x0200,SR); asm(nop); } while (0)
277 #define IRQ_ENABLE do { asm(bfclr #0x0200,SR); asm(nop); } while (0)
279 #define IRQ_SAVE_DISABLE(x) \
280 do { (void)x; asm(move SR,x); asm(bfset #0x0200,SR); } while (0)
281 #define IRQ_RESTORE(x) \
282 do { (void)x; asm(move x,SR); } while (0)
284 static inline bool irq_running(void)
286 extern void *user_sp;
289 #define IRQ_RUNNING() irq_running()
291 static inline bool irq_enabled(void)
295 return !(x & 0x0200);
297 #define IRQ_ENABLED() irq_enabled()
301 #define IRQ_DISABLE asm volatile ("cli" ::)
302 #define IRQ_ENABLE asm volatile ("sei" ::)
304 #define IRQ_SAVE_DISABLE(x) \
306 __asm__ __volatile__( \
307 "in %0,__SREG__\n\t" \
309 : "=r" (x) : /* no inputs */ : "cc" \
313 #define IRQ_RESTORE(x) \
315 __asm__ __volatile__( \
316 "out __SREG__,%0" : /* no outputs */ : "r" (x) : "cc" \
320 #define IRQ_ENABLED() \
323 __asm__ __volatile__( \
324 "in %0,__SREG__\n\t" \
325 : "=r" (sreg) /* no inputs & no clobbers */ \
327 (bool)(sreg & 0x80); \
329 #if CONFIG_KERN_PREEMPT
330 #define DECLARE_ISR_CONTEXT_SWITCH(vect) \
331 INLINE void __isr_##vect(void); \
335 IRQ_PREEMPT_HANDLER(); \
337 INLINE void __isr_##vect(void)
340 * With task priorities enabled each ISR is used a point to
341 * check if we need to perform a context switch.
343 * Instead, without priorities a context switch can occur only
344 * when the running task expires its time quantum. In this last
345 * case, the context switch can only occur in the timer ISR,
346 * that must be always declared with the
347 * DECLARE_ISR_CONTEXT_SWITCH() macro.
350 #define DECLARE_ISR(func) \
351 DECLARE_ISR_CONTEXT_SWITCH(func)
353 * Interrupt service routine prototype: can be used for
354 * forward declarations.
356 #define ISR_PROTO(func) \
357 ISR_PROTO_CONTEXT_SWITCH(func)
358 #endif /* !CONFIG_KERN_PRI */
362 #define ISR_PROTO(vect) ISR(vect)
365 #define DECLARE_ISR(vect) ISR(vect)
367 #ifndef DECLARE_ISR_CONTEXT_SWITCH
368 #define DECLARE_ISR_CONTEXT_SWITCH(vect) ISR(vect)
370 #ifndef ISR_PROTO_CONTEXT_SWITCH
371 #define ISR_PROTO_CONTEXT_SWITCH(func) ISR(vect)
375 #error No CPU_... defined.
379 /// Ensure callee is running within an interrupt
380 #define ASSERT_IRQ_CONTEXT() ASSERT(IRQ_RUNNING())
382 /// Ensure callee is not running within an interrupt
383 #define ASSERT_USER_CONTEXT() ASSERT(!IRQ_RUNNING())
385 #define ASSERT_USER_CONTEXT() do {} while(0)
386 #define ASSERT_IRQ_CONTEXT() do {} while(0)
390 /// Ensure interrupts are enabled
391 #define IRQ_ASSERT_ENABLED() ASSERT(IRQ_ENABLED())
393 /// Ensure interrupts are not enabled
394 #define IRQ_ASSERT_DISABLED() ASSERT(!IRQ_ENABLED())
396 #define IRQ_ASSERT_ENABLED() do {} while(0)
397 #define IRQ_ASSERT_DISABLED() do {} while(0)
401 #ifndef IRQ_PREEMPT_HANDLER
402 #if CONFIG_KERN_PREEMPT
404 * Handle preemptive context switch inside timer IRQ.
406 INLINE void IRQ_PREEMPT_HANDLER(void)
408 if (proc_needPreempt())
412 #define IRQ_PREEMPT_HANDLER() /* Nothing */
417 * Execute \a CODE atomically with respect to interrupts.
419 * \see IRQ_SAVE_DISABLE IRQ_RESTORE
421 #define ATOMIC(CODE) \
423 cpu_flags_t __flags; \
424 IRQ_SAVE_DISABLE(__flags); \
426 IRQ_RESTORE(__flags); \
429 #endif /* CPU_IRQ_H */