4 * This file is part of BeRTOS.
6 * Bertos is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 * As a special exception, you may use this file as part of a free software
21 * library without restriction. Specifically, if other files instantiate
22 * templates or use macros or inline functions from this file, or you compile
23 * this file and link it with other files to produce an executable, this
24 * file does not by itself cause the resulting executable to be covered by
25 * the GNU General Public License. This exception does not however
26 * invalidate any other reasons why the executable file might be covered by
27 * the GNU General Public License.
29 * Copyright 2004, 2005, 2006, 2007 Develer S.r.l. (http://www.develer.com/)
30 * Copyright 2004 Giovanni Bajo
34 * \brief CPU-specific IRQ definitions.
36 * \author Giovanni Bajo <rasky@develer.com>
37 * \author Bernie Innocenti <bernie@codewiz.org>
38 * \author Stefano Fedrigo <aleph@develer.com>
39 * \author Francesco Sacchi <batt@develer.com>
47 #include <kern/proc.h> /* proc_needPreempt() / proc_preempt() */
49 #include <cfg/compiler.h> /* for uintXX_t */
50 #include "cfg/cfg_proc.h" /* CONFIG_KERN_PREEMPT */
53 #define IRQ_DISABLE disable_interrupt()
54 #define IRQ_ENABLE enable_interrupt()
57 /* Get IRQ_* definitions from the hosting environment. */
60 #define IRQ_DISABLE FIXME
61 #define IRQ_ENABLE FIXME
62 #define IRQ_SAVE_DISABLE(x) FIXME
63 #define IRQ_RESTORE(x) FIXME
64 #endif /* OS_EMBEDDED */
69 #define IRQ_DISABLE asm volatile ("cpsid i" : : : "memory", "cc")
70 #define IRQ_ENABLE asm volatile ("cpsie i" : : : "memory", "cc")
72 #define IRQ_SAVE_DISABLE(x) \
77 : "=r" (x) : : "memory", "cc"); \
80 #define IRQ_RESTORE(x) \
88 #define CPU_READ_FLAGS() \
92 "mrs %0, PRIMASK\n\t" \
93 : "=r" (sreg) : : "memory", "cc"); \
97 #define IRQ_ENABLED() (!CPU_READ_FLAGS())
99 /* TODO: context switch is not yet supported */
100 #define DECLARE_ISR_CONTEXT_SWITCH(func) void func(void)
102 /* TODO: context switch is not yet supported */
103 #define ISR_PROTO_CONTEXT_SWITCH(func) void func(void)
106 #ifdef __IAR_SYSTEMS_ICC__
110 #if __CPU_MODE__ == 1 /* Thumb */
112 extern cpu_flags_t get_CPSR(void);
113 extern void set_CPSR(cpu_flags_t flags);
115 #define get_CPSR __get_CPSR
116 #define set_CPSR __set_CPSR
119 #define IRQ_DISABLE __disable_interrupt()
120 #define IRQ_ENABLE __enable_interrupt()
122 #define IRQ_SAVE_DISABLE(x) \
125 __disable_interrupt(); \
128 #define IRQ_RESTORE(x) \
133 #define IRQ_ENABLED() \
134 ((bool)(get_CPSR() & 0xb0))
136 #else /* !__IAR_SYSTEMS_ICC__ */
138 #define IRQ_DISABLE \
142 "orr r0, r0, #0xc0\n\t" \
152 "bic r0, r0, #0xc0\n\t" \
158 #define IRQ_SAVE_DISABLE(x) \
162 "orr r0, %0, #0xc0\n\t" \
170 #define IRQ_RESTORE(x) \
179 #define CPU_READ_FLAGS() \
190 #define IRQ_ENABLED() ((CPU_READ_FLAGS() & 0xc0) != 0xc0)
192 #if CONFIG_KERN_PREEMPT
193 EXTERN_C void asm_irq_switch_context(void);
196 * At the beginning of any ISR immediately ajust the
197 * return address and store all the caller-save
198 * registers (the ISR may change these registers that
199 * are shared with the user-context).
201 #define IRQ_ENTRY() asm volatile ( \
202 "sub lr, lr, #4\n\t" \
203 "stmfd sp!, {r0-r3, ip, lr}\n\t")
204 #define IRQ_EXIT() asm volatile ( \
205 "b asm_irq_switch_context\n\t")
207 * Function attribute to declare an interrupt service
210 * An ISR function must be declared as naked because we
211 * want to add our IRQ_ENTRY() prologue and IRQ_EXIT()
212 * epilogue code to handle the context switch and save
213 * all the registers (not only the callee-save).
216 #define ISR_FUNC __attribute__((naked))
219 * The compiler cannot establish which
220 * registers actually need to be saved, because
221 * the interrupt can happen at any time, so the
222 * "normal" prologue and epilogue used for a
223 * generic function call are not suitable for
226 * Using a naked function has the drawback that
227 * the stack is not automatically adjusted at
228 * this point, like a "normal" function call.
230 * So, an ISR can _only_ contain other function
231 * calls and they can't use the stack in any
234 * NOTE: we need to explicitly disable IRQs after
235 * IRQ_ENTRY(), because the IRQ status flag is not
236 * masked by the hardware and an IRQ ack inside the ISR
237 * may cause the triggering of another IRQ before
238 * exiting from the current ISR.
240 * The respective IRQ_ENABLE is not necessary, because
241 * IRQs will be automatically re-enabled when restoring
242 * the context of the user task.
244 #define DECLARE_ISR_CONTEXT_SWITCH(func) \
245 void ISR_FUNC func(void); \
246 static void __isr_##func(void); \
247 void ISR_FUNC func(void) \
254 static void __isr_##func(void)
256 * Interrupt service routine prototype: can be used for
257 * forward declarations.
259 #define ISR_PROTO_CONTEXT_SWITCH(func) \
260 void ISR_FUNC func(void)
262 * With task priorities enabled each ISR is used a point to
263 * check if we need to perform a context switch.
265 * Instead, without priorities a context switch can occur only
266 * when the running task expires its time quantum. In this last
267 * case, the context switch can only occur in the timer
268 * ISR, that must be always declared with the
269 * DECLARE_ISR_CONTEXT_SWITCH() macro.
272 #define DECLARE_ISR(func) \
273 DECLARE_ISR_CONTEXT_SWITCH(func)
275 #define ISR_PROTO(func) \
276 ISR_PROTO_CONTEXT_SWITCH(func)
277 #endif /* !CONFIG_KERN_PRI */
278 #endif /* CONFIG_KERN_PREEMPT */
281 #define DECLARE_ISR(func) \
282 void __attribute__((interrupt)) func(void)
284 #ifndef DECLARE_ISR_CONTEXT_SWITCH
285 #define DECLARE_ISR_CONTEXT_SWITCH(func) \
286 void __attribute__((interrupt)) func(void)
289 #define ISR_PROTO(func) \
290 void __attribute__((interrupt)) func(void)
292 #ifndef ISR_PROTO_CONTEXT_SWITCH
293 #define ISR_PROTO_CONTEXT_SWITCH(func) \
294 void __attribute__((interrupt)) func(void)
297 #endif /* !__IAR_SYSTEMS_ICC_ */
301 /* Get IRQ_* definitions from the hosting environment. */
304 #define IRQ_DISABLE FIXME
305 #define IRQ_ENABLE FIXME
306 #define IRQ_SAVE_DISABLE(x) FIXME
307 #define IRQ_RESTORE(x) FIXME
308 #define IRQ_ENABLED() FIXME
309 #endif /* OS_EMBEDDED */
313 #define IRQ_DISABLE do { asm(bfset #0x0200,SR); asm(nop); } while (0)
314 #define IRQ_ENABLE do { asm(bfclr #0x0200,SR); asm(nop); } while (0)
316 #define IRQ_SAVE_DISABLE(x) \
317 do { (void)x; asm(move SR,x); asm(bfset #0x0200,SR); } while (0)
318 #define IRQ_RESTORE(x) \
319 do { (void)x; asm(move x,SR); } while (0)
321 static inline bool irq_running(void)
323 extern void *user_sp;
326 #define IRQ_RUNNING() irq_running()
328 static inline bool irq_enabled(void)
332 return !(x & 0x0200);
334 #define IRQ_ENABLED() irq_enabled()
338 #define IRQ_DISABLE asm volatile ("cli" ::)
339 #define IRQ_ENABLE asm volatile ("sei" ::)
341 #define IRQ_SAVE_DISABLE(x) \
343 __asm__ __volatile__( \
344 "in %0,__SREG__\n\t" \
346 : "=r" (x) : /* no inputs */ : "cc" \
350 #define IRQ_RESTORE(x) \
352 __asm__ __volatile__( \
353 "out __SREG__,%0" : /* no outputs */ : "r" (x) : "cc" \
357 #define IRQ_ENABLED() \
360 __asm__ __volatile__( \
361 "in %0,__SREG__\n\t" \
362 : "=r" (sreg) /* no inputs & no clobbers */ \
364 (bool)(sreg & 0x80); \
366 #if CONFIG_KERN_PREEMPT
367 #define DECLARE_ISR_CONTEXT_SWITCH(vect) \
368 INLINE void __isr_##vect(void); \
372 IRQ_PREEMPT_HANDLER(); \
374 INLINE void __isr_##vect(void)
377 * With task priorities enabled each ISR is used a point to
378 * check if we need to perform a context switch.
380 * Instead, without priorities a context switch can occur only
381 * when the running task expires its time quantum. In this last
382 * case, the context switch can only occur in the timer ISR,
383 * that must be always declared with the
384 * DECLARE_ISR_CONTEXT_SWITCH() macro.
387 #define DECLARE_ISR(func) \
388 DECLARE_ISR_CONTEXT_SWITCH(func)
390 * Interrupt service routine prototype: can be used for
391 * forward declarations.
393 #define ISR_PROTO(func) \
394 ISR_PROTO_CONTEXT_SWITCH(func)
395 #endif /* !CONFIG_KERN_PRI */
399 #define ISR_PROTO(vect) ISR(vect)
402 #define DECLARE_ISR(vect) ISR(vect)
404 #ifndef DECLARE_ISR_CONTEXT_SWITCH
405 #define DECLARE_ISR_CONTEXT_SWITCH(vect) ISR(vect)
407 #ifndef ISR_PROTO_CONTEXT_SWITCH
408 #define ISR_PROTO_CONTEXT_SWITCH(func) ISR(vect)
412 #error No CPU_... defined.
416 /// Ensure callee is running within an interrupt
417 #define ASSERT_IRQ_CONTEXT() ASSERT(IRQ_RUNNING())
419 /// Ensure callee is not running within an interrupt
420 #define ASSERT_USER_CONTEXT() ASSERT(!IRQ_RUNNING())
422 #define ASSERT_USER_CONTEXT() do {} while(0)
423 #define ASSERT_IRQ_CONTEXT() do {} while(0)
427 /// Ensure interrupts are enabled
428 #define IRQ_ASSERT_ENABLED() ASSERT(IRQ_ENABLED())
430 /// Ensure interrupts are not enabled
431 #define IRQ_ASSERT_DISABLED() ASSERT(!IRQ_ENABLED())
433 #define IRQ_ASSERT_ENABLED() do {} while(0)
434 #define IRQ_ASSERT_DISABLED() do {} while(0)
438 #ifndef IRQ_PREEMPT_HANDLER
439 #if CONFIG_KERN_PREEMPT
441 * Handle preemptive context switch inside timer IRQ.
443 INLINE void IRQ_PREEMPT_HANDLER(void)
445 if (proc_needPreempt())
449 #define IRQ_PREEMPT_HANDLER() /* Nothing */
454 * Execute \a CODE atomically with respect to interrupts.
456 * \see IRQ_SAVE_DISABLE IRQ_RESTORE
458 #define ATOMIC(CODE) \
460 cpu_flags_t __flags; \
461 IRQ_SAVE_DISABLE(__flags); \
463 IRQ_RESTORE(__flags); \
466 #endif /* CPU_IRQ_H */