bertos/cpu/irq.h

   1 /**
   2  * \file
   3  * <!--
   4  * This file is part of BeRTOS.
   5  *
   6  * Bertos is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  19  *
  20  * As a special exception, you may use this file as part of a free software
  21  * library without restriction.  Specifically, if other files instantiate
  22  * templates or use macros or inline functions from this file, or you compile
  23  * this file and link it with other files to produce an executable, this
  24  * file does not by itself cause the resulting executable to be covered by
  25  * the GNU General Public License.  This exception does not however
  26  * invalidate any other reasons why the executable file might be covered by
  27  * the GNU General Public License.
  28  *
  29  * Copyright 2004, 2005, 2006, 2007 Develer S.r.l. (http://www.develer.com/)
  30  * Copyright 2004 Giovanni Bajo
  31  *
  32  * -->
  33  *
  34  * \brief CPU-specific IRQ definitions.
  35  *
  36  * \author Giovanni Bajo <rasky@develer.com>
  37  * \author Bernie Innocenti <bernie@codewiz.org>
  38  * \author Stefano Fedrigo <aleph@develer.com>
  39  * \author Francesco Sacchi <batt@develer.com>
  40  */
  41 #ifndef CPU_IRQ_H
  42 #define CPU_IRQ_H
  43
  44 #include "detect.h"
  45 #include "types.h"
  46
  47 #include <kern/proc.h> /* proc_needPreempt() / proc_preempt() */
  48
  49 #include <cfg/compiler.h> /* for uintXX_t */
  50 #include "cfg/cfg_proc.h" /* CONFIG_KERN_PREEMPT */
  51
  52 #if CPU_I196
  53         #define IRQ_DISABLE             disable_interrupt()
  54         #define IRQ_ENABLE              enable_interrupt()
  55 #elif CPU_X86
  56
  57         /* Get IRQ_* definitions from the hosting environment. */
  58         #include <cfg/os.h>
  59         #if OS_EMBEDDED
  60                 #define IRQ_DISABLE             FIXME
  61                 #define IRQ_ENABLE              FIXME
  62                 #define IRQ_SAVE_DISABLE(x)     FIXME
  63                 #define IRQ_RESTORE(x)          FIXME
  64         #endif /* OS_EMBEDDED */
  65
  66 #elif CPU_CM3
  67         /* Cortex-M3 */
  68
  69         #define IRQ_DISABLE asm volatile ("cpsid i" : : : "memory", "cc")
  70         #define IRQ_ENABLE asm volatile ("cpsie i" : : : "memory", "cc")
  71
  72         #define IRQ_SAVE_DISABLE(x)                                     \
  73         ({                                                              \
  74                 asm volatile (                                          \
  75                         "mrs %0, PRIMASK\n"                             \
  76                         "cpsid i"                                       \
  77                         : "=r" (x) : : "memory", "cc");                 \
  78         })
  79
  80         #define IRQ_RESTORE(x)                                          \
  81         ({                                                              \
  82                 if (x)                                                  \
  83                         IRQ_DISABLE;                                    \
  84                 else                                                    \
  85                         IRQ_ENABLE;                                     \
  86         })
  87
  88         #define CPU_READ_FLAGS()                                        \
  89         ({                                                              \
  90                 cpu_flags_t sreg;                                       \
  91                 asm volatile (                                          \
  92                         "mrs %0, PRIMASK\n\t"                           \
  93                         : "=r" (sreg) : : "memory", "cc");              \
  94                 sreg;                                                   \
  95         })
  96
  97         #define IRQ_ENABLED() (!CPU_READ_FLAGS())
  98
  99         /* TODO: context switch is not yet supported */
 100         #define DECLARE_ISR_CONTEXT_SWITCH(func) void func(void)
 101
 102         /* TODO: context switch is not yet supported */
 103         #define ISR_PROTO_CONTEXT_SWITCH(func) void func(void)
 104 #elif CPU_ARM
 105
 106         #ifdef __IAR_SYSTEMS_ICC__
 107
 108                 #include <inarm.h>
 109
 110                 #if __CPU_MODE__ == 1 /* Thumb */
 111                         /* Use stubs */
 112                         extern cpu_flags_t get_CPSR(void);
 113                         extern void set_CPSR(cpu_flags_t flags);
 114                 #else
 115                         #define get_CPSR __get_CPSR
 116                         #define set_CPSR __set_CPSR
 117                 #endif
 118
 119                 #define IRQ_DISABLE __disable_interrupt()
 120                 #define IRQ_ENABLE  __enable_interrupt()
 121
 122                 #define IRQ_SAVE_DISABLE(x) \
 123                 do { \
 124                         (x) = get_CPSR(); \
 125                         __disable_interrupt(); \
 126                 } while (0)
 127
 128                 #define IRQ_RESTORE(x) \
 129                 do { \
 130                         set_CPSR(x); \
 131                 } while (0)
 132
 133                 #define IRQ_ENABLED() \
 134                         ((bool)(get_CPSR() & 0xb0))
 135
 136         #else /* !__IAR_SYSTEMS_ICC__ */
 137
 138                 #define IRQ_DISABLE \
 139                 do { \
 140                         asm volatile ( \
 141                                 "mrs r0, cpsr\n\t" \
 142                                 "orr r0, r0, #0xc0\n\t" \
 143                                 "msr cpsr_c, r0" \
 144                                 ::: "r0" \
 145                         ); \
 146                 } while (0)
 147
 148                 #define IRQ_ENABLE \
 149                 do { \
 150                         asm volatile ( \
 151                                 "mrs r0, cpsr\n\t" \
 152                                 "bic r0, r0, #0xc0\n\t" \
 153                                 "msr cpsr_c, r0" \
 154                                 ::: "r0" \
 155                         ); \
 156                 } while (0)
 157
 158                 #define IRQ_SAVE_DISABLE(x) \
 159                 do { \
 160                         asm volatile ( \
 161                                 "mrs %0, cpsr\n\t" \
 162                                 "orr r0, %0, #0xc0\n\t" \
 163                                 "msr cpsr_c, r0" \
 164                                 : "=r" (x) \
 165                                 : /* no inputs */ \
 166                                 : "r0" \
 167                         ); \
 168                 } while (0)
 169
 170                 #define IRQ_RESTORE(x) \
 171                 do { \
 172                         asm volatile ( \
 173                                 "msr cpsr_c, %0" \
 174                                 : /* no outputs */ \
 175                                 : "r" (x) \
 176                         ); \
 177                 } while (0)
 178
 179                 #define CPU_READ_FLAGS() \
 180                 ({ \
 181                         cpu_flags_t sreg; \
 182                         asm volatile ( \
 183                                 "mrs %0, cpsr\n\t" \
 184                                 : "=r" (sreg) \
 185                                 : /* no inputs */ \
 186                         ); \
 187                         sreg; \
 188                 })
 189
 190                 #define IRQ_ENABLED() ((CPU_READ_FLAGS() & 0xc0) != 0xc0)
 191
 192                 #if CONFIG_KERN_PREEMPT
 193                         EXTERN_C void asm_irq_switch_context(void);
 194
 195                         /**
 196                          * At the beginning of any ISR immediately ajust the
 197                          * return address and store all the caller-save
 198                          * registers (the ISR may change these registers that
 199                          * are shared with the user-context).
 200                          */
 201                         #define IRQ_ENTRY() asm volatile ( \
 202                                                 "sub    lr, lr, #4\n\t" \
 203                                                 "stmfd  sp!, {r0-r3, ip, lr}\n\t")
 204                         #define IRQ_EXIT()  asm volatile ( \
 205                                                 "b      asm_irq_switch_context\n\t")
 206                         /**
 207                          * Function attribute to declare an interrupt service
 208                          * routine.
 209                          *
 210                          * An ISR function must be declared as naked because we
 211                          * want to add our IRQ_ENTRY() prologue and IRQ_EXIT()
 212                          * epilogue code to handle the context switch and save
 213                          * all the registers (not only the callee-save).
 214                          *
 215                          */
 216                         #define ISR_FUNC __attribute__((naked))
 217
 218                         /**
 219                          * The compiler cannot establish which
 220                          * registers actually need to be saved, because
 221                          * the interrupt can happen at any time, so the
 222                          * "normal" prologue and epilogue used for a
 223                          * generic function call are not suitable for
 224                          * the ISR.
 225                          *
 226                          * Using a naked function has the drawback that
 227                          * the stack is not automatically adjusted at
 228                          * this point, like a "normal" function call.
 229                          *
 230                          * So, an ISR can _only_ contain other function
 231                          * calls and they can't use the stack in any
 232                          * other way.
 233                          *
 234                          * NOTE: we need to explicitly disable IRQs after
 235                          * IRQ_ENTRY(), because the IRQ status flag is not
 236                          * masked by the hardware and an IRQ ack inside the ISR
 237                          * may cause the triggering of another IRQ before
 238                          * exiting from the current ISR.
 239                          *
 240                          * The respective IRQ_ENABLE is not necessary, because
 241                          * IRQs will be automatically re-enabled when restoring
 242                          * the context of the user task.
 243                          */
 244                         #define DECLARE_ISR_CONTEXT_SWITCH(func)        \
 245                                 void ISR_FUNC func(void);               \
 246                                 static void __isr_##func(void);         \
 247                                 void ISR_FUNC func(void)                \
 248                                 {                                       \
 249                                         IRQ_ENTRY();                    \
 250                                         IRQ_DISABLE;                    \
 251                                         __isr_##func();                 \
 252                                         IRQ_EXIT();                     \
 253                                 }                                       \
 254                                 static void __isr_##func(void)
 255                         /**
 256                          * Interrupt service routine prototype: can be used for
 257                          * forward declarations.
 258                          */
 259                         #define ISR_PROTO_CONTEXT_SWITCH(func)  \
 260                                 void ISR_FUNC func(void)
 261                         /**
 262                          * With task priorities enabled each ISR is used a point to
 263                          * check if we need to perform a context switch.
 264                          *
 265                          * Instead, without priorities a context switch can occur only
 266                          * when the running task expires its time quantum. In this last
 267                          * case, the context switch can only occur in the timer
 268                          * ISR, that must be always declared with the
 269                          * DECLARE_ISR_CONTEXT_SWITCH() macro.
 270                          */
 271                         #if CONFIG_KERN_PRI
 272                                 #define DECLARE_ISR(func) \
 273                                         DECLARE_ISR_CONTEXT_SWITCH(func)
 274
 275                                 #define ISR_PROTO(func) \
 276                                         ISR_PROTO_CONTEXT_SWITCH(func)
 277                         #endif /* !CONFIG_KERN_PRI */
 278                 #endif /* CONFIG_KERN_PREEMPT */
 279
 280                 #ifndef DECLARE_ISR
 281                         #define DECLARE_ISR(func) \
 282                                 void __attribute__((interrupt)) func(void)
 283                 #endif
 284                 #ifndef DECLARE_ISR_CONTEXT_SWITCH
 285                         #define DECLARE_ISR_CONTEXT_SWITCH(func) \
 286                                 void __attribute__((interrupt)) func(void)
 287                 #endif
 288                 #ifndef ISR_PROTO
 289                         #define ISR_PROTO(func) \
 290                                 void __attribute__((interrupt)) func(void)
 291                 #endif
 292                 #ifndef ISR_PROTO_CONTEXT_SWITCH
 293                         #define ISR_PROTO_CONTEXT_SWITCH(func)  \
 294                                 void __attribute__((interrupt)) func(void)
 295                 #endif
 296
 297         #endif /* !__IAR_SYSTEMS_ICC_ */
 298
 299 #elif CPU_PPC
 300
 301         /* Get IRQ_* definitions from the hosting environment. */
 302         #include <cfg/os.h>
 303         #if OS_EMBEDDED
 304                 #define IRQ_DISABLE         FIXME
 305                 #define IRQ_ENABLE          FIXME
 306                 #define IRQ_SAVE_DISABLE(x) FIXME
 307                 #define IRQ_RESTORE(x)      FIXME
 308                 #define IRQ_ENABLED()       FIXME
 309         #endif /* OS_EMBEDDED */
 310
 311 #elif CPU_DSP56K
 312
 313         #define IRQ_DISABLE             do { asm(bfset #0x0200,SR); asm(nop); } while (0)
 314         #define IRQ_ENABLE              do { asm(bfclr #0x0200,SR); asm(nop); } while (0)
 315
 316         #define IRQ_SAVE_DISABLE(x)  \
 317                 do { (void)x; asm(move SR,x); asm(bfset #0x0200,SR); } while (0)
 318         #define IRQ_RESTORE(x)  \
 319                 do { (void)x; asm(move x,SR); } while (0)
 320
 321         static inline bool irq_running(void)
 322         {
 323                 extern void *user_sp;
 324                 return !!user_sp;
 325         }
 326         #define IRQ_RUNNING() irq_running()
 327
 328         static inline bool irq_enabled(void)
 329         {
 330                 uint16_t x;
 331                 asm(move SR,x);
 332                 return !(x & 0x0200);
 333         }
 334         #define IRQ_ENABLED() irq_enabled()
 335
 336 #elif CPU_AVR
 337
 338         #define IRQ_DISABLE   asm volatile ("cli" ::)
 339         #define IRQ_ENABLE    asm volatile ("sei" ::)
 340
 341         #define IRQ_SAVE_DISABLE(x) \
 342         do { \
 343                 __asm__ __volatile__( \
 344                         "in %0,__SREG__\n\t" \
 345                         "cli" \
 346                         : "=r" (x) : /* no inputs */ : "cc" \
 347                 ); \
 348         } while (0)
 349
 350         #define IRQ_RESTORE(x) \
 351         do { \
 352                 __asm__ __volatile__( \
 353                         "out __SREG__,%0" : /* no outputs */ : "r" (x) : "cc" \
 354                 ); \
 355         } while (0)
 356
 357         #define IRQ_ENABLED() \
 358         ({ \
 359                 uint8_t sreg; \
 360                 __asm__ __volatile__( \
 361                         "in %0,__SREG__\n\t" \
 362                         : "=r" (sreg)  /* no inputs & no clobbers */ \
 363                 ); \
 364                 (bool)(sreg & 0x80); \
 365         })
 366         #if CONFIG_KERN_PREEMPT
 367                 #define DECLARE_ISR_CONTEXT_SWITCH(vect)                \
 368                         INLINE void __isr_##vect(void);                 \
 369                         ISR(vect)                                       \
 370                         {                                               \
 371                                 __isr_##vect();                         \
 372                                 IRQ_PREEMPT_HANDLER();                  \
 373                         }                                               \
 374                         INLINE void __isr_##vect(void)
 375
 376                 /**
 377                  * With task priorities enabled each ISR is used a point to
 378                  * check if we need to perform a context switch.
 379                  *
 380                  * Instead, without priorities a context switch can occur only
 381                  * when the running task expires its time quantum. In this last
 382                  * case, the context switch can only occur in the timer ISR,
 383                  * that must be always declared with the
 384                  * DECLARE_ISR_CONTEXT_SWITCH() macro.
 385                  */
 386                 #if CONFIG_KERN_PRI
 387                         #define DECLARE_ISR(func) \
 388                                 DECLARE_ISR_CONTEXT_SWITCH(func)
 389                         /**
 390                          * Interrupt service routine prototype: can be used for
 391                          * forward declarations.
 392                          */
 393                         #define ISR_PROTO(func) \
 394                                 ISR_PROTO_CONTEXT_SWITCH(func)
 395                 #endif /* !CONFIG_KERN_PRI */
 396         #endif
 397
 398         #ifndef ISR_PROTO
 399                 #define ISR_PROTO(vect) ISR(vect)
 400         #endif
 401         #ifndef DECLARE_ISR
 402                 #define DECLARE_ISR(vect) ISR(vect)
 403         #endif
 404         #ifndef DECLARE_ISR_CONTEXT_SWITCH
 405                 #define DECLARE_ISR_CONTEXT_SWITCH(vect) ISR(vect)
 406         #endif
 407         #ifndef ISR_PROTO_CONTEXT_SWITCH
 408                 #define ISR_PROTO_CONTEXT_SWITCH(func) ISR(vect)
 409         #endif
 410
 411 #else
 412         #error No CPU_... defined.
 413 #endif
 414
 415 #ifdef IRQ_RUNNING
 416         /// Ensure callee is running within an interrupt
 417         #define ASSERT_IRQ_CONTEXT()  ASSERT(IRQ_RUNNING())
 418
 419         /// Ensure callee is not running within an interrupt
 420         #define ASSERT_USER_CONTEXT() ASSERT(!IRQ_RUNNING())
 421 #else
 422         #define ASSERT_USER_CONTEXT()  do {} while(0)
 423         #define ASSERT_IRQ_CONTEXT()   do {} while(0)
 424 #endif
 425
 426 #ifdef IRQ_ENABLED
 427         /// Ensure interrupts are enabled
 428         #define IRQ_ASSERT_ENABLED()  ASSERT(IRQ_ENABLED())
 429
 430         /// Ensure interrupts are not enabled
 431         #define IRQ_ASSERT_DISABLED() ASSERT(!IRQ_ENABLED())
 432 #else
 433         #define IRQ_ASSERT_ENABLED() do {} while(0)
 434         #define IRQ_ASSERT_DISABLED() do {} while(0)
 435 #endif
 436
 437
 438 #ifndef IRQ_PREEMPT_HANDLER
 439         #if CONFIG_KERN_PREEMPT
 440                 /**
 441                  * Handle preemptive context switch inside timer IRQ.
 442                  */
 443                 INLINE void IRQ_PREEMPT_HANDLER(void)
 444                 {
 445                         if (proc_needPreempt())
 446                                 proc_preempt();
 447                 }
 448         #else
 449                 #define IRQ_PREEMPT_HANDLER() /* Nothing */
 450         #endif
 451 #endif
 452
 453 /**
 454  * Execute \a CODE atomically with respect to interrupts.
 455  *
 456  * \see IRQ_SAVE_DISABLE IRQ_RESTORE
 457  */
 458 #define ATOMIC(CODE) \
 459         do { \
 460                 cpu_flags_t __flags; \
 461                 IRQ_SAVE_DISABLE(__flags); \
 462                 CODE; \
 463                 IRQ_RESTORE(__flags); \
 464         } while (0)
 465
 466 #endif /* CPU_IRQ_H */