bertos/cpu/irq.h

   1 /**
   2  * \file
   3  * <!--
   4  * This file is part of BeRTOS.
   5  *
   6  * Bertos is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  19  *
  20  * As a special exception, you may use this file as part of a free software
  21  * library without restriction.  Specifically, if other files instantiate
  22  * templates or use macros or inline functions from this file, or you compile
  23  * this file and link it with other files to produce an executable, this
  24  * file does not by itself cause the resulting executable to be covered by
  25  * the GNU General Public License.  This exception does not however
  26  * invalidate any other reasons why the executable file might be covered by
  27  * the GNU General Public License.
  28  *
  29  * Copyright 2004, 2005, 2006, 2007 Develer S.r.l. (http://www.develer.com/)
  30  * Copyright 2004 Giovanni Bajo
  31  *
  32  * -->
  33  *
  34  * \brief CPU-specific IRQ definitions.
  35  *
  36  * \author Giovanni Bajo <rasky@develer.com>
  37  * \author Bernie Innocenti <bernie@codewiz.org>
  38  * \author Stefano Fedrigo <aleph@develer.com>
  39  * \author Francesco Sacchi <batt@develer.com>
  40  */
  41 #ifndef CPU_IRQ_H
  42 #define CPU_IRQ_H
  43
  44 #include "detect.h"
  45 #include "types.h"
  46
  47 #include <kern/proc.h> /* proc_needPreempt() / proc_preempt() */
  48
  49 #include <cfg/compiler.h> /* for uintXX_t */
  50 #include "cfg/cfg_proc.h" /* CONFIG_KERN_PREEMPT */
  51
  52 #if CPU_I196
  53         #define IRQ_DISABLE             disable_interrupt()
  54         #define IRQ_ENABLE              enable_interrupt()
  55 #elif CPU_X86
  56
  57         /* Get IRQ_* definitions from the hosting environment. */
  58         #include <cfg/os.h>
  59         #if OS_EMBEDDED
  60                 #define IRQ_DISABLE             FIXME
  61                 #define IRQ_ENABLE              FIXME
  62                 #define IRQ_SAVE_DISABLE(x)     FIXME
  63                 #define IRQ_RESTORE(x)          FIXME
  64         #endif /* OS_EMBEDDED */
  65
  66 #elif CPU_ARM_LM3S1968
  67
  68         #define IRQ_DISABLE asm volatile ("cpsid i" : : : "memory", "cc")
  69         #define IRQ_ENABLE asm volatile ("cpsie i" : : : "memory", "cc")
  70
  71         #define IRQ_SAVE_DISABLE(x)                                     \
  72         ({                                                              \
  73                 asm volatile (                                          \
  74                         "mrs %0, PRIMASK\n"                             \
  75                         "cpsid i"                                       \
  76                         : "=r" (x) : : "memory", "cc");                 \
  77         })
  78
  79         #define IRQ_RESTORE(x)                                          \
  80         ({                                                              \
  81                 if (x)                                                  \
  82                         IRQ_DISABLE;                                    \
  83                 else                                                    \
  84                         IRQ_ENABLE;                                     \
  85         })
  86
  87         #define CPU_READ_FLAGS()                                        \
  88         ({                                                              \
  89                 cpu_flags_t sreg;                                       \
  90                 asm volatile (                                          \
  91                         "mrs %0, PRIMASK\n\t"                           \
  92                         : "=r" (sreg) : : "memory", "cc");              \
  93                 sreg;                                                   \
  94         })
  95
  96         #define IRQ_ENABLED() (!CPU_READ_FLAGS())
  97
  98         /* TODO: context switch is not yet supported */
  99         #define DECLARE_ISR_CONTEXT_SWITCH(func) void func(void)
 100
 101         /* TODO: context switch is not yet supported */
 102         #define ISR_PROTO_CONTEXT_SWITCH(func) void func(void)
 103 #elif CPU_ARM
 104
 105         #ifdef __IAR_SYSTEMS_ICC__
 106
 107                 #include <inarm.h>
 108
 109                 #if __CPU_MODE__ == 1 /* Thumb */
 110                         /* Use stubs */
 111                         extern cpu_flags_t get_CPSR(void);
 112                         extern void set_CPSR(cpu_flags_t flags);
 113                 #else
 114                         #define get_CPSR __get_CPSR
 115                         #define set_CPSR __set_CPSR
 116                 #endif
 117
 118                 #define IRQ_DISABLE __disable_interrupt()
 119                 #define IRQ_ENABLE  __enable_interrupt()
 120
 121                 #define IRQ_SAVE_DISABLE(x) \
 122                 do { \
 123                         (x) = get_CPSR(); \
 124                         __disable_interrupt(); \
 125                 } while (0)
 126
 127                 #define IRQ_RESTORE(x) \
 128                 do { \
 129                         set_CPSR(x); \
 130                 } while (0)
 131
 132                 #define IRQ_ENABLED() \
 133                         ((bool)(get_CPSR() & 0xb0))
 134
 135         #else /* !__IAR_SYSTEMS_ICC__ */
 136
 137                 #define IRQ_DISABLE \
 138                 do { \
 139                         asm volatile ( \
 140                                 "mrs r0, cpsr\n\t" \
 141                                 "orr r0, r0, #0xc0\n\t" \
 142                                 "msr cpsr_c, r0" \
 143                                 ::: "r0" \
 144                         ); \
 145                 } while (0)
 146
 147                 #define IRQ_ENABLE \
 148                 do { \
 149                         asm volatile ( \
 150                                 "mrs r0, cpsr\n\t" \
 151                                 "bic r0, r0, #0xc0\n\t" \
 152                                 "msr cpsr_c, r0" \
 153                                 ::: "r0" \
 154                         ); \
 155                 } while (0)
 156
 157                 #define IRQ_SAVE_DISABLE(x) \
 158                 do { \
 159                         asm volatile ( \
 160                                 "mrs %0, cpsr\n\t" \
 161                                 "orr r0, %0, #0xc0\n\t" \
 162                                 "msr cpsr_c, r0" \
 163                                 : "=r" (x) \
 164                                 : /* no inputs */ \
 165                                 : "r0" \
 166                         ); \
 167                 } while (0)
 168
 169                 #define IRQ_RESTORE(x) \
 170                 do { \
 171                         asm volatile ( \
 172                                 "msr cpsr_c, %0" \
 173                                 : /* no outputs */ \
 174                                 : "r" (x) \
 175                         ); \
 176                 } while (0)
 177
 178                 #define CPU_READ_FLAGS() \
 179                 ({ \
 180                         cpu_flags_t sreg; \
 181                         asm volatile ( \
 182                                 "mrs %0, cpsr\n\t" \
 183                                 : "=r" (sreg) \
 184                                 : /* no inputs */ \
 185                         ); \
 186                         sreg; \
 187                 })
 188
 189                 #define IRQ_ENABLED() ((CPU_READ_FLAGS() & 0xc0) != 0xc0)
 190
 191                 #if CONFIG_KERN_PREEMPT
 192                         EXTERN_C void asm_irq_switch_context(void);
 193
 194                         /**
 195                          * At the beginning of any ISR immediately ajust the
 196                          * return address and store all the caller-save
 197                          * registers (the ISR may change these registers that
 198                          * are shared with the user-context).
 199                          */
 200                         #define IRQ_ENTRY() asm volatile ( \
 201                                                 "sub    lr, lr, #4\n\t" \
 202                                                 "stmfd  sp!, {r0-r3, ip, lr}\n\t")
 203                         #define IRQ_EXIT()  asm volatile ( \
 204                                                 "b      asm_irq_switch_context\n\t")
 205                         /**
 206                          * Function attribute to declare an interrupt service
 207                          * routine.
 208                          *
 209                          * An ISR function must be declared as naked because we
 210                          * want to add our IRQ_ENTRY() prologue and IRQ_EXIT()
 211                          * epilogue code to handle the context switch and save
 212                          * all the registers (not only the callee-save).
 213                          *
 214                          */
 215                         #define ISR_FUNC __attribute__((naked))
 216
 217                         /**
 218                          * The compiler cannot establish which
 219                          * registers actually need to be saved, because
 220                          * the interrupt can happen at any time, so the
 221                          * "normal" prologue and epilogue used for a
 222                          * generic function call are not suitable for
 223                          * the ISR.
 224                          *
 225                          * Using a naked function has the drawback that
 226                          * the stack is not automatically adjusted at
 227                          * this point, like a "normal" function call.
 228                          *
 229                          * So, an ISR can _only_ contain other function
 230                          * calls and they can't use the stack in any
 231                          * other way.
 232                          *
 233                          * NOTE: we need to explicitly disable IRQs after
 234                          * IRQ_ENTRY(), because the IRQ status flag is not
 235                          * masked by the hardware and an IRQ ack inside the ISR
 236                          * may cause the triggering of another IRQ before
 237                          * exiting from the current ISR.
 238                          *
 239                          * The respective IRQ_ENABLE is not necessary, because
 240                          * IRQs will be automatically re-enabled when restoring
 241                          * the context of the user task.
 242                          */
 243                         #define DECLARE_ISR_CONTEXT_SWITCH(func)        \
 244                                 void ISR_FUNC func(void);               \
 245                                 static void __isr_##func(void);         \
 246                                 void ISR_FUNC func(void)                \
 247                                 {                                       \
 248                                         IRQ_ENTRY();                    \
 249                                         IRQ_DISABLE;                    \
 250                                         __isr_##func();                 \
 251                                         IRQ_EXIT();                     \
 252                                 }                                       \
 253                                 static void __isr_##func(void)
 254                         /**
 255                          * Interrupt service routine prototype: can be used for
 256                          * forward declarations.
 257                          */
 258                         #define ISR_PROTO_CONTEXT_SWITCH(func)  \
 259                                 void ISR_FUNC func(void)
 260                         /**
 261                          * With task priorities enabled each ISR is used a point to
 262                          * check if we need to perform a context switch.
 263                          *
 264                          * Instead, without priorities a context switch can occur only
 265                          * when the running task expires its time quantum. In this last
 266                          * case, the context switch can only occur in the timer
 267                          * ISR, that must be always declared with the
 268                          * DECLARE_ISR_CONTEXT_SWITCH() macro.
 269                          */
 270                         #if CONFIG_KERN_PRI
 271                                 #define DECLARE_ISR(func) \
 272                                         DECLARE_ISR_CONTEXT_SWITCH(func)
 273
 274                                 #define ISR_PROTO(func) \
 275                                         ISR_PROTO_CONTEXT_SWITCH(func)
 276                         #endif /* !CONFIG_KERN_PRI */
 277                 #endif /* CONFIG_KERN_PREEMPT */
 278
 279                 #ifndef DECLARE_ISR
 280                         #define DECLARE_ISR(func) \
 281                                 void __attribute__((interrupt)) func(void)
 282                 #endif
 283                 #ifndef DECLARE_ISR_CONTEXT_SWITCH
 284                         #define DECLARE_ISR_CONTEXT_SWITCH(func) \
 285                                 void __attribute__((interrupt)) func(void)
 286                 #endif
 287                 #ifndef ISR_PROTO
 288                         #define ISR_PROTO(func) \
 289                                 void __attribute__((interrupt)) func(void)
 290                 #endif
 291                 #ifndef ISR_PROTO_CONTEXT_SWITCH
 292                         #define ISR_PROTO_CONTEXT_SWITCH(func)  \
 293                                 void __attribute__((interrupt)) func(void)
 294                 #endif
 295
 296         #endif /* !__IAR_SYSTEMS_ICC_ */
 297
 298 #elif CPU_PPC
 299
 300         /* Get IRQ_* definitions from the hosting environment. */
 301         #include <cfg/os.h>
 302         #if OS_EMBEDDED
 303                 #define IRQ_DISABLE         FIXME
 304                 #define IRQ_ENABLE          FIXME
 305                 #define IRQ_SAVE_DISABLE(x) FIXME
 306                 #define IRQ_RESTORE(x)      FIXME
 307                 #define IRQ_ENABLED()       FIXME
 308         #endif /* OS_EMBEDDED */
 309
 310 #elif CPU_DSP56K
 311
 312         #define IRQ_DISABLE             do { asm(bfset #0x0200,SR); asm(nop); } while (0)
 313         #define IRQ_ENABLE              do { asm(bfclr #0x0200,SR); asm(nop); } while (0)
 314
 315         #define IRQ_SAVE_DISABLE(x)  \
 316                 do { (void)x; asm(move SR,x); asm(bfset #0x0200,SR); } while (0)
 317         #define IRQ_RESTORE(x)  \
 318                 do { (void)x; asm(move x,SR); } while (0)
 319
 320         static inline bool irq_running(void)
 321         {
 322                 extern void *user_sp;
 323                 return !!user_sp;
 324         }
 325         #define IRQ_RUNNING() irq_running()
 326
 327         static inline bool irq_enabled(void)
 328         {
 329                 uint16_t x;
 330                 asm(move SR,x);
 331                 return !(x & 0x0200);
 332         }
 333         #define IRQ_ENABLED() irq_enabled()
 334
 335 #elif CPU_AVR
 336
 337         #define IRQ_DISABLE   asm volatile ("cli" ::)
 338         #define IRQ_ENABLE    asm volatile ("sei" ::)
 339
 340         #define IRQ_SAVE_DISABLE(x) \
 341         do { \
 342                 __asm__ __volatile__( \
 343                         "in %0,__SREG__\n\t" \
 344                         "cli" \
 345                         : "=r" (x) : /* no inputs */ : "cc" \
 346                 ); \
 347         } while (0)
 348
 349         #define IRQ_RESTORE(x) \
 350         do { \
 351                 __asm__ __volatile__( \
 352                         "out __SREG__,%0" : /* no outputs */ : "r" (x) : "cc" \
 353                 ); \
 354         } while (0)
 355
 356         #define IRQ_ENABLED() \
 357         ({ \
 358                 uint8_t sreg; \
 359                 __asm__ __volatile__( \
 360                         "in %0,__SREG__\n\t" \
 361                         : "=r" (sreg)  /* no inputs & no clobbers */ \
 362                 ); \
 363                 (bool)(sreg & 0x80); \
 364         })
 365         #if CONFIG_KERN_PREEMPT
 366                 #define DECLARE_ISR_CONTEXT_SWITCH(vect)                \
 367                         INLINE void __isr_##vect(void);                 \
 368                         ISR(vect)                                       \
 369                         {                                               \
 370                                 __isr_##vect();                         \
 371                                 IRQ_PREEMPT_HANDLER();                  \
 372                         }                                               \
 373                         INLINE void __isr_##vect(void)
 374
 375                 /**
 376                  * With task priorities enabled each ISR is used a point to
 377                  * check if we need to perform a context switch.
 378                  *
 379                  * Instead, without priorities a context switch can occur only
 380                  * when the running task expires its time quantum. In this last
 381                  * case, the context switch can only occur in the timer ISR,
 382                  * that must be always declared with the
 383                  * DECLARE_ISR_CONTEXT_SWITCH() macro.
 384                  */
 385                 #if CONFIG_KERN_PRI
 386                         #define DECLARE_ISR(func) \
 387                                 DECLARE_ISR_CONTEXT_SWITCH(func)
 388                         /**
 389                          * Interrupt service routine prototype: can be used for
 390                          * forward declarations.
 391                          */
 392                         #define ISR_PROTO(func) \
 393                                 ISR_PROTO_CONTEXT_SWITCH(func)
 394                 #endif /* !CONFIG_KERN_PRI */
 395         #endif
 396
 397         #ifndef ISR_PROTO
 398                 #define ISR_PROTO(vect) ISR(vect)
 399         #endif
 400         #ifndef DECLARE_ISR
 401                 #define DECLARE_ISR(vect) ISR(vect)
 402         #endif
 403         #ifndef DECLARE_ISR_CONTEXT_SWITCH
 404                 #define DECLARE_ISR_CONTEXT_SWITCH(vect) ISR(vect)
 405         #endif
 406         #ifndef ISR_PROTO_CONTEXT_SWITCH
 407                 #define ISR_PROTO_CONTEXT_SWITCH(func) ISR(vect)
 408         #endif
 409
 410 #else
 411         #error No CPU_... defined.
 412 #endif
 413
 414 #ifdef IRQ_RUNNING
 415         /// Ensure callee is running within an interrupt
 416         #define ASSERT_IRQ_CONTEXT()  ASSERT(IRQ_RUNNING())
 417
 418         /// Ensure callee is not running within an interrupt
 419         #define ASSERT_USER_CONTEXT() ASSERT(!IRQ_RUNNING())
 420 #else
 421         #define ASSERT_USER_CONTEXT()  do {} while(0)
 422         #define ASSERT_IRQ_CONTEXT()   do {} while(0)
 423 #endif
 424
 425 #ifdef IRQ_ENABLED
 426         /// Ensure interrupts are enabled
 427         #define IRQ_ASSERT_ENABLED()  ASSERT(IRQ_ENABLED())
 428
 429         /// Ensure interrupts are not enabled
 430         #define IRQ_ASSERT_DISABLED() ASSERT(!IRQ_ENABLED())
 431 #else
 432         #define IRQ_ASSERT_ENABLED() do {} while(0)
 433         #define IRQ_ASSERT_DISABLED() do {} while(0)
 434 #endif
 435
 436
 437 #ifndef IRQ_PREEMPT_HANDLER
 438         #if CONFIG_KERN_PREEMPT
 439                 /**
 440                  * Handle preemptive context switch inside timer IRQ.
 441                  */
 442                 INLINE void IRQ_PREEMPT_HANDLER(void)
 443                 {
 444                         if (proc_needPreempt())
 445                                 proc_preempt();
 446                 }
 447         #else
 448                 #define IRQ_PREEMPT_HANDLER() /* Nothing */
 449         #endif
 450 #endif
 451
 452 /**
 453  * Execute \a CODE atomically with respect to interrupts.
 454  *
 455  * \see IRQ_SAVE_DISABLE IRQ_RESTORE
 456  */
 457 #define ATOMIC(CODE) \
 458         do { \
 459                 cpu_flags_t __flags; \
 460                 IRQ_SAVE_DISABLE(__flags); \
 461                 CODE; \
 462                 IRQ_RESTORE(__flags); \
 463         } while (0)
 464
 465 #endif /* CPU_IRQ_H */