bertos/drv/pwm_test.c

   1 /**
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  27  * the GNU General Public License.
  28  *
  29  * Copyright 2005 Develer S.r.l. (http://www.develer.com/)
  30  * -->
  31  *
  32  *
  33  * \brief Test for PWM driver (implementation)
  34  *
  35  * \version $Id$
  36  *
  37  * \author Daniele Basile <asterix@develer.com>
  38  */
  39
  40 #include <cpu/types.h>
  41 #include <cpu/irq.h>
  42
  43 #include <drv/pwm.h>
  44 #include <drv/pwm_at91.h>
  45 #include <drv/timer.h>
  46 #include <drv/sysirq_at91.h>
  47
  48 #include <cfg/macros.h>
  49 #include <cfg/debug.h>
  50
  51
  52 #warning FIXME: This test is target specific, refactor it to be generic for all target!
  53
  54 #if 0
  55 #include <io/arm.h>
  56
  57 /*
  58  * Esample of value for duty cycle"
  59  *
  60  * - 100% => 0xFFFFFFFF
  61  * - 80%  => 0xCCCCCCCC
  62  * - 75%  => 0xBFFFFFFF
  63  * - 50%  => 0x7FFFFFFF
  64  * - 25%  => 0x3FFFFFFF
  65  * - 33%  => 0x55555555
  66  * - 16%  => 0x2AAAAAAA
  67  */
  68
  69 #define PWM_TEST_CH0                     0
  70 #define PWM_TEST_CH0_FREQ            100UL // 100Hz
  71 #define PWM_TEST_CH0_DUTY           0xBFFF // 80%
  72
  73 #define PWM_TEST_CH1                     1
  74 #define PWM_TEST_CH1_FREQ           1000UL  // 1000Hz
  75 #define PWM_TEST_CH1_DUTY           0xBFFF  // 75%
  76
  77 #define PWM_TEST_CH2                     2
  78 #define PWM_TEST_CH2_FREQ          12356UL  // 12356Hz
  79 #define PWM_TEST_CH2_DUTY           0x7FFF  // 50%
  80
  81 #define PWM_TEST_CH3                     3
  82 #define PWM_TEST_CH3_FREQ         100000UL  // 100KHz
  83 #define PWM_TEST_CH3_DUTY           0x5555  // 33%
  84
  85 #define PWM_TEST_CH_SET(index) \
  86         do { \
  87                         pwm_setFrequency(PWM_TEST_CH##index , PWM_TEST_CH##index##_FREQ); \
  88                         pwm_setDuty(PWM_TEST_CH##index, PWM_TEST_CH##index##_DUTY); \
  89                         pwm_enable(PWM_TEST_CH##index, true); \
  90         } while (0)
  91
  92 /**
  93  * Test suit for genation of pwm waveform.
  94  *
  95  */
  96 void pwm_test(void)
  97 {
  98
  99         kputs("PWM test\n\n");
 100
 101         kputs("Init pwm..");
 102
 103         pwm_init();
 104         kputs("done.\n");
 105
 106         PWM_TEST_CH_SET(0);
 107         kprintf("PWM test set ch[%d] =>freq[%ld], duty[%d]\n", PWM_TEST_CH0, PWM_TEST_CH0_FREQ, PWM_TEST_CH0_DUTY);
 108         PWM_TEST_CH_SET(1);
 109         kprintf("PWM test set ch[%d] =>freq[%ld], duty[%d]\n", PWM_TEST_CH1, PWM_TEST_CH1_FREQ, PWM_TEST_CH1_DUTY);
 110         PWM_TEST_CH_SET(2);
 111         kprintf("PWM test set ch[%d] =>freq[%ld], duty[%d]\n", PWM_TEST_CH2, PWM_TEST_CH2_FREQ, PWM_TEST_CH2_DUTY);
 112         PWM_TEST_CH_SET(3);
 113         kprintf("PWM test set ch[%d] =>freq[%ld], duty[%d]\n", PWM_TEST_CH3, PWM_TEST_CH3_FREQ, PWM_TEST_CH3_DUTY);
 114 }
 115
 116
 117 int main(void)
 118 {
 119         IRQ_ENABLE;
 120         kdbg_init();
 121         sysirq_init();
 122         timer_init();
 123         pwm_test();
 124
 125
 126
 127         kputs("Parto con il test!\n");
 128         kprintf("PWM CURRENT ch[%d] => cmr[%ld], dty[%ld], prd[%ld], up[%ld]\n", PWM_TEST_CH0, PWM_CMR0, PWM_CDTY0, PWM_CPRD0, PWM_CUPD0);
 129
 130         for(;;)
 131         {
 132
 133                 pwm_setDuty(0,0);
 134                 timer_delay(5000);
 135                 kprintf("TEST10 => cmr[%ld], dty[%ld], prd[%ld], up[%ld]\n", PWM_CMR0, PWM_CDTY0, PWM_CPRD0, PWM_CUPD0);
 136
 137
 138                 pwm_setDuty(0,0x7FFF);
 139                 timer_delay(5000);
 140                 kprintf("TEST50 => cmr[%ld], dty[%ld], prd[%ld], up[%ld]\n", PWM_CMR0, PWM_CDTY0, PWM_CPRD0, PWM_CUPD0);
 141
 142
 143                 pwm_setDuty(0,0x5555);
 144                 timer_delay(5000);
 145                 kprintf("TEST33 => cmr[%ld], dty[%ld], prd[%ld], up[%ld]\n", PWM_CMR0, PWM_CDTY0, PWM_CPRD0, PWM_CUPD0);
 146
 147
 148                 pwm_setDuty(0,0xCCCC);
 149                 timer_delay(5000);
 150                 kprintf("TEST80 => cmr[%ld], dty[%ld], prd[%ld], up[%ld]\n", PWM_CMR0, PWM_CDTY0, PWM_CPRD0, PWM_CUPD0);
 151                 kputs("--------\n");
 152
 153
 154 //              kprintf("PWM test ch[%d] => cmr[%ld], dty[%ld], prd[%ld], up[%ld]\n", PWM_TEST_CH0, PWM_CMR0, PWM_CDTY0, PWM_CPRD0, PWM_CUPD0);
 155 //              kprintf("PWM test ch[%d] => cmr[%ld], dty[%ld], prd[%ld], up[%ld]\n", PWM_TEST_CH1, PWM_CMR1, PWM_CDTY1, PWM_CPRD1, PWM_CUPD1);
 156 //              kprintf("PWM test ch[%d] => cmr[%ld], dty[%ld], prd[%ld], up[%ld]\n", PWM_TEST_CH2, PWM_CMR2, PWM_CDTY2, PWM_CPRD2, PWM_CUPD2);
 157 //              kprintf("PWM test ch[%d] => cmr[%ld], dty[%ld], prd[%ld], up[%ld]\n", PWM_TEST_CH3, PWM_CMR3, PWM_CDTY3, PWM_CPRD3, PWM_CUPD3);
 158         }
 159
 160 }
 161
 162 #endif
 163
 164