4 * This file is part of BeRTOS.
6 * Bertos is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
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11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 * As a special exception, you may use this file as part of a free software
21 * library without restriction. Specifically, if other files instantiate
22 * templates or use macros or inline functions from this file, or you compile
23 * this file and link it with other files to produce an executable, this
24 * file does not by itself cause the resulting executable to be covered by
25 * the GNU General Public License. This exception does not however
26 * invalidate any other reasons why the executable file might be covered by
27 * the GNU General Public License.
29 * Copyright 2003, 2004, 2006, 2008, 2009 Develer S.r.l. (http://www.develer.com/)
30 * Copyright 2000 Bernie Innocenti <bernie@codewiz.org>
31 * All Rights Reserved.
34 * \brief Macro for HW_SIPO_H
39 * \author Andrea Grandi <andrea@develer.com>
40 * \author Daniele Basile <asterix@develer.com>
46 #warning TODO:This is an example implementation, you must implement it!
50 * Mapping sipo connection on board.
51 * See scheme to more info.
53 typedef enum SipoMap {
62 * Define the macros needed to set the serial input bit of SIPO device
65 #define SIPO_SI_HIGH() do { /* Implement me! */ } while (0)
66 #define SIPO_SI_LOW() do { /* Implement me! */ } while (0)
69 * Drive pin to load the bit, presented in serial-in pin,
70 * into sipo shift register.
72 #define SIPO_SI_CLOCK(clk_pol) \
79 * Clock the content of shift register to output.
81 #define SIPO_LOAD(device, load_pol) \
89 * Enable the shift register output.
91 #define SIPO_ENABLE() /* Implement me! */
94 * Set logic level for load signal
96 #define SIPO_SET_LD_LEVEL(device, load_pol) \
105 * Sel logic level for clock signal
107 #define SIPO_SET_CLK_LEVEL(clock_pol) \
109 /* Implement me! */ \
115 * Do everything needed in order to init the SIPO pins.
117 #define SIPO_INIT_PIN() \
119 /* Implement me! */ \
122 #endif /* HW_SIPO_H */