4 * This file is part of BeRTOS.
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13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
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18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 * As a special exception, you may use this file as part of a free software
21 * library without restriction. Specifically, if other files instantiate
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26 * invalidate any other reasons why the executable file might be covered by
27 * the GNU General Public License.
29 * Copyright 2008 Develer S.r.l. (http://www.develer.com/)
33 * \brief AFSK1200 modem.
36 * \author Francesco Sacchi <asterix@develer.com>
42 #include "cfg/cfg_afsk.h"
43 #include "hw/hw_afsk.h"
45 #include <drv/timer.h>
47 #include <cfg/module.h>
49 #include <cpu/power.h>
50 #include <struct/fifobuf.h>
52 #include <string.h> /* memset */
57 #define PHASE_MAX (SAMPLEPERBIT * PHASE_BIT)
58 #define PHASE_THRES (PHASE_MAX / 2) // - PHASE_BIT / 2)
60 // Modulator constants
61 #define MARK_FREQ 1200
62 #define MARK_INC (uint16_t)(DIV_ROUND(SIN_LEN * (uint32_t)MARK_FREQ, CONFIG_AFSK_DAC_SAMPLERATE))
64 #define SPACE_FREQ 2200
65 #define SPACE_INC (uint16_t)(DIV_ROUND(SIN_LEN * (uint32_t)SPACE_FREQ, CONFIG_AFSK_DAC_SAMPLERATE))
67 //Ensure sample rate is a multiple of bit rate
68 STATIC_ASSERT(!(CONFIG_AFSK_DAC_SAMPLERATE % BITRATE));
70 #define DAC_SAMPLEPERBIT (CONFIG_AFSK_DAC_SAMPLERATE / BITRATE)
73 * Sine table for the first quarter of wave.
74 * The rest of the wave is computed from this first quarter.
75 * This table is used to generate the modulated data.
77 static const uint8_t sin_table[] =
80 128, 129, 131, 132, 134, 135, 137, 138, 140, 142, 143, 145, 146, 148, 149, 151,
81 152, 154, 155, 157, 158, 160, 162, 163, 165, 166, 167, 169, 170, 172, 173, 175,
82 176, 178, 179, 181, 182, 183, 185, 186, 188, 189, 190, 192, 193, 194, 196, 197,
83 198, 200, 201, 202, 203, 205, 206, 207, 208, 210, 211, 212, 213, 214, 215, 217,
84 218, 219, 220, 221, 222, 223, 224, 225, 226, 227, 228, 229, 230, 231, 232, 233,
85 234, 234, 235, 236, 237, 238, 238, 239, 240, 241, 241, 242, 243, 243, 244, 245,
86 245, 246, 246, 247, 248, 248, 249, 249, 250, 250, 250, 251, 251, 252, 252, 252,
87 253, 253, 253, 253, 254, 254, 254, 254, 254, 255, 255, 255, 255, 255, 255, 255,
90 #define SIN_LEN 512 ///< Full wave length
92 STATIC_ASSERT(sizeof(sin_table) == SIN_LEN / 4);
96 * Given the index, this function computes the correct sine sample
97 * based only on the first quarter of wave.
99 INLINE uint8_t sin_sample(uint16_t idx)
101 ASSERT(idx < SIN_LEN);
102 uint16_t new_idx = idx % (SIN_LEN / 2);
103 new_idx = (new_idx >= (SIN_LEN / 4)) ? (SIN_LEN / 2 - new_idx - 1) : new_idx;
104 return (idx >= (SIN_LEN / 2)) ? (255 - sin_table[new_idx]) : sin_table[new_idx];
108 #define BIT_DIFFER(bitline1, bitline2) (((bitline1) ^ (bitline2)) & 0x01)
109 #define EDGE_FOUND(bitline) BIT_DIFFER((bitline), (bitline) >> 1)
112 static void hdlc_parse(Afsk *af, bool bit)
114 af->hdlc_demod_bits <<= 1;
115 af->hdlc_demod_bits |= bit ? 1 : 0;
118 if (af->hdlc_demod_bits == HDLC_FLAG)
120 if (!fifo_isfull(&af->rx_fifo))
122 fifo_push(&af->rx_fifo, HDLC_FLAG);
123 af->hdlc_rxstart = true;
126 af->hdlc_rxstart = false;
128 af->hdlc_currchar = 0;
129 af->hdlc_bit_idx = 0;
134 if ((af->hdlc_demod_bits & HDLC_RESET) == HDLC_RESET)
136 af->hdlc_rxstart = false;
140 if (!af->hdlc_rxstart)
144 if ((af->hdlc_demod_bits & 0x3f) == 0x3e)
147 if (af->hdlc_demod_bits & 0x01)
148 af->hdlc_currchar |= 0x80;
150 if (++af->hdlc_bit_idx >= 8)
152 if ((af->hdlc_currchar == HDLC_FLAG
153 || af->hdlc_currchar == HDLC_RESET
154 || af->hdlc_currchar == AX25_ESC))
156 if (!fifo_isfull(&af->rx_fifo))
157 fifo_push(&af->rx_fifo, AX25_ESC);
159 af->hdlc_rxstart = false;
162 if (!fifo_isfull(&af->rx_fifo))
163 fifo_push(&af->rx_fifo, af->hdlc_currchar);
165 af->hdlc_rxstart = false;
167 af->hdlc_currchar = 0;
168 af->hdlc_bit_idx = 0;
172 af->hdlc_currchar >>= 1;
175 void afsk_adc_isr(Afsk *af, int8_t curr_sample)
180 * Frequency discriminator and LP IIR filter.
181 * This filter is designed to work
182 * at the given sample rate and bit rate.
184 STATIC_ASSERT(SAMPLERATE == 9600);
185 STATIC_ASSERT(BITRATE == 1200);
188 * Frequency discrimination is achieved by simply multiplying
189 * the sample with a delayed sample of (samples per bit) / 2.
190 * Then the signal is lowpass filtered with a first order,
191 * 600 Hz filter. The filter implementation is selectable
192 * through the CONFIG_AFSK_FILTER config variable.
195 af->iir_x[0] = af->iir_x[1];
197 #if (CONFIG_AFSK_FILTER == AFSK_BUTTERWORTH)
198 af->iir_x[1] = ((int8_t)fifo_pop(&af->delay_fifo) * curr_sample) >> 2;
199 //af->iir_x[1] = ((int8_t)fifo_pop(&af->delay_fifo) * curr_sample) / 6.027339492;
200 #elif (CONFIG_AFSK_FILTER == AFSK_CHEBYSHEV)
201 af->iir_x[1] = ((int8_t)fifo_pop(&af->delay_fifo) * curr_sample) >> 2;
202 //af->iir_x[1] = ((int8_t)fifo_pop(&af->delay_fifo) * curr_sample) / 3.558147322;
204 #error Filter type not found!
207 af->iir_y[0] = af->iir_y[1];
209 #if CONFIG_AFSK_FILTER == AFSK_BUTTERWORTH
211 * This strange sum + shift is an optimization for af->iir_y[0] * 0.668.
212 * iir * 0.668 ~= (iir * 21) / 32 =
213 * = (iir * 16) / 32 + (iir * 4) / 32 + iir / 32 =
214 * = iir / 2 + iir / 8 + iir / 32 =
215 * = iir >> 1 + iir >> 3 + iir >> 5
217 af->iir_y[1] = af->iir_x[0] + af->iir_x[1] + (af->iir_y[0] >> 1) + (af->iir_y[0] >> 3) + (af->iir_y[0] >> 5);
218 //af->iir_y[1] = af->iir_x[0] + af->iir_x[1] + af->iir_y[0] * 0.6681786379;
219 #elif CONFIG_AFSK_FILTER == AFSK_CHEBYSHEV
221 * This should be (af->iir_y[0] * 0.438) but
222 * (af->iir_y[0] >> 1) is a faster approximation :-)
224 af->iir_y[1] = af->iir_x[0] + af->iir_x[1] + (af->iir_y[0] >> 1);
225 //af->iir_y[1] = af->iir_x[0] + af->iir_x[1] + af->iir_y[0] * 0.4379097269;
228 /* Save this sampled bit in a delay line */
229 af->sampled_bits <<= 1;
230 af->sampled_bits |= (af->iir_y[1] > 0) ? 1 : 0;
232 /* Store current ADC sample in the af->delay_fifo */
233 fifo_push(&af->delay_fifo, curr_sample);
235 /* If there is an edge, adjust phase sampling */
236 if (EDGE_FOUND(af->sampled_bits))
238 if (af->curr_phase < PHASE_THRES)
239 af->curr_phase += PHASE_INC;
241 af->curr_phase -= PHASE_INC;
243 af->curr_phase += PHASE_BIT;
246 if (af->curr_phase >= PHASE_MAX)
248 af->curr_phase %= PHASE_MAX;
250 /* Shift 1 position in the shift register of the found bits */
251 af->found_bits <<= 1;
254 * Determine bit value by reading the last 3 sampled bits.
255 * If the number of ones is two or greater, the bit value is a 1,
258 uint8_t bits = af->sampled_bits & 0x07;
259 if (bits == 0x07 // 111, 3 bits set to 1
260 || bits == 0x06 // 110, 2 bits
261 || bits == 0x05 // 101, 2 bits
262 || bits == 0x03 // 011, 2 bits
267 * NRZI coding: if 2 consecutive bits have the same value
268 * a 1 is received, otherwise it's a 0.
270 hdlc_parse(af, !EDGE_FOUND(af->found_bits));
277 static void afsk_txStart(Afsk *af)
281 af->phase_inc = MARK_INC;
285 af->preamble_len = DIV_ROUND(CONFIG_AFSK_PREAMBLE_LEN * BITRATE, 8000);
286 AFSK_DAC_IRQ_START(af->dac_ch);
288 ATOMIC(af->trailer_len = DIV_ROUND(CONFIG_AFSK_TRAILER_LEN * BITRATE, 8000));
291 #define BIT_STUFF_LEN 5
293 #define SWITCH_TONE(inc) (((inc) == MARK_INC) ? SPACE_INC : MARK_INC)
295 void afsk_dac_isr(Afsk *af)
297 /* Check if we are at a start of a sample cycle */
298 if (af->sample_count == 0)
302 /* We have just finished transimitting a char, get a new one. */
303 if (fifo_isempty(&af->tx_fifo) && af->trailer_len == 0)
305 AFSK_DAC_IRQ_STOP(af->dac_ch);
312 * If we have just finished af->sending an unstuffed byte,
313 * reset bitstuff counter.
318 af->bit_stuff = true;
321 * Handle preamble and trailer
323 if (af->preamble_len == 0)
325 if (fifo_isempty(&af->tx_fifo))
328 af->curr_out = HDLC_FLAG;
331 af->curr_out = fifo_pop(&af->tx_fifo);
336 af->curr_out = HDLC_FLAG;
339 /* Handle char escape */
340 if (af->curr_out == AX25_ESC)
342 if (fifo_isempty(&af->tx_fifo))
344 AFSK_DAC_IRQ_STOP(af->dac_ch);
349 af->curr_out = fifo_pop(&af->tx_fifo);
351 else if (af->curr_out == HDLC_FLAG || af->curr_out == HDLC_RESET)
352 /* If these chars are not escaped disable bit stuffing */
353 af->bit_stuff = false;
355 /* Start with LSB mask */
359 /* check for bit stuffing */
360 if (af->bit_stuff && af->stuff_cnt >= BIT_STUFF_LEN)
362 /* If there are more than 5 ones in a row insert a 0 */
365 af->phase_inc = SWITCH_TONE(af->phase_inc);
370 * NRZI: if we want to transmit a 1 the modulated frequency will stay
371 * unchanged; with a 0, there will be a change in the tone.
373 if (af->curr_out & af->tx_bit)
377 * - Stay on the previous tone
378 * - Increace bit stuff count
386 * - Reset bit stuff count
390 af->phase_inc = SWITCH_TONE(af->phase_inc);
393 /* Go to the next bit */
396 af->sample_count = DAC_SAMPLEPERBIT;
399 /* Get new sample and put it out on the DAC */
400 af->phase_acc += af->phase_inc;
401 af->phase_acc %= SIN_LEN;
403 AFSK_DAC_SET(af->dac_ch, sin_sample(af->phase_acc));
408 static size_t afsk_read(KFile *fd, void *_buf, size_t size)
410 Afsk *af = AFSK_CAST(fd);
411 uint8_t *buf = (uint8_t *)_buf;
413 #if CONFIG_AFSK_RXTIMEOUT == 0
414 while (size-- && !fifo_isempty_locked(&af->rx_fifo))
419 #if CONFIG_AFSK_RXTIMEOUT != -1
420 ticks_t start = timer_clock();
423 while (fifo_isempty_locked(&af->rx_fifo));
426 #if CONFIG_AFSK_RXTIMEOUT != -1
427 if (timer_clock() - start > ms_to_ticks(CONFIG_AFSK_RXTIMEOUT))
428 return buf - (uint8_t *)_buf;
432 *buf++ = fifo_pop_locked(&af->rx_fifo);
435 return buf - (uint8_t *)_buf;
438 static size_t afsk_write(KFile *fd, const void *_buf, size_t size)
440 Afsk *af = AFSK_CAST(fd);
441 const uint8_t *buf = (const uint8_t *)_buf;
445 while (fifo_isfull_locked(&af->tx_fifo))
448 fifo_push_locked(&af->tx_fifo, *buf++);
452 return buf - (const uint8_t *)_buf;
455 static int afsk_flush(KFile *fd)
457 Afsk *af = AFSK_CAST(fd);
464 void afsk_init(Afsk *af, int adc_ch, int dac_ch)
466 #if CONFIG_AFSK_RXTIMEOUT != -1
469 memset(af, 0, sizeof(*af));
473 fifo_init(&af->delay_fifo, (uint8_t *)af->delay_buf, sizeof(af->delay_buf));
474 fifo_init(&af->rx_fifo, af->rx_buf, sizeof(af->rx_buf));
476 /* Fill sample FIFO with 0 */
477 for (int i = 0; i < SAMPLEPERBIT / 2; i++)
478 fifo_push(&af->delay_fifo, 0);
480 fifo_init(&af->tx_fifo, af->tx_buf, sizeof(af->tx_buf));
482 AFSK_ADC_INIT(adc_ch, af);
483 AFSK_DAC_INIT(dac_ch, af);
485 kprintf("MARK_INC %d, SPACE_INC %d\n", MARK_INC, SPACE_INC);
487 DB(af->fd._type = KFT_AFSK);
488 af->fd.write = afsk_write;
489 af->fd.read = afsk_read;
490 af->fd.flush = afsk_flush;
491 af->phase_inc = MARK_INC;