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29 * Copyright 2008 Develer S.r.l. (http://www.develer.com/)
33 * \brief AFSK1200 modem.
35 * \author Francesco Sacchi <batt@develer.com>
37 * $WIZ$ module_name = "afsk"
38 * $WIZ$ module_configuration = "bertos/cfg/cfg_afsk.h"
39 * $WIZ$ module_depends = "timer", "kfile"
40 * $WIZ$ module_hw = "bertos/hw/hw_afsk.h"
46 #include "cfg/cfg_afsk.h"
47 #include "hw/hw_afsk.h"
49 #include <cfg/compiler.h>
53 #include <struct/fifobuf.h>
59 * The demodulator filters are designed to work at this frequency.
60 * If you need to change this remember to update afsk_adc_isr().
62 #define SAMPLERATE 9600
65 * Bitrate of the received/transmitted data.
66 * The demodulator filters and decoderes are designed to work at this frequency.
67 * If you need to change this remember to update afsk_adc_isr().
71 #define SAMPLEPERBIT (SAMPLERATE / BITRATE)
74 * HDLC (High-Level Data Link Control) context.
75 * Maybe to be moved in a separate HDLC module one day.
79 uint8_t demod_bits; ///< Bitstream from the demodulator.
80 uint8_t bit_idx; ///< Current received bit.
81 uint8_t currchar; ///< Current received character.
82 bool rxstart; ///< True if an HDLC_FLAG char has been found in the bitstream.
86 * RX FIFO buffer full error.
88 #define AFSK_RXFIFO_OVERRUN BV(0)
91 * AFSK1200 modem context.
98 /** ADC channel to be used by the demodulator */
101 /** DAC channel to be used by the modulator */
104 /** Current sample of bit for output data. */
105 uint8_t sample_count;
107 /** Current character to be modulated */
110 /** Mask of current modulated bit */
113 /** True if bit stuff is allowed, false otherwise */
116 /** Counter for bit stuffing */
119 * DDS phase accumulator for generating modulated data.
123 /** Current phase increment for current modulated bit */
126 /** Delay line used to delay samples by (SAMPLEPERBIT / 2) */
127 FIFOBuffer delay_fifo;
130 * Buffer for delay FIFO.
131 * The 1 is added because the FIFO macros need
132 * 1 byte more to handle a buffer (SAMPLEPERBIT / 2) bytes long.
134 int8_t delay_buf[SAMPLEPERBIT / 2 + 1];
136 /** FIFO for received data */
139 /** FIFO rx buffer */
140 uint8_t rx_buf[CONFIG_AFSK_RX_BUFLEN];
142 /** FIFO for transmitted data */
145 /** FIFO tx buffer */
146 uint8_t tx_buf[CONFIG_AFSK_TX_BUFLEN];
148 /** IIR filter X cells, used to filter sampled data by the demodulator */
151 /** IIR filter Y cells, used to filter sampled data by the demodulator */
155 * Bits sampled by the demodulator are here.
156 * Since ADC samplerate is higher than the bitrate, the bits here are
157 * SAMPLEPERBIT times the bitrate.
159 uint8_t sampled_bits;
162 * Current phase, needed to know when the bitstream at ADC speed
167 /** Bits found by the demodulator at the correct bitrate speed. */
170 /** True while modem sends data */
171 volatile bool sending;
175 * If 0 all is ok, otherwise errors are present.
184 * When the AFSK modem wants to send data, before sending the actual data,
185 * shifts out preamble_len HDLC_FLAG characters.
186 * This helps to synchronize the demodulator filters on the receiver side.
188 uint16_t preamble_len;
192 * After sending the actual data, the AFSK shifts out
193 * trailer_len HDLC_FLAG characters.
194 * This helps to synchronize the demodulator filters on the receiver side.
196 uint16_t trailer_len;
199 #define KFT_AFSK MAKE_ID('A', 'F', 'S', 'K')
201 INLINE Afsk *AFSK_CAST(KFile *fd)
203 ASSERT(fd->_type == KFT_AFSK);
208 void afsk_adc_isr(Afsk *af, int8_t sample);
209 uint8_t afsk_dac_isr(Afsk *af);
210 void afsk_init(Afsk *af, int adc_ch, int dac_ch);
214 * \name Afsk filter types.
215 * $WIZ$ afsk_filter_list = "AFSK_BUTTERWORTH", "AFSK_CHEBYSHEV"
218 #define AFSK_BUTTERWORTH 0
219 #define AFSK_CHEBYSHEV 1
222 int afsk_testSetup(void);
223 int afsk_testRun(void);
224 int afsk_testTearDown(void);
226 #endif /* NET_AFSK_H */