4 * This file is part of BeRTOS.
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18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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29 * Copyright 2008 Develer S.r.l. (http://www.develer.com/)
33 * \brief AFSK1200 modem.
35 * \author Francesco Sacchi <asterix@develer.com>
37 * $WIZ$ module_name = "afsk"
38 * $WIZ$ module_configuration = "bertos/cfg/cfg_afsk.h"
39 * $WIZ$ module_depends = "timer", "kfile"
40 * $WIZ$ module_hw = "bertos/hw/hw_afsk.h"
46 #include "cfg/cfg_afsk.h"
47 #include "hw/hw_afsk.h"
50 #include <cfg/compiler.h>
51 #include <struct/fifobuf.h>
57 * The demodulator filters are designed to work at this frequency.
58 * If you need to change this remember to update afsk_adc_isr().
60 #define SAMPLERATE 9600
63 * Bitrate of the received/transmitted data.
64 * The demodulator filters and decoderes are designed to work at this frequency.
65 * If you need to change this remember to update afsk_adc_isr().
69 #define SAMPLEPERBIT (SAMPLERATE / BITRATE)
72 * HDLC (High-Level Data Link Control) context.
73 * Maybe to be moved in a separate HDLC module one day.
77 uint8_t demod_bits; ///< Bitstream from the demodulator.
78 uint8_t bit_idx; ///< Current received bit.
79 uint8_t currchar; ///< Current received character.
80 bool rxstart; ///< True if an HDLC_FLAG char has been found in the bitstream.
84 * RX FIFO buffer full error.
86 #define AFSK_RXFIFO_OVERRUN BV(0)
89 * AFSK1200 modem context.
96 /** ADC channel to be used by the demodulator */
99 /** DAC channel to be used by the modulator */
102 /** Current sample of bit for output data. */
103 uint8_t sample_count;
105 /** Current character to be modulated */
108 /** Mask of current modulated bit */
111 /** True if bit stuff is allowed, false otherwise */
114 /** Counter for bit stuffing */
117 * DDS phase accumulator for generating modulated data.
121 /** Current phase increment for current modulated bit */
124 /** Delay line used to delay samples by (SAMPLEPERBIT / 2) */
125 FIFOBuffer delay_fifo;
128 * Buffer for delay FIFO.
129 * The 1 is added because the FIFO macros need
130 * 1 byte more to handle a buffer (SAMPLEPERBIT / 2) bytes long.
132 int8_t delay_buf[SAMPLEPERBIT / 2 + 1];
134 /** FIFO for received data */
137 /** FIFO rx buffer */
138 uint8_t rx_buf[CONFIG_AFSK_RX_BUFLEN];
140 /** FIFO for transmitted data */
143 /** FIFO tx buffer */
144 uint8_t tx_buf[CONFIG_AFSK_TX_BUFLEN];
146 /** IIR filter X cells, used to filter sampled data by the demodulator */
149 /** IIR filter Y cells, used to filter sampled data by the demodulator */
153 * Bits sampled by the demodulator are here.
154 * Since ADC samplerate is higher than the bitrate, the bits here are
155 * SAMPLEPERBIT times the bitrate.
157 uint8_t sampled_bits;
160 * Current phase, needed to know when the bitstream at ADC speed
165 /** Bits found by the demodulator at the correct bitrate speed. */
168 /** True while modem sends data */
169 volatile bool sending;
173 * If 0 all is ok, otherwise errors are present.
182 * When the AFSK modem wants to send data, before sending the actual data,
183 * shifts out preamble_len HDLC_FLAG characters.
184 * This helps to synchronize the demodulator filters on the receiver side.
186 uint16_t preamble_len;
190 * After sending the actual data, the AFSK shifts out
191 * trailer_len HDLC_FLAG characters.
192 * This helps to synchronize the demodulator filters on the receiver side.
194 uint16_t trailer_len;
197 #define KFT_AFSK MAKE_ID('A', 'F', 'S', 'K')
199 INLINE Afsk *AFSK_CAST(KFile *fd)
201 ASSERT(fd->_type == KFT_AFSK);
206 void afsk_adc_isr(Afsk *af, int8_t sample);
207 uint8_t afsk_dac_isr(Afsk *af);
208 void afsk_init(Afsk *af, int adc_ch, int dac_ch);
212 * \name Afsk filter types.
213 * $WIZ$ afsk_filter_list = "AFSK_BUTTERWORTH", "AFSK_CHEBYSHEV"
216 #define AFSK_BUTTERWORTH 0
217 #define AFSK_CHEBYSHEV 1
220 int afsk_testSetup(void);
221 int afsk_testRun(void);
222 int afsk_testTearDown(void);
224 #endif /* NET_AFSK_H */