4 * This file is part of BeRTOS.
6 * Bertos is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 * As a special exception, you may use this file as part of a free software
21 * library without restriction. Specifically, if other files instantiate
22 * templates or use macros or inline functions from this file, or you compile
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24 * file does not by itself cause the resulting executable to be covered by
25 * the GNU General Public License. This exception does not however
26 * invalidate any other reasons why the executable file might be covered by
27 * the GNU General Public License.
29 * Copyright 2008 Develer S.r.l. (http://www.develer.com/)
30 * All Rights Reserved.
33 * \brief Configuration file for serial module.
37 * \author Daniele Basile <asterix@develer.com>
44 /// [bytes] Size of the outbound FIFO buffer for port 0.
45 #define CONFIG_UART0_TXBUFSIZE 32
47 /// [bytes] Size of the inbound FIFO buffer for port 0.
48 #define CONFIG_UART0_RXBUFSIZE 32
50 /// [bytes] Size of the outbound FIFO buffer for port 1.
51 #define CONFIG_UART1_TXBUFSIZE 32
53 /// [bytes] Size of the inbound FIFO buffer for port 1.
54 #define CONFIG_UART1_RXBUFSIZE 32
57 /// [bytes] Size of the outbound FIFO buffer for SPI port (AVR only)
58 #define CONFIG_SPI_TXBUFSIZE 32
60 /// [bytes] Size of the inbound FIFO buffer for SPI port (AVR only)
61 #define CONFIG_SPI_RXBUFSIZE 32
63 /// [bytes] Size of the outbound FIFO buffer for SPI port 0.
64 #define CONFIG_SPI0_TXBUFSIZE 32
66 /// [bytes] Size of the inbound FIFO buffer for SPI port 0.
67 #define CONFIG_SPI0_RXBUFSIZE 32
69 /// [bytes] Size of the outbound FIFO buffer for SPI port 1.
70 #define CONFIG_SPI1_TXBUFSIZE 32
72 /// [bytes] Size of the inbound FIFO buffer for SPI port 1.
73 #define CONFIG_SPI1_RXBUFSIZE 32
75 /// SPI data order (AVR only).
76 #define CONFIG_SPI_DATA_ORDER SER_MSB_FIRST
78 /// SPI clock division factor (AVR only).
79 #define CONFIG_SPI_CLOCK_DIV 16
81 /// SPI clock polarity: 0 = normal low, 1 = normal high (AVR only).
82 #define CONFIG_SPI_CLOCK_POL 0
84 /// SPI clock phase: 0 = sample on first edge, 1 = sample on second clock edge (AVR only).
85 #define CONFIG_SPI_CLOCK_PHASE 0
87 /// Default transmit timeout (ms). Set to -1 to disable timeout support.
88 #define CONFIG_SER_TXTIMEOUT -1
90 /// Default receive timeout (ms). Set to -1 to disable timeout support.
91 #define CONFIG_SER_RXTIMEOUT -1
93 /// Use RTS/CTS handshake
94 #define CONFIG_SER_HWHANDSHAKE 0
96 /// Default baud rate (set to 0 to disable).
97 #define CONFIG_SER_DEFBAUDRATE 0
99 /// Enable ser_gets() and ser_gets_echo().
100 #define CONFIG_SER_GETS 0
102 /// Enable second serial port in emulator.
103 #define CONFIG_EMUL_UART1 0
106 * Transmit always something on serial port 0 TX
107 * to avoid interference when sending burst of data,
108 * using AVR multiprocessor serial mode
110 #define CONFIG_SER_TXFILL 0
112 /// For serial debug.
113 #define CONFIG_SER_STROBE 0
115 #endif /* CFG_SER_H */