4 * This file is part of BeRTOS.
6 * Bertos is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 * As a special exception, you may use this file as part of a free software
21 * library without restriction. Specifically, if other files instantiate
22 * templates or use macros or inline functions from this file, or you compile
23 * this file and link it with other files to produce an executable, this
24 * file does not by itself cause the resulting executable to be covered by
25 * the GNU General Public License. This exception does not however
26 * invalidate any other reasons why the executable file might be covered by
27 * the GNU General Public License.
29 * Copyright 2008 Develer S.r.l. (http://www.develer.com/)
34 * \brief ADC hardware-specific implementation
36 * This ADC module should be use both whit kernel or none.
37 * If you are using a kernel, the adc drive does not wait the finish of
38 * conversion but use a singal every time a required conversion are
39 * ended. This signal wake up a process that return a result of
40 * conversion. Otherwise, if you not use a kernl, this module wait
41 * whit a loop the finishing of conversion.
46 * \author Daniele Basile <asterix@develer.com>
52 #include "cfg/cfg_adc.h"
53 #include "cfg/cfg_kern.h"
54 #include <cfg/macros.h>
55 #include <cfg/compiler.h>
57 // Define logging setting (for cfg/log.h module).
58 #define LOG_LEVEL ADC_LOG_LEVEL
59 #define LOG_VERBOSITY ADC_LOG_VERBOSITY
67 #include <cfg/module.h>
68 #include <kern/proc.h>
69 #include <kern/signal.h>
72 #if !CONFIG_KERN_SIGNALS
73 #error Signals must be active to use ADC with kernel
76 /* Signal adc convertion end */
77 #define SIG_ADC_COMPLETE SIG_USER0
79 /* ADC waiting process */
80 static struct Process *adc_process;
84 * Simply signal the adc process that convertion is complete.
86 static void ISR_FUNC adc_conversion_end_irq(void)
88 sig_signal(adc_process, SIG_ADC_COMPLETE);
90 /* Inform hw that we have served the IRQ */
94 static void adc_enable_irq(void)
97 // Disable all interrupt
100 //Register interrupt vector
101 AIC_SVR(ADC_ID) = adc_conversion_end_irq;
102 AIC_SMR(ADC_ID) = AIC_SRCTYPE_INT_EDGE_TRIGGERED;
103 AIC_IECR = BV(ADC_ID);
105 //Enable data ready irq
106 ADC_IER = BV(ADC_DRDY);
109 #endif /* CONFIG_KERNEL */
113 * Select mux channel \a ch.
114 * \todo only first 8 channels are selectable!
116 INLINE void adc_hw_select_ch(uint8_t ch)
118 //Disable all channels
119 ADC_CHDR = ADC_CH_MASK;
120 //Enable select channel
126 * Start an ADC convertion.
127 * If a kernel is present, preempt until convertion is complete, otherwise
128 * a busy wait on ADCS bit is done.
130 INLINE uint16_t adc_hw_read(void)
132 ASSERT(!(ADC_SR & ADC_EOC_MASK));
135 adc_process = proc_current();
139 ADC_CR = BV(ADC_START);
142 // Ensure IRQs enabled.
143 ASSERT(IRQ_ENABLED());
144 sig_wait(SIG_ADC_COMPLETE);
146 //Wait in polling until is done
147 while (!(ADC_SR & BV(ADC_DRDY)));
150 //Return the last converted data
157 INLINE void adc_hw_init(void)
163 * Set adc mode register:
164 * - Disable hardware trigger and enable software trigger.
165 * - Select normal mode.
166 * - Set ADC_BITS bit convertion resolution.
172 ADC_MR &= ~BV(ADC_LOWRES);
174 ADC_MR |= BV(ADC_LOWRES);
176 #error No select bit resolution is supported to this CPU
180 LOG_INFO("prescaler[%ld], stup[%ld], shtim[%ld]\n",ADC_COMPUTED_PRESCALER, ADC_COMPUTED_STARTUPTIME, ADC_COMPUTED_SHTIME);
183 //Apply computed prescaler value
184 ADC_MR &= ~ADC_PRESCALER_MASK;
185 ADC_MR |= ((ADC_COMPUTED_PRESCALER << ADC_PRESCALER_SHIFT) & ADC_PRESCALER_MASK);
186 LOG_INFO("prescaler[%ld]\n", (ADC_COMPUTED_PRESCALER << ADC_PRESCALER_SHIFT) & ADC_PRESCALER_MASK);
188 //Apply computed start up time
189 ADC_MR &= ~ADC_STARTUP_MASK;
190 ADC_MR |= ((ADC_COMPUTED_STARTUPTIME << ADC_STARTUP_SHIFT) & ADC_STARTUP_MASK);
191 LOG_INFO("sttime[%ld]\n", (ADC_COMPUTED_STARTUPTIME << ADC_STARTUP_SHIFT) & ADC_STARTUP_MASK);
193 //Apply computed sample and hold time
194 ADC_MR &= ~ADC_SHTIME_MASK;
195 ADC_MR |= ((ADC_COMPUTED_SHTIME << ADC_SHTIME_SHIFT) & ADC_SHTIME_MASK);
196 LOG_INFO("shtime[%ld]\n", (ADC_COMPUTED_SHTIME << ADC_SHTIME_SHIFT) & ADC_SHTIME_MASK);
199 //Register and enable irq for adc.