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29 * Copyright 2005 Develer S.r.l. (http://www.develer.com/)
35 * \author Bernardo Innocenti <bernie@develer.com>
36 * \author Francesco Sacchi <batt@develer.com>
38 * \brief Low-level timer module for AVR (implementation).
41 #include <drv/timer_avr.h>
42 #include <cfg/macros.h> // BV()
44 #include <cpu/types.h>
47 #include <avr/interrupt.h>
50 #if CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA168
51 #define REG_TIFR0 TIFR0
52 #define REG_TIFR2 TIFR2
54 #define REG_TIMSK0 TIMSK0
55 #define REG_TIMSK2 TIMSK2
57 #define REG_TCCR2A TCCR2A
58 #define REG_TCCR2B TCCR2B
60 #define REG_OCR2A OCR2A
62 #define BIT_OCF0A OCF0A
63 #define BIT_OCF2A OCF2A
65 #define BIT_OCIE0A OCIE0A
66 #define BIT_OCIE2A OCIE2A
68 #define REG_TIFR0 TIFR
69 #define REG_TIFR2 TIFR
71 #define REG_TIMSK0 TIMSK
72 #define REG_TIMSK2 TIMSK
74 #define REG_TCCR2A TCCR2
75 #define REG_TCCR2B TCCR2
77 #define REG_OCR2A OCR2
79 #define BIT_OCF0A OCF0
80 #define BIT_OCF2A OCF2
82 #define BIT_OCIE0A OCIE0
83 #define BIT_OCIE2A OCIE2
87 /** HW dependent timer initialization */
88 #if (CONFIG_TIMER == TIMER_ON_OUTPUT_COMPARE0)
90 static void timer_hw_init(void)
93 IRQ_SAVE_DISABLE(flags);
95 /* Reset Timer flags */
96 REG_TIFR0 = BV(BIT_OCF0A) | BV(TOV0);
98 /* Setup Timer/Counter interrupt */
99 ASSR = 0x00; /* Internal system clock */
100 TCCR0 = BV(WGM01) /* Clear on Compare match */
101 #if TIMER_PRESCALER == 64
104 #error Unsupported value of TIMER_PRESCALER
107 TCNT0 = 0x00; /* Initialization of Timer/Counter */
108 OCR0 = OCR_DIVISOR; /* Timer/Counter Output Compare Register */
110 /* Enable timer interrupts: Timer/Counter2 Output Compare (OCIE2) */
111 REG_TIMSK0 &= ~BV(TOIE0);
112 REG_TIMSK0 |= BV(OCIE0);
117 INLINE hptime_t timer_hw_hpread(void)
122 #elif (CONFIG_TIMER == TIMER_ON_OVERFLOW1)
124 static void timer_hw_init(void)
127 IRQ_SAVE_DISABLE(flags);
129 /* Reset Timer overflow flag */
132 /* Fast PWM mode, 9 bit, 24 kHz, no prescaling. */
133 #if (TIMER_PRESCALER == 1) && (TIMER_HW_BITS == 9)
135 TCCR1A &= ~BV(WGM10);
136 TCCR1B |= BV(WGM12) | BV(CS10);
137 TCCR1B &= ~(BV(WGM13) | BV(CS11) | BV(CS12));
138 /* Fast PWM mode, 8 bit, 24 kHz, no prescaling. */
139 #elif (TIMER_PRESCALER == 1) && (TIMER_HW_BITS == 8)
141 TCCR1A &= ~BV(WGM11);
142 TCCR1B |= BV(WGM12) | BV(CS10);
143 TCCR1B &= ~(BV(WGM13) | BV(CS11) | BV(CS12));
145 #error Unsupported value of TIMER_PRESCALER or TIMER_HW_BITS
148 TCNT1 = 0x00; /* initialization of Timer/Counter */
150 /* Enable timer interrupt: Timer/Counter1 Overflow */
156 INLINE hptime_t timer_hw_hpread(void)
161 #elif (CONFIG_TIMER == TIMER_ON_OUTPUT_COMPARE2)
162 static void timer_hw_init(void)
165 IRQ_SAVE_DISABLE(flags);
167 /* Reset Timer flags */
168 REG_TIFR2 = BV(BIT_OCF2A) | BV(TOV2);
170 /* Setup Timer/Counter interrupt */
171 REG_TCCR2A = 0; // TCCR2 reg could be separate or a unique register with both A & B values, this is needed to
172 REG_TCCR2B = 0; // ensure correct initialization.
174 REG_TCCR2A = BV(WGM21);
175 #if TIMER_PRESCALER == 64
176 #if CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA168
177 // ATMega1281 & ATMega168 have undocumented differences in timer2 prescaler!
178 REG_TCCR2B |= BV(CS22);
180 REG_TCCR2B |= BV(CS21) | BV(CS20);
183 #error Unsupported value of TIMER_PRESCALER
186 /* Clear on Compare match & prescaler = 64, internal sys clock.
187 When changing prescaler change TIMER_HW_HPTICKS_PER_SEC too */
188 TCNT2 = 0x00; /* initialization of Timer/Counter */
189 REG_OCR2A = OCR_DIVISOR; /* Timer/Counter Output Compare Register */
191 /* Enable timer interrupts: Timer/Counter2 Output Compare (OCIE2) */
192 REG_TIMSK2 &= ~BV(TOIE2);
193 REG_TIMSK2 |= BV(BIT_OCIE2A);
198 INLINE hptime_t timer_hw_hpread(void)
202 #elif (CONFIG_TIMER == TIMER_ON_OVERFLOW3)
204 static void timer_hw_init(void)
207 IRQ_SAVE_DISABLE(flags);
209 /* Reset Timer overflow flag */
212 /* Fast PWM mode, 9 bit, 24 kHz, no prescaling. */
213 #if (TIMER_PRESCALER == 1) && (TIMER_HW_BITS == 9)
215 TCCR3A &= ~BV(WGM30);
216 TCCR3B |= BV(WGM32) | BV(CS30);
217 TCCR3B &= ~(BV(WGM33) | BV(CS31) | BV(CS32));
218 /* Fast PWM mode, 8 bit, 24 kHz, no prescaling. */
219 #elif (TIMER_PRESCALER == 1) && (TIMER_HW_BITS == 8)
221 TCCR3A &= ~BV(WGM31);
222 TCCR3B |= BV(WGM32) | BV(CS30);
223 TCCR3B &= ~(BV(WGM33) | BV(CS31) | BV(CS32));
225 #error Unsupported value of TIMER_PRESCALER or TIMER_HW_BITS
228 TCNT3 = 0x00; /* initialization of Timer/Counter */
230 /* Enable timer interrupt: Timer/Counter3 Overflow */
231 /* ATTENTION! TOIE3 is only on ETIMSK, not TIMSK */
237 INLINE hptime_t timer_hw_hpread(void)
243 #error Unimplemented value for CONFIG_TIMER
244 #endif /* CONFIG_TIMER */