4 * This file is part of BeRTOS.
6 * Bertos is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 * As a special exception, you may use this file as part of a free software
21 * library without restriction. Specifically, if other files instantiate
22 * templates or use macros or inline functions from this file, or you compile
23 * this file and link it with other files to produce an executable, this
24 * file does not by itself cause the resulting executable to be covered by
25 * the GNU General Public License. This exception does not however
26 * invalidate any other reasons why the executable file might be covered by
27 * the GNU General Public License.
29 * Copyright 2004, 2005, 2006, 2007 Develer S.r.l. (http://www.develer.com/)
30 * Copyright 2004 Giovanni Bajo
34 * \brief CPU detection through special preprocessor macros
39 #if defined(__arm__) /* GCC */ \
40 || defined(__ARM4TM__) /* IAR: defined for all cores >= 4tm */
44 #if defined(__ARM_AT91SAM7S32__)
45 #define CPU_ARM_AT91 1
46 #define CPU_ARM_AT91SAM7S32 1
48 #define CPU_ARM_AT91 0
49 #define CPU_ARM_AT91SAM7S32 0
52 #if defined(__ARM_AT91SAM7S64__)
53 #define CPU_ARM_AT91 1
54 #define CPU_ARM_AT91SAM7S64 1
56 #define CPU_ARM_AT91 0
57 #define CPU_ARM_AT91SAM7S64 0
60 #if defined(__ARM_AT91SAM7S128__)
61 #define CPU_ARM_AT91 1
62 #define CPU_ARM_AT91SAM7S128 1
64 #define CPU_ARM_AT91 0
65 #define CPU_ARM_AT91SAM7S128 0
68 #if defined(__ARM_AT91SAM7S256__)
69 #define CPU_ARM_AT91 1
70 #define CPU_ARM_AT91SAM7S256 1
72 #define CPU_ARM_AT91 0
73 #define CPU_ARM_AT91SAM7S256 0
76 #if CPU_ARM_AT91SAM7S32 + CPU_ARM_AT91SAM7S64 \
77 + CPU_ARM_AT91SAM7S128 + CPU_ARM_AT91SAM7S256 != 1
78 #error ARM CPU configuration error
81 #if CPU_ARM_AT91 + 0 /* Add other ARM families here */ != 1
82 #error ARM CPU configuration error
88 #define CPU_ARM_AT91 0
91 #define CPU_ARM_AT91SAM7S32 0
92 #define CPU_ARM_AT91SAM7S64 0
93 #define CPU_ARM_AT91SAM7S128 0
94 #define CPU_ARM_AT91SAM7S256 0
97 #if (defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC)) \
98 && !defined(__ARM4TM__) /* IAR: if not ARM assume I196 */
99 #warning Assuming CPU is I196
106 #if defined(__i386__) /* GCC */ \
107 || (defined(_M_IX86) && !defined(_WIN64)) /* MSVC */
112 #elif defined(__x86_64__) /* GCC */ \
113 || (defined(_M_IX86) && defined(_WIN64)) /* MSVC */
124 #if defined (_ARCH_PPC) || defined(_ARCH_PPC64)
127 #if defined(_ARCH_PPC)
132 #if defined(_ARCH_PPC64)
143 #if defined(__m56800E__) || defined(__m56800__)
145 #define CPU_ID dsp56k
150 #if defined (__AVR__)
154 #if defined(__AVR_ATmega64__)
155 #define CPU_AVR_ATMEGA64 1
157 #define CPU_AVR_ATMEGA64 0
160 #if defined(__AVR_ATmega103__)
161 #define CPU_AVR_ATMEGA103 1
163 #define CPU_AVR_ATMEGA103 0
166 #if defined(__AVR_ATmega128__)
167 #define CPU_AVR_ATMEGA128 1
169 #define CPU_AVR_ATMEGA128 0
172 #if defined(__AVR_ATmega8__)
173 #define CPU_AVR_ATMEGA8 1
175 #define CPU_AVR_ATMEGA8 0
178 #if defined(__AVR_ATmega168__)
179 #define CPU_AVR_ATMEGA168 1
181 #define CPU_AVR_ATMEGA168 0
184 #if defined(__AVR_ATmega1281__)
185 #define CPU_AVR_ATMEGA1281 1
187 #define CPU_AVR_ATMEGA1281 0
190 #if CPU_AVR_ATMEGA64 + CPU_AVR_ATMEGA103 + CPU_AVR_ATMEGA128 \
191 + CPU_AVR_ATMEGA8 + CPU_AVR_ATMEGA168 + CPU_AVR_ATMEGA1281 != 1
192 #error AVR CPU configuration error
196 #define CPU_AVR_ATMEGA8 0
197 #define CPU_AVR_ATMEGA168 0
198 #define CPU_AVR_ATMEGA64 0
199 #define CPU_AVR_ATMEGA103 0
200 #define CPU_AVR_ATMEGA128 0
201 #define CPU_AVR_ATMEGA1281 0
205 /* Self-check for the detection: only one CPU must be detected */
206 #if CPU_ARM + CPU_I196 + CPU_X86 + CPU_PPC + CPU_DSP56K + CPU_AVR == 0
208 #elif !defined(CPU_ID)
209 #error CPU_ID not defined
210 #elif CPU_ARM + CPU_I196 + CPU_X86 + CPU_PPC + CPU_DSP56K + CPU_AVR != 1
211 #error Internal CPU configuration error
215 #endif /* CPU_DETECT_H */