4 * This file is part of BeRTOS.
6 * Bertos is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 * As a special exception, you may use this file as part of a free software
21 * library without restriction. Specifically, if other files instantiate
22 * templates or use macros or inline functions from this file, or you compile
23 * this file and link it with other files to produce an executable, this
24 * file does not by itself cause the resulting executable to be covered by
25 * the GNU General Public License. This exception does not however
26 * invalidate any other reasons why the executable file might be covered by
27 * the GNU General Public License.
29 * Copyright 2004, 2005, 2006, 2007 Develer S.r.l. (http://www.develer.com/)
30 * Copyright 2004 Giovanni Bajo
34 * \brief CPU-specific IRQ definitions.
36 * \author Giovanni Bajo <rasky@develer.com>
37 * \author Bernie Innocenti <bernie@codewiz.org>
38 * \author Stefano Fedrigo <aleph@develer.com>
39 * \author Francesco Sacchi <batt@develer.com>
47 #include <kern/proc.h> /* proc_needPreempt() / proc_preempt() */
49 #include <cfg/compiler.h> /* for uintXX_t */
50 #include "cfg/cfg_proc.h" /* CONFIG_KERN_PREEMPT */
53 #define IRQ_DISABLE disable_interrupt()
54 #define IRQ_ENABLE enable_interrupt()
57 /* Get IRQ_* definitions from the hosting environment. */
60 #define IRQ_DISABLE FIXME
61 #define IRQ_ENABLE FIXME
62 #define IRQ_SAVE_DISABLE(x) FIXME
63 #define IRQ_RESTORE(x) FIXME
64 #endif /* OS_EMBEDDED */
66 #elif CPU_ARM_LM3S1968
68 #define IRQ_DISABLE asm volatile ("cpsid i" : : : "memory", "cc")
69 #define IRQ_ENABLE asm volatile ("cpsie i" : : : "memory", "cc")
71 #define IRQ_SAVE_DISABLE(x) \
76 : "=r" (x) : : "memory", "cc"); \
79 #define IRQ_RESTORE(x) \
87 #define CPU_READ_FLAGS() \
91 "mrs %0, PRIMASK\n\t" \
92 : "=r" (sreg) : : "memory", "cc"); \
96 #define IRQ_ENABLED() (!CPU_READ_FLAGS())
98 /* TODO: context switch is not yet supported */
99 #define DECLARE_ISR_CONTEXT_SWITCH(func) void func(void)
101 /* TODO: context switch is not yet supported */
102 #define ISR_PROTO_CONTEXT_SWITCH(func) void func(void)
105 #ifdef __IAR_SYSTEMS_ICC__
109 #if __CPU_MODE__ == 1 /* Thumb */
111 extern cpu_flags_t get_CPSR(void);
112 extern void set_CPSR(cpu_flags_t flags);
114 #define get_CPSR __get_CPSR
115 #define set_CPSR __set_CPSR
118 #define IRQ_DISABLE __disable_interrupt()
119 #define IRQ_ENABLE __enable_interrupt()
121 #define IRQ_SAVE_DISABLE(x) \
124 __disable_interrupt(); \
127 #define IRQ_RESTORE(x) \
132 #define IRQ_ENABLED() \
133 ((bool)(get_CPSR() & 0xb0))
135 #else /* !__IAR_SYSTEMS_ICC__ */
137 #define IRQ_DISABLE \
141 "orr r0, r0, #0xc0\n\t" \
151 "bic r0, r0, #0xc0\n\t" \
157 #define IRQ_SAVE_DISABLE(x) \
161 "orr r0, %0, #0xc0\n\t" \
169 #define IRQ_RESTORE(x) \
178 #define CPU_READ_FLAGS() \
189 #define IRQ_ENABLED() ((CPU_READ_FLAGS() & 0xc0) != 0xc0)
191 #if CONFIG_KERN_PREEMPT
192 EXTERN_C void asm_irq_switch_context(void);
195 * At the beginning of any ISR immediately ajust the
196 * return address and store all the caller-save
197 * registers (the ISR may change these registers that
198 * are shared with the user-context).
200 #define IRQ_ENTRY() asm volatile ( \
201 "sub lr, lr, #4\n\t" \
202 "stmfd sp!, {r0-r3, ip, lr}\n\t")
203 #define IRQ_EXIT() asm volatile ( \
204 "b asm_irq_switch_context\n\t")
206 * Function attribute to declare an interrupt service
209 * An ISR function must be declared as naked because we
210 * want to add our IRQ_ENTRY() prologue and IRQ_EXIT()
211 * epilogue code to handle the context switch and save
212 * all the registers (not only the callee-save).
215 #define ISR_FUNC __attribute__((naked))
218 * The compiler cannot establish which
219 * registers actually need to be saved, because
220 * the interrupt can happen at any time, so the
221 * "normal" prologue and epilogue used for a
222 * generic function call are not suitable for
225 * Using a naked function has the drawback that
226 * the stack is not automatically adjusted at
227 * this point, like a "normal" function call.
229 * So, an ISR can _only_ contain other function
230 * calls and they can't use the stack in any
233 * NOTE: we need to explicitly disable IRQs after
234 * IRQ_ENTRY(), because the IRQ status flag is not
235 * masked by the hardware and an IRQ ack inside the ISR
236 * may cause the triggering of another IRQ before
237 * exiting from the current ISR.
239 * The respective IRQ_ENABLE is not necessary, because
240 * IRQs will be automatically re-enabled when restoring
241 * the context of the user task.
243 #define DECLARE_ISR_CONTEXT_SWITCH(func) \
244 void ISR_FUNC func(void); \
245 static void __isr_##func(void); \
246 void ISR_FUNC func(void) \
253 static void __isr_##func(void)
255 * Interrupt service routine prototype: can be used for
256 * forward declarations.
258 #define ISR_PROTO_CONTEXT_SWITCH(func) \
259 void ISR_FUNC func(void)
261 * With task priorities enabled each ISR is used a point to
262 * check if we need to perform a context switch.
264 * Instead, without priorities a context switch can occur only
265 * when the running task expires its time quantum. In this last
266 * case, the context switch can only occur in the timer
267 * ISR, that must be always declared with the
268 * DECLARE_ISR_CONTEXT_SWITCH() macro.
271 #define DECLARE_ISR(func) \
272 DECLARE_ISR_CONTEXT_SWITCH(func)
274 #define ISR_PROTO(func) \
275 ISR_PROTO_CONTEXT_SWITCH(func)
276 #endif /* !CONFIG_KERN_PRI */
277 #endif /* CONFIG_KERN_PREEMPT */
280 #define DECLARE_ISR(func) \
281 void __attribute__((interrupt)) func(void)
283 #ifndef DECLARE_ISR_CONTEXT_SWITCH
284 #define DECLARE_ISR_CONTEXT_SWITCH(func) \
285 void __attribute__((interrupt)) func(void)
288 #define ISR_PROTO(func) \
289 void __attribute__((interrupt)) func(void)
291 #ifndef ISR_PROTO_CONTEXT_SWITCH
292 #define ISR_PROTO_CONTEXT_SWITCH(func) \
293 void __attribute__((interrupt)) func(void)
296 #endif /* !__IAR_SYSTEMS_ICC_ */
300 /* Get IRQ_* definitions from the hosting environment. */
303 #define IRQ_DISABLE FIXME
304 #define IRQ_ENABLE FIXME
305 #define IRQ_SAVE_DISABLE(x) FIXME
306 #define IRQ_RESTORE(x) FIXME
307 #define IRQ_ENABLED() FIXME
308 #endif /* OS_EMBEDDED */
312 #define IRQ_DISABLE do { asm(bfset #0x0200,SR); asm(nop); } while (0)
313 #define IRQ_ENABLE do { asm(bfclr #0x0200,SR); asm(nop); } while (0)
315 #define IRQ_SAVE_DISABLE(x) \
316 do { (void)x; asm(move SR,x); asm(bfset #0x0200,SR); } while (0)
317 #define IRQ_RESTORE(x) \
318 do { (void)x; asm(move x,SR); } while (0)
320 static inline bool irq_running(void)
322 extern void *user_sp;
325 #define IRQ_RUNNING() irq_running()
327 static inline bool irq_enabled(void)
331 return !(x & 0x0200);
333 #define IRQ_ENABLED() irq_enabled()
337 #define IRQ_DISABLE asm volatile ("cli" ::)
338 #define IRQ_ENABLE asm volatile ("sei" ::)
340 #define IRQ_SAVE_DISABLE(x) \
342 __asm__ __volatile__( \
343 "in %0,__SREG__\n\t" \
345 : "=r" (x) : /* no inputs */ : "cc" \
349 #define IRQ_RESTORE(x) \
351 __asm__ __volatile__( \
352 "out __SREG__,%0" : /* no outputs */ : "r" (x) : "cc" \
356 #define IRQ_ENABLED() \
359 __asm__ __volatile__( \
360 "in %0,__SREG__\n\t" \
361 : "=r" (sreg) /* no inputs & no clobbers */ \
363 (bool)(sreg & 0x80); \
365 #if CONFIG_KERN_PREEMPT
366 #define DECLARE_ISR_CONTEXT_SWITCH(vect) \
367 INLINE void __isr_##vect(void); \
371 IRQ_PREEMPT_HANDLER(); \
373 INLINE void __isr_##vect(void)
376 * With task priorities enabled each ISR is used a point to
377 * check if we need to perform a context switch.
379 * Instead, without priorities a context switch can occur only
380 * when the running task expires its time quantum. In this last
381 * case, the context switch can only occur in the timer ISR,
382 * that must be always declared with the
383 * DECLARE_ISR_CONTEXT_SWITCH() macro.
386 #define DECLARE_ISR(func) \
387 DECLARE_ISR_CONTEXT_SWITCH(func)
389 * Interrupt service routine prototype: can be used for
390 * forward declarations.
392 #define ISR_PROTO(func) \
393 ISR_PROTO_CONTEXT_SWITCH(func)
394 #endif /* !CONFIG_KERN_PRI */
398 #define ISR_PROTO(vect) ISR(vect)
401 #define DECLARE_ISR(vect) ISR(vect)
403 #ifndef DECLARE_ISR_CONTEXT_SWITCH
404 #define DECLARE_ISR_CONTEXT_SWITCH(vect) ISR(vect)
406 #ifndef ISR_PROTO_CONTEXT_SWITCH
407 #define ISR_PROTO_CONTEXT_SWITCH(func) ISR(vect)
411 #error No CPU_... defined.
415 /// Ensure callee is running within an interrupt
416 #define ASSERT_IRQ_CONTEXT() ASSERT(IRQ_RUNNING())
418 /// Ensure callee is not running within an interrupt
419 #define ASSERT_USER_CONTEXT() ASSERT(!IRQ_RUNNING())
421 #define ASSERT_USER_CONTEXT() do {} while(0)
422 #define ASSERT_IRQ_CONTEXT() do {} while(0)
426 /// Ensure interrupts are enabled
427 #define IRQ_ASSERT_ENABLED() ASSERT(IRQ_ENABLED())
429 /// Ensure interrupts are not enabled
430 #define IRQ_ASSERT_DISABLED() ASSERT(!IRQ_ENABLED())
432 #define IRQ_ASSERT_ENABLED() do {} while(0)
433 #define IRQ_ASSERT_DISABLED() do {} while(0)
437 #ifndef IRQ_PREEMPT_HANDLER
438 #if CONFIG_KERN_PREEMPT
440 * Handle preemptive context switch inside timer IRQ.
442 INLINE void IRQ_PREEMPT_HANDLER(void)
444 if (proc_needPreempt())
448 #define IRQ_PREEMPT_HANDLER() /* Nothing */
453 * Execute \a CODE atomically with respect to interrupts.
455 * \see IRQ_SAVE_DISABLE IRQ_RESTORE
457 #define ATOMIC(CODE) \
459 cpu_flags_t __flags; \
460 IRQ_SAVE_DISABLE(__flags); \
462 IRQ_RESTORE(__flags); \
465 #endif /* CPU_IRQ_H */