4 * Copyright 2004, 2005 Develer S.r.l. (http://www.develer.com/)
5 * Copyright 2004 Giovanni Bajo
6 * This file is part of DevLib - See README.devlib for information.
9 * \brief CPU-specific definitions
13 * \author Giovanni Bajo <rasky@develer.com>
14 * \author Bernardo Innocenti <bernie@develer.com>
15 * \author Stefano Fedrigo <aleph@develer.com>
20 *#* Revision 1.30 2005/03/15 00:20:09 bernie
21 *#* BREAKPOINT, IRQ_RUNNING(), IRQ_GETSTATE(): New DSP56K macros.
23 *#* Revision 1.29 2005/02/16 20:33:24 bernie
24 *#* Preliminary PPC support.
26 *#* Revision 1.28 2004/12/31 17:39:41 bernie
27 *#* Fix documentation.
29 *#* Revision 1.27 2004/12/31 17:02:47 bernie
30 *#* IRQ_SAVE_DISABLE(), IRQ_RESTORE(): Add null stubs for x86.
32 *#* Revision 1.26 2004/12/13 12:08:12 bernie
33 *#* DISABLE_IRQSAVE, ENABLE_IRQRESTORE, DISABLE_INTS, ENABLE_INTS: Remove obsolete macros.
35 *#* Revision 1.25 2004/12/08 08:31:02 bernie
36 *#* CPU_HARVARD: Define to 1 for AVR and DSP56K.
41 #include "compiler.h" /* for uintXX_t */
45 * \name Macros for determining CPU endianness.
48 #define CPU_BIG_ENDIAN 0x1234
49 #define CPU_LITTLE_ENDIAN 0x3412
52 /*! Macro to include cpu-specific versions of the headers. */
53 #define CPU_HEADER(module) PP_STRINGIZE(PP_CAT3(module, _, CPU_ID).h)
58 #define NOP nop_instruction()
59 #define IRQ_DISABLE disable_interrupt()
60 #define IRQ_ENABLE enable_interrupt()
62 typedef uint16_t cpuflags_t; // FIXME
63 typedef unsigned int cpustack_t;
65 #define CPU_REG_BITS 16
66 #define CPU_REGS_CNT 16
67 #define CPU_STACK_GROWS_UPWARD 0
68 #define CPU_SP_ON_EMPTY_SLOT 0
69 #define CPU_BYTE_ORDER CPU_LITTLE_ENDIAN
74 #define NOP asm volatile ("nop")
75 #define IRQ_DISABLE /* nothing */
76 #define IRQ_ENABLE /* nothing */
77 #define IRQ_SAVE_DISABLE(x) /* nothing */
78 #define IRQ_RESTORE(x) /* nothing */
80 typedef uint32_t cpuflags_t; // FIXME
81 typedef uint32_t cpustack_t;
83 #define CPU_REG_BITS 32
84 #define CPU_REGS_CNT 7
85 #define CPU_STACK_GROWS_UPWARD 0
86 #define CPU_SP_ON_EMPTY_SLOT 0
87 #define CPU_BYTE_ORDER CPU_LITTLE_ENDIAN
91 #define NOP asm volatile ("nop" ::)
92 #define IRQ_DISABLE FIXME
93 #define IRQ_ENABLE FIXME
94 #define IRQ_SAVE_DISABLE(x) FIXME
95 #define IRQ_RESTORE(x) FIXME
96 #define IRQ_GETSTATE() FIXME
98 typedef uint32_t cpuflags_t; // FIXME
99 typedef uint32_t cpustack_t; // FIXME
101 /* Register counts include SREG too */
102 #define CPU_REG_BITS (CPU_PPC32 ? 32 : 64)
103 #define CPU_REGS_CNT FIXME
104 #define CPU_SAVED_REGS_CNT FIXME
105 #define CPU_STACK_GROWS_UPWARD 0 //FIXME
106 #define CPU_SP_ON_EMPTY_SLOT 0 //FIXME
107 #define CPU_BYTE_ORDER (__BIG_ENDIAN__ ? CPU_BIG_ENDIAN : CPU_LITTLE_ENDIAN)
108 #define CPU_HARVARD 0
113 #define BREAKPOINT asm(debug)
114 #define IRQ_DISABLE do { asm(bfset #0x0200,SR); asm(nop); } while (0)
115 #define IRQ_ENABLE do { asm(bfclr #0x0200,SR); asm(nop); } while (0)
117 #define IRQ_SAVE_DISABLE(x) \
118 do { (void)x; asm(move SR,x); asm(bfset #0x0200,SR); } while (0)
119 #define IRQ_RESTORE(x) \
120 do { (void)x; asm(move x,SR); } while (0)
122 static inline bool irq_running(void)
124 extern void *user_sp;
127 #define IRQ_RUNNING() irq_running()
129 static inline bool irq_getstate(void)
133 return !(x & 0x0200);
135 #define IRQ_GETSTATE() irq_getstate()
139 typedef uint16_t cpuflags_t;
140 typedef unsigned int cpustack_t;
142 #define CPU_REG_BITS 16
143 #define CPU_REGS_CNT FIXME
144 #define CPU_SAVED_REGS_CNT 8
145 #define CPU_STACK_GROWS_UPWARD 1
146 #define CPU_SP_ON_EMPTY_SLOT 0
147 #define CPU_BYTE_ORDER CPU_BIG_ENDIAN
148 #define CPU_HARVARD 1
150 /* Memory is word-addessed in the DSP56K */
151 #define CPU_BITS_PER_CHAR 16
152 #define SIZEOF_SHORT 1
154 #define SIZEOF_LONG 2
159 #define NOP asm volatile ("nop" ::)
160 #define IRQ_DISABLE asm volatile ("cli" ::)
161 #define IRQ_ENABLE asm volatile ("sei" ::)
163 #define IRQ_SAVE_DISABLE(x) \
165 __asm__ __volatile__( \
166 "in %0,__SREG__\n\t" \
168 : "=r" (x) : /* no inputs */ : "cc" \
172 #define IRQ_RESTORE(x) \
174 __asm__ __volatile__( \
175 "out __SREG__,%0" : /* no outputs */ : "r" (x) : "cc" \
179 #define IRQ_GETSTATE() \
182 __asm__ __volatile__( \
183 "in %0,__SREG__\n\t" \
184 : "=r" (sreg) /* no inputs & no clobbers */ \
186 (bool)(sreg & 0x80); \
189 typedef uint8_t cpuflags_t;
190 typedef uint8_t cpustack_t;
192 /* Register counts include SREG too */
193 #define CPU_REG_BITS 8
194 #define CPU_REGS_CNT 33
195 #define CPU_SAVED_REGS_CNT 19
196 #define CPU_STACK_GROWS_UPWARD 0
197 #define CPU_SP_ON_EMPTY_SLOT 1
198 #define CPU_BYTE_ORDER CPU_LITTLE_ENDIAN
199 #define CPU_HARVARD 1
202 * Initialization value for registers in stack frame.
203 * The register index is not directly corrispondent to CPU
204 * register numbers. Index 0 is the SREG register: the initial
205 * value is all 0 but the interrupt bit (bit 7).
207 #define CPU_REG_INIT_VALUE(reg) (reg == 0 ? 0x80 : 0)
212 * Execute \a CODE atomically with respect to interrupts.
214 * \see IRQ_SAVE_DISABLE IRQ_RESTORE
216 #define ATOMIC(CODE) \
218 cpuflags_t __flags; \
219 IRQ_SAVE_DISABLE(__flags); \
221 IRQ_RESTORE(__flags); \
225 //! Default for macro not defined in the right arch section
226 #ifndef CPU_REG_INIT_VALUE
227 #define CPU_REG_INIT_VALUE(reg) 0
231 #ifndef CPU_STACK_GROWS_UPWARD
232 #error CPU_STACK_GROWS_UPWARD should have been defined to either 0 or 1
235 #ifndef CPU_SP_ON_EMPTY_SLOT
236 #error CPU_SP_ON_EMPTY_SLOT should have been defined to either 0 or 1
240 * Support stack handling peculiarities of a few CPUs.
242 * Most processors let their stack grow downward and
243 * keep SP pointing at the last pushed value.
245 #if !CPU_STACK_GROWS_UPWARD
246 #if !CPU_SP_ON_EMPTY_SLOT
247 /* Most microprocessors (x86, m68k...) */
248 #define CPU_PUSH_WORD(sp, data) \
249 do { *--(sp) = (data); } while (0)
250 #define CPU_POP_WORD(sp) \
254 #define CPU_PUSH_WORD(sp, data) \
255 do { *(sp)-- = (data); } while (0)
256 #define CPU_POP_WORD(sp) \
260 #else /* CPU_STACK_GROWS_UPWARD */
262 #if !CPU_SP_ON_EMPTY_SLOT
263 /* DSP56K and other weirdos */
264 #define CPU_PUSH_WORD(sp, data) \
265 do { *++(sp) = (cpustack_t)(data); } while (0)
266 #define CPU_POP_WORD(sp) \
269 #error I bet you cannot find a CPU like this
276 * DSP56k pushes both PC and SR to the stack in the JSR instruction, but
277 * RTS discards SR while returning (it does not restore it). So we push
278 * 0 to fake the same context.
280 #define CPU_PUSH_CALL_CONTEXT(sp, func) \
282 CPU_PUSH_WORD((sp), (func)); \
283 CPU_PUSH_WORD((sp), 0x100); \
288 * In AVR, the addresses are pushed into the stack as little-endian, while
289 * memory accesses are big-endian (actually, it's a 8-bit CPU, so there is
290 * no natural endianess).
292 #define CPU_PUSH_CALL_CONTEXT(sp, func) \
294 uint16_t funcaddr = (uint16_t)(func); \
295 CPU_PUSH_WORD((sp), funcaddr); \
296 CPU_PUSH_WORD((sp), funcaddr>>8); \
300 #define CPU_PUSH_CALL_CONTEXT(sp, func) \
301 CPU_PUSH_WORD((sp), (func))
306 * \name Default type sizes.
308 * These defaults are reasonable for most 16/32bit machines.
309 * Some of these macros may be overridden by CPU-specific code above.
311 * ANSI C requires that the following equations be true:
313 * sizeof(char) <= sizeof(short) <= sizeof(int) <= sizeof(long)
314 * sizeof(float) <= sizeof(double)
315 * CPU_BITS_PER_CHAR >= 8
316 * CPU_BITS_PER_SHORT >= 8
317 * CPU_BITS_PER_INT >= 16
318 * CPU_BITS_PER_LONG >= 32
323 #define SIZEOF_CHAR 1
327 #define SIZEOF_SHORT 2
331 #if CPU_REG_BITS < 32
336 #endif /* !SIZEOF_INT */
339 #if CPU_REG_BITS > 32
340 #define SIZEOF_LONG 8
342 #define SIZEOF_LONG 4
347 #define SIZEOF_PTR SIZEOF_INT
350 #ifndef CPU_BITS_PER_CHAR
351 #define CPU_BITS_PER_CHAR (SIZEOF_CHAR * 8)
354 #ifndef CPU_BITS_PER_SHORT
355 #define CPU_BITS_PER_SHORT (SIZEOF_SHORT * CPU_BITS_PER_CHAR)
358 #ifndef CPU_BITS_PER_INT
359 #define CPU_BITS_PER_INT (SIZEOF_INT * CPU_BITS_PER_CHAR)
362 #ifndef CPU_BITS_PER_LONG
363 #define CPU_BITS_PER_LONG (SIZEOF_LONG * CPU_BITS_PER_CHAR)
366 #ifndef CPU_BITS_PER_PTR
367 #define CPU_BITS_PER_PTR (SIZEOF_PTR * CPU_BITS_PER_CHAR)
371 #define BREAKPOINT /* nop */
376 /* Sanity checks for the above definitions */
377 STATIC_ASSERT(sizeof(char) == SIZEOF_CHAR);
378 STATIC_ASSERT(sizeof(short) == SIZEOF_SHORT);
379 STATIC_ASSERT(sizeof(long) == SIZEOF_LONG);
380 STATIC_ASSERT(sizeof(int) == SIZEOF_INT);
386 * \brief Invoked by the scheduler to stop the CPU when idle.
388 * This hook can be redefined to put the CPU in low-power mode, or to
389 * profile system load with an external strobe, or to save CPU cycles
390 * in hosted environments such as emulators.
393 #if defined(ARCH_EMUL) && (ARCH & ARCH_EMUL)
394 /* This emulator hook should yield the CPU to the host. */
396 void SchedulerIdle(void);
398 #define CPU_IDLE SchedulerIdle()
399 #else /* !ARCH_EMUL */
400 #define CPU_IDLE do { /* nothing */ } while (0)
401 #endif /* !ARCH_EMUL */
402 #endif /* !CPU_IDLE */
405 #define SCHEDULER_IDLE CPU_IDLE
407 #endif /* DEVLIB_CPU_H */